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) Preliminary Specification
) Final Specification
A121EW02 V0
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Contents
1.0 Handling Precautions ..................................................................................................................... 5
2.0 General Description.......................................................................................................................... 6
2.1 Display Characteristics .................................................................................................................... 6
2.2 Functional Block Diagram................................................................................................................ 7
3.0 Absolute Maximum Ratings ............................................................................................................. 8
3.1 Absolute Maximum Ratings of the lamp.7
4.0 Optical Characteristics ............................................................................................................................... 9
4.1 Signal Description
9
5.0 Signal Interface............................................................................................................................... 10
5.1 Connectors...................................................................................................................................... 11
5.2 Signal Pin ........................................................................................................................................ 12
5.3 Signal Description .......................................................................................................................... 12
5.4 Interface Timing .............................................................................................................................. 13
5.5 Signal Electrical Characteristics ................................................................................................... 14
5.6 Signal for Lamp connector ............................................................................................................ 16
6.0 Pixel Format Image......................................................................................................................... 16
7.0 Parameter guide line for CCFL Inverter ........................................................................................ 17
8.1 Timing Control ................................................................................................................................ 18
8.1 Timing Characteristics ................................................................................................................... 18
8.2 Timing Definition............................................................................................................................. 18
9.0 Power Consumption ....................................................................................................................... 19
10.0 Power ON/OFF Sequence ............................................................................................................ 20
11.0 Reliability /Safety Requirement.................................................................................................... 21
A121EW02 V0
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II Record of Revision
Old description
New Description
V0. 2006/04/20
First Draft
V1. 2006/05/19
V2 2006/6/16
V3 2006/7/7
Remark
None
None
Brightness Min.
4.0
None
4.0
13
None
5.4
20
None
ESD RA condition
11.0
None
3.0
None
Note 2
3.0
Operating Temperature
Max(+70)
3.0
Storage Temperature
Max(+70)
3.0
4.0
None
Luminance Uniformity
4.0
None
5.3
20
Low Temperature
Storage: Ta=0
11.0
20
Low Temperature
Operation: Ta=-20
11.0
20
11.0
12.0
21
V3.1 2006/7/12
15
None
5.6
V3.2 2006/7/13
+70
Ta:+70/Tp:+71
3.0
20
Tp: 70
Tp: 71
11.0
None
Ta/Tp definition
3.0
20
11.0
V3.3 2006/7/21
278.2(W) x 183.7(H) x
13.5(D)
2.1
V3.4 2006/7/27
278.2(W) x 183.7(H) x
13.5(D)
2.1
710g
750g
2.1
A121EW02 V0
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22
V3.5 2006/8/18
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None
9
22
V3.6 2006/8/21
V3.7 2006/9/15
20
T1/Min: 0.5ms;
T1/Min: 0.4ms
/Max: 50ms
10.0
T7/Max: 10ms
T7/Max: 1000ms
10.0
None
Lot definition
13.0
Packaging description
14.0
10.0
14.0
Max: 10ms
20
23
Add Note 2
12.0
Color / Chromaticity Coordinates (CIE) rang +- 4.0
0.03
LVDS 1st pin marking, redefine inverter cable 12.0
length;
Bx: 0.12, 0.15, 0.18
4.0
24,25 None
V3.8 2006/10/4
20
V3.9 2006/11/10
24
Packaging description
Update drawing
A121EW02 V0
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A121EW02 V0
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A121EW02 V0
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X-Driver
(4 pairs LVDS)
LCD DRIVE
CARD
RxIN0
RxIN1
RxIN2
RxCLKIN
LCD
Controller
TFT ARRAY/CELL
1280 x 3 x 800
DC-DC
Converter
Ref circuit
Backlight Unit
Y-Driver
VDD
GND
Lamp Connector(4pin) X 2
Hirose DF19LA-20P-1H(56)
JST BHR-04VS-1
Mating Type JST SM04(4.0)B-BHS-1-TB
A121EW02 V0
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Unit
[Volt]
[Volt]
o
[ C]
[%RH]
o
[ C]
[%RH]
Conditions
Note 2
Note 1
Note 1
Operating Range
Storage Range
Note 2 : High Operating Temperature may cause the slight material variation. We assure under the above
condition, the module set keep the function normal display.
Symbol
IL
VL
Min
-
Max
7.0
1600
Unit
mArms
Vrms
Conditions
Note 1
Note 2
A121EW02 V0
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Unit
Item
Viewing Angle
CR: Contrast Ratio
[degree]
[degree]
[degree]
[degree]
Horizontal (Right)
CR = 10
(Left)
Vertical (Upper)
CR = 10
(Lower)
Contrast ratio
Response Time
[msec]
[msec]
Color / Chromaticity
Coordinates (CIE)
White Luminance
CCFL @ 6.0mA
Luminance
Uniformity
[cd/m2]
Rising
Falling
White x
White y
Min.
Typ.
Max.
50
50
35
50
65
65
50
65
300
350
0.28
0.30
12
18
0.31
0.33
50
60
0.34
0.36
Red x
0.61
0.64
0.67
Red y
0.31
0.34
0.37
Green x
0.25
0.28
0.31
Green y
0.56
0.59
0.62
Bule x
0.12
0.15
0.18
Blue y
0.04
0.07
0.10
Central
400
450
70
Remark
Note1
Note1
Note1
Note2
Note 1 : Ambient temperature =25. And lamp current IL = 6 mArms. To be measured in the dark room below 10
Lux and to be measured on the center area of panel with a viewing cone of 1by Topcon luminance meter
BM-7, after 20 minutes operation.
Note 2 : Luminance Uniformity of these 9 points is defined as below:
90 %
50 %
10 %
10 %
50 %
A121EW02 V0
90 %
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Description
LVDS differential data input (R0~R5, G0)
LVDS differential data input (G1~G5, B0~B1)
LVDS differential data input (B2~B5, Hsync, Vsync, DE)
LVDS differential clock input
+3.3V Power Supply
Ground
Connector
20
A121EW02 V0
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The module uses a 100ohm resistor between positive and negative data lines of each receiver input
A121EW02 V0
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Manufacturer
JST
BHR-04VS-1
SM04(4.0)B-BHS-1-TB
Signal Name
GND
VDD
AGING
DATAEDID
RxIN0P
RxIN1N
GND
RxIN2P
RxCLKINN
GND
Pin#
2
4
6
8
10
12
14
16
18
20
Signal Name
VDD
VDDEDID
CLKEDID
RxIN0N
GND
RxIN1P
RxIN2N
GND
RxCLKINP
GND
Note: Add 1K ohm resister and connect to grounding as the solution for not adopting Pin4, Pin5, Pin6, and Pin7.
Description
LVDS differential data input(Red0-Red5, Green0)
LVDS differential data input(Green1-Green5, Blue0-Blue1)
LVDS differential data input(Blue2-Blue5, Hsync, Vsync, DE)
LVDS differential clock input
+3.3V Power Supply
Ground
A121EW02 V0
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Signal Name
R5
R4
R3
R2
R1
R0
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Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
Each red pixel's brightness data consists of these 6
bits pixel data.
Red-pixel Data
G5
G4
G3
G2
G1
G0
Green-pixel Data
Each green pixel's brightness data consists of these 6
bits pixel data.
Green-pixel Data
B5
B4
B3
B2
B1
B0
Blue-pixel Data
Each blue pixel's brightness data consists of these 6
bits pixel data.
Blue-pixel Data
RxCLKIN
DE
Data Clock
Display Timing
VS
Vertical Sync
HS
Horizontal Sync
Horizontal synchronized signal
Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
(C) Copyright AU Optronics
May, 2005 All Rights Reserved.
A121EW02 V0
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Symbol
tTCP
tTOP1
tTOP0
tTOP6
tTOP5
tTOP4
tTOP3
tTOP2
Parameter
CLK IN Period
Output Data Position1
Output Data Position0
Output Data Position6
Output Data Position5
Output Data Position4
Output Data Position3
Output Data Position2
Min.
-0.3
T/7-0.3
2/7 T-0.3
3/7 T-0.3
4/7 T-0.3
5/7 T-0.3
6/7 T-0.3
Typ.
T
0
T/7
2/7 T
3/7 T
4/7 T
5/7 T
6/7 T
Max.
Units
0.3
T/7+0.3
2/7 T+0.3
3/7 T+0.3
4/7 T+0.3
5/7 T+0.3
6/7 T+0.3
ns
ns
ns
ns
ns
ns
ns
A121EW02 V0
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Symbol
Min.
Typ.
Max.
Unit
VID
0.1
0.6
VCM
1.2
1.5
VTH
100
mV
Condition
VTH/VTL=+-100mV
VCM=1.2V
Differential Input Low
VTL
-100
mV
Threshold Voltage
Note: LVDS Signal W aveform
A121EW02 V0
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Signal Name
Lamp(A) High Voltage
Lamp(A) Low Voltage
Lamp(B) Low Voltage
Lamp(B) High Voltage
A121EW02 V0
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Min
4.0
Typ
6.0
Max
7.0
Units
[mA] rms
45
52
70
[KHz]
1,200
[Volt] rms
900
[Volt] rms
538
[Volt] rms
3.3
[Watt]
Condition
(Ta=25)
Note 2
(Ta=25)
Note 3
(Ta= 0)
Note 4 ; Note 6
(Ta= 25)
Note 4 ; Note 6
(Ta=25
ICFL=6mA)
Note 5
(Ta=25
ICFL=6mA)
Note 5
A121EW02 V0
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Symbol
Min.
Typ.
Max.
Unit
Frame Rate
50
60
Hz
Clock frequency
1/ TClock
62
68.9
75
MHz
Period
TV
803
816
832
Active
TVD
800
800
800
Blanking
TVB
16
32
Period
TH
1302
1408
1700
Active
THD
1280
THB
22
128
420
Vertical
Section
Horizontal
Section
Blanking
Note : DE mode only
TLine
TClock
A121EW02 V0
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VDDns
Allowable
Logic/LCD Drive
Ripple Voltage
Allowable
Logic/LCD Drive
Ripple Noise
Typ
Max
3.3
3.6
1.6
1.7
400
650
Units
Condition
[Volt]
[Watt]
[Watt]
mA
mA
500
[mV]
p-p
100
[mV]
p-p
Note 1: VDD=3.3V
Note 2: A121EW02 V0 Module includes four lamps.
Note 3: CCFL Starting Voltage is defined the minimum starting voltage for inverter design reference.
A121EW02 V0
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90%
10%
10%
T3
T4
LVDS Interface
T5
VALID
DATA
T6
Backlight On
Value
Parameter
Min.
Typ.
Max.
Units
T1
0.4
50
(ms)
T2
50
(ms)
T3
50
(ms)
T4
500
(ms)
T5
200
(ms)
T6
200
(ms)
Note 1: T5, T6 is only for assuring the display quality. (T5,T6 spec may be ignored if dont care the display quality.)
A121EW02 V0
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Test items
Conditions
Ta= 70
240Hrs
Ta= -20
240Hrs
Tp= 71
240Hrs
Ta= 0
240Hrs
240Hrs
Thermal shock
Vibration
Remark
Operation
Non-operation
-20C to +60C, Ramp 20C/min,
Duration at Temp. = 30min, Test Cycles =
50
Frequency range
: 8~33.3Hz
JIS D1601,
Stoke
: 1.3mm
Sweep
: 3.0G, 33.3 ~ 400Hz A-10
Condition A
Cycle
: 15 minutes
2 hours for each direction of X,Z
4 hours for Y direction
100G, 6ms, X,Y,Z
JIS C0041,
A-7
Condition C
Mechanical shock
Random vibration:
2
0.015G /Hz from 5~200Hz
6dB/octave from 200~500Hz
IEC 68-34
Height: 60cm
1 corner, 3 edges, 6 surfaces
JIS Z0202
Operation &
Non-operation
The CCFL Life Time is defined as the module brightness decrease to 50% original brightness at
Ta=25, IL =6mA.
(C) Copyright AU Optronics
May, 2005 All Rights Reserved.
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06
2006
07
2007
08
2008
Mark
Definition
01
1st Week
02
2nd Week
A121EW02 V0
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Automatic
A121EW02 V0
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B. External packaging
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Stretch film
Pallet
Corner angle
PET band
A121EW02 V0
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