Unit 5

Q1.
a) Design the hardware to implement multiplication of signed magnitude
b) Explain restoring division algorithm for binary division.

numbers.

Q2
a). E plai Booths algorith

a d also show hardware.

b). Perform bcd multiplication of 03 and 12.

Q3
A). Explain algorithm for floating point multiplication and division.
B) . Show the trace of signed magnitude multiplication of -3 and +4.
Q4.
a) Design hardware to implement floating point addition and subtraction algorithm.
b) Show trace of division of bcd no. 16/03.
Q5.
a)

Develop algorithm to implement BCD Division.

b) Explain algorithm for floating point addition and subtraction.

Unit 6.
Q1.
A) A digital computer has memory unit of 64kX16 and cache memory of 1k words. The cache uses direct mapping
technique with block size of 4 words.
i)How many bits are there in tag,index,block,word.
ii)How many block cache can accommodate.
Explain direct mapping technique and set associative with example.
Q2. Explain paging and segmentation with example.
Q3
a).An address space of 24 bits and corresponding memory space is specified by 16 bits.
How many words are there in address space?
How many words are there in memory space?
If page consist of 2k words, how many pages and blocks are there in system.

b).Explain set associative memory with example and advantages compare to direct mapping technique.
Q4
Explain Associative cache memory and performance consideration for cache memory?
Explain cache in Pentium.
Q5.
a) Cache Access Time = 20ns Memory Access Time = 120ns
Hit Ratio = 0.8 Cache Block size = 16 words
What is the hit ratio if the average access time is increased by 40ns.
b) A cache memory of size 1k and main memory of size 16k. The size of block is 16 words. Find the no. of bits for
tag,line and word.

UNIT-7
Q1.
A). Explain daisy chaining and parallel interrupts.
b) Distinguish between programmed I/O and interrupt-driven I/O.
Q2.
What is an UART? Explain the internal configuration of UART.
Discuss about I/O channel architecture (interface).
Q3.
What is direct memory access? Explain the working of DMA.
Discuss about Asynchronous serial data transfer.
Q4
What is I/O processor? Explain with neat diagram.
Explain source and destination initiated handshake signal.
Q5.
Compare memory map and I/O MAP.
Explain different types of communication techniques.

UNIT-8

Q1. A
Compare RISC and CISC processors.
Explain register RISC processor.
Q2. E plai the Fl

s classificatio of

ultiprocessor.

Q3. Explain interconnection structure used in Multiprocessor.( BUS, 8X8 OMEGA, Cross bar, multiport, etc.)
Q4.
Explain communication and synchronization in Multiprocessors.
What is cache coherence? Explain its importance
Q5.
What is meant by instruction pipeline and RISC pipelining? Explain.
Explain data and control conflict in pipelining and how to solve these conflicts.
Q6.
a) What are characteristic of multiprocessor?
b).Explain multi processor system topologies.