128

C HAPT E R 4 C O M M U N IC A T IO N S CIR C U ITS

12-5409 Reubenjoshzb

SUMMARY
Obsevation of the block diagram of a basic communications system reveals that communications
circuits in the analog context are primarily built up from only a few basic building blocks: ampliers,
oscillators, and lters. One other receiver circuit, the detector, responsible for recovering the intelligence information from the modulated carrier, will be studied in Chapter 6.
Amplier operation can be classied in part in terms of the conduction angle of the input signal, that is, the number of degrees over which the amplier active device is conducting current. The
most linear operation, class A, is also the least efcient, so there is an inherent tradeoff between linearity and efciency. It is possible to improve efciency while still maintaining linearity. This is the
purview of push-pull amplication, in which more than one active device is used. Still greater strides
in efciency can be attained through class C amplication, where the active device conducts for only
a small portion of the applied input. A sine-wave output is created through the ywheel effect created by a resonant tank circuit at the output of the active device; class C ampliers thus have a bandwidth characteristic and are often referred to as tuned ampliers.
Many oscillators used in communications applications are ampliers with a regenerative feedback path to sustain oscillations at a desired frequency. Ampliers and oscillators are closely related:
The gain produced by the amplier stage is exactly offset by the attenuation produced by the voltagedivider action in the frequency-determining tank circuit. There are a wide variety of LC oscillators,
each dened primarily by the means by which the voltage divider is implemented. The highest
frequency stability can be achieved by replacing the LC tank circuit with a quartz crystal, which
functions as a series RLC circuit. At its resonant frequency, the crystal oscillator is capable of
frequency-stable operation over a prolonged period.
All communications systems make extensive use of frequency-selective circuits in the form
of lters and resonant circuits. Filters rely on the reactive properties of inductors and capacitors
either to pass or reject a band of frequencies. Filters may be of the low-pass or high-pass type, or
they may be bandpass or band-reject (notch) lters whose bandwidth is dened by the Q of the
resonant circuit.
One important building block of any communications system is the mixer circuit, which can be
an amplier that is deliberately made to be nonlinear in operation. In fact, mixing can be seen to take
place in any nonlinear device. Whether called a modulator (in the transmitter), a balanced modulator,
a product detector, or a mixer, the circuit works on the principle of nonlinear multiplication of two
signals. This operation produces cross products that, for example, produce the sidebands of an AM
signal. In addition, harmonics are created, and these harmonics may produce additional, higher-order
products that may be undesired. It is also possible to produce sum and difference frequencies as the
result of linear multiplication, and a multiplier can function as a balanced mixer, where only the sum
and difference frequencies are produced without the carrier.
Finally, any modern, frequency-agile communication system owes its existence to the
phase-locked loop and the system derived from it, the frequency synthesizer. The phase-locked
loop, when locked, is an automatic control circuit that produces an output signal identical to its
reference (input) signal except that it is free from noise. When used as a frequency synthesizer, the
phase-locked loop is capable of producing a wide range of frequencies from a single-frequency
reference. Only one crystal in a reference oscillator is needed to produce many frequencies, which
can be set manually or controlled automatically with software or remote-control devices. The
newest incarnation of the frequency synthesizer concept is direct digital synthesis, which marries
digital logic and signal-processing techniques to the production of stable signals well into the
radio-frequency range.

QUESTIONS AND PROBLEMS

SECTION 4-2
1. Draw schematics for Hartley and Colpitts oscillators. Briey explain their operation and differences.
2. Describe the reason that a Clapp oscillator has better frequency stability than the Hartley or
Colpitts oscillators.
3. List the major advantages of crystal oscillators over the LC varieties. Draw a schematic for a
Pierce oscillator.
4. The crystal oscillator time base for a digital wristwatch yields an accuracy of {15 s/month.
Express this accuracy in parts per million (ppm). ({5.787 ppm)

Q U ESTIO N S A N D PR O B LEMS

129

12-5409 Reubenjoshzb
SECTION 4-3
5. Explain the makeup of a practical inductor and capacitor. Include the quality and dissipation in
your discussion.
6. Dene resonance and describe its use.
7. Calculate an inductors Q at 100 MHz. It has an inductance of 6 mH and a series resistance of
1.2 k. Determine its dissipation. (3.14 * 10, 0.318 * 10-3)
8. Calculate a capacitors Q at 100 MHz given 0.001 mF and a leakage resistance of 0.7 M.
Calculate D for the same capacitor. (4.39 * 105, 2.27 * 10-6)
9. The inductor and capacitor for Problems 7 and 8 are put in series. Calculate the impedance
at 100 MHz. Calculate the frequency of resonance (fr) and the impedance at that frequency.
(3.77 M, 65 kHz, 1200 )
10. Calculate the output voltage for the circuit shown in Figure 4-16 at 6 kHz and 4 kHz. Graph
these results together with those of Example 4-2 versus frequency. Use the circuit values given
in Example 4-2.
11. Sketch the eout >ein versus frequency characteristic for an LC bandpass lter. Show flc and fhc
on the sketch and explain how they are dened. On this sketch, show the bandwidth (BW) of
the lter and explain how it is dened.
12. Dene the quality factor (Q) of an LC bandpass lter. Explain how it relates to the selectivity
of the lter. Describe the major limiting value on the Q of a lter.
13. An FM radio receiver uses an LC bandpass lter with fr = 10.7 MHz and requires a BW of
200 kHz. Calculate the Q for this lter. (53.5)
14. The circuit described in Problem 13 is shown in Figure 4-18. If C = 0.1 nF (0.1 * 10-9 F),
calculate the required inductor value and the value of R. (2.21 mH, 2.78 )
15. A parallel LC tank circuit has a Q of 60 and coil winding resistance of 5 . Determine the circuits impedance at resonance. (18 k)
16. A parallel LC tank circuit has L = 27 mH, C = 0.68 mF, and a coil winding resistance of 4 .
Calculate fr, Q, Zmax, the BW, flc, and fhc. (1175 Hz, 49.8, 9.93 k, 23.6 Hz, 1163 Hz, 1187 Hz)
17. Explain the signicance of the k and m in constant-k and m-derived lters.
18. Describe the criteria used in choosing either an RC or LC lter.
19. Explain the importance of keeping lead lengths to a minimum in RF circuits.
20. Describe a pole.
21. Explain why Butterworth and Chebyshev lters are called constant-k lters.
*22. Draw the approximate equivalent circuit of a quartz crystal.
23. What are the undesired effects of the crystal holder capacitance in a crystal lter, and how are
they overcome?
*24. What crystalline substance is widely used in crystal oscillators (and lters)?
25. Using your library or some other source, provide a schematic for a four-element crystal lattice
lter and explain its operation.
*26. What are the principal advantages of crystal control over tuned circuit oscillators (or lters)?
27. Explain the operation of a ceramic lter. What is the signicance of a lters shape factor?
28. Dene shape factor. Explain its use.
29. A bandpass lter has a 3-dB ripple amplitude. Explain this specication.
30. Explain the operation and use of mechanical lters.
31. Why are SAW lters not often used in SSB equipment?

SECTION 4-4
32. What are the typical inputs and outputs for a balanced modulator?
33. Briey describe the operation of a balanced ring modulator.
34. Explain the advantages of using an IC for the four diodes in a balanced ring modulator as compared with four discrete diodes.

*An asterisk preceding a number indicates a question that has been provided by the FCC as a study aid for
licensing examinations.

130

C HAPT E R 4 C O M M U N IC A T IO N S CIR C U ITS

12-5409 Reubenjoshzb
35. Referring to the specications for the AD630 LIC balanced modulator in Figure 4-28, determine the channel separation at 10 kHz, explain how a gain of +1 and +2 are provided.
36. Explain how to generate an SSBSC signal from the balanced modulator.

SECTION 4-5
37. Draw a block diagram of a phase-locked loop (PLL) and briey explain its operation.
38. List the three possible states of operation for a PLL and explain each one.
39. A PLLs VCO free-runs at 7 MHz. The VCO does not change frequency until the input is
within 20 kHz of 7 MHz. After that condition, the VCO follows the input to {150 kHz of
7 MHz before the VCO starts to free-run again. Determine the PLLs lock and capture ranges.
(300 kHz, 40 kHz)
40. Explain the operation of a basic frequency synthesizer as illustrated in Figure 4-32. Calculate
f0 if fR = 1 MHz and N = 61. (61 MHz)
41. Discuss the relative merits of the synthesizers shown in Figures 4-34(a), (b), and (c) as compared to the one in Figure 4-32.
42. Describe the operation of the synthesizer divider in Figure 4-35. What basic problem does it
overcome with respect to the varieties shown in Figures 4-32 and 4-34?
43. Calculate the output frequency of a synthesizer using the divider technique shown in Figure
4-35 when the reference frequency is 1 MHz, A = 26, M = 28, and N = 4. (138 MHz)
44. Briey explain DDS operation based on the block diagram shown in Figure 4-36.
45. A DDS system has fCLK MAX = 60 MHz and a 28-bit phase accumulator. Calculate its approximate maximum output frequency and frequency resolution when operated at fCLK MAX.
(24 MHz, 0.223 Hz)