Professional Documents
Culture Documents
SM-CTV-O-228
TV/DVD COMBO
SERVICE MANUAL
MODEL NO. MTV-DV05
CHASSIS NO. CN-12DV
TABLE OF CONTENTS
APPENDIX
SERVICE MANUAL
SAFETY PRECAUTION
WARNING: REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY.
1. The TV has a nominal working EHT voltage. Extreme caution should be exercised when working on the
TV with the back removed.
1.1 Do not attempt to service this TV if you are not conversant with the precautions and procedures for
working on high voltage equipment.
1.2 When handling or working on the CRT, always discharge the anode to the TV chassis before removing
the anode cap in case of electric shock.
1.3 The CRT, if broken, will violently expel glass fragments. Use shatterproof goggles and take extreme care
while handling.
1.4 Do not hold the CRT by the neck as this is a very dangerous practice.
2. It is essential that to maintain the safety of the customer all power cord forms be replaced exactly as
supplied from factory.
3. Voltage exists between the hot and cold ground when the TV is in operation. Install a suitable isolating
transformer of beyond rated overall power when servicing or connecting any test equipment for the sake
of safety.
4. When replacing ICs, use specific tools or a static-proof electric iron with small power (below 35W).
5. Do not use a magnetized screwdriver when tightening or loosing the deflection yoke assembly to avoid
electronic gun magnetized and decrement in convergence of the CRT.
6. When remounting the TV chassis, ensure that all guard devices, such as nonmetal control buttons,
switch, insulating sleeve, shielding cover, isolating resistors and capacitors, are installed on the original
2
SERVICE MANUAL
place.
7. Replace blown fuses within the TV with the fuse specified in the parts list.
8. When replacing wires or components to terminals or tags, wind the leads around the terminal before
soldering. When replacing safety components identified by the international hazard symbols on the
circuit diagram and parts list, it must be the company-approved type and must be mounted as the
original.
9. Keep wires away from high temperature components.
This symbol tells you that the critical components identified by the UL marking have special
safety-related characteristics.
SERVICE MANUAL
MAINTENANCE
1. Place the unit on a stable stand or base that is of adequate size and strength to prevent the is from
being accidentally tipped over, pushed off, or pulled off. Do not place the set near or over a radiator or
heat register, or where it is exposed to direct sunlight.
2. Do not install the unit set in a place exposed to rain, water, excessive dust, mechanical vibrations or
impacts.
3. Allow enough space (at least 10cm) between the unit and wall or enclosures for proper ventilation.
4. Slots and openings in the cabinet should never be blocked by clothes or other objects.
5. Please power off the unit set and disconnect it from the wall immediately if any abnormal phenomenon
occurs, such as bad smell, belching smoke, sparkling, abnormal sound, no picture/sound/raster. Hold
the plug firmly when disconnecting the power cord.
6. Unplug the unit set from the wall outlet before cleaning or polishing it. Use a dry soft cloth for cleaning
the exterior of the unit set or CRT screen. Do not use liquid cleaners or aerosol cleaners.
SERVICE MANUAL
ADJUSTMENTS
SET-UP ADJUSTMENTS
The following adjustments should be made when a complete realignment is required or a new picture tube is
installed.
Perform the adjustments in the following order:
1. Color purity
2. Convergence
3. White balance
Notes:
The purity/convergence magnet assembly and rubber wedges need mechanical positioning.
For some picture tubes, purity/convergence adjustments are not required.
SERVICE MANUAL
Yoke
Fig. 1
Fig. 2
2. Convergence Adjustment
Preparation:
Before attempting any convergence adjustment, the TV should be operated for at least 15 minutes.
2.1 Center convergence adjustment
2.1.1
2.1.2
2.1.3
Adjust two tabs of the 4-pole magnet to change the angle between them and red and blue vertical
lines are superimposed each other on the center of the screen.
2.1.4
Turn both tabs at the same time keeping the angle constant to superimpose red and blue horizontal
on the center of the screen.
2.1.5
Adjust two tabs of the 6-pole magnet to superimpose red/blue line and green line.
2.1.6
Remember red and blue movement. Repeat steps 2.1.32.1.5 until optimal convergence is
obtained.
Loosen the clamp screw holding the deflection yoke assembly and allow it tilting.
6
SERVICE MANUAL
2.2.2
Temporarily put the first wedge between the picture tube and deflection yoke assembly. Move front
of the deflection yoke up or down to obtain better convergence in circumference. Push the mounted
wedge in to fix the yoke temporarily.
2.2.3
2.2.4
Move front of the deflection yoke to the left or right to obtain better convergence in circumference.
2.2.5
Fix the deflection yoke position and put the third wedge in either upper space. Fasten the deflection
yoke assembly on the picture tube.
2.2.6
Detach the temporarily mounted wedge and put it in either upper space. Fasten the deflection yoke
assembly on the picture tube.
2.2.7
After fastening the three wedges, recheck overall convergence and ensure to get optimal
convergence. Tighten the lamp screw holding the deflection yoke assembly.
SERVICE MANUAL
CIRCUIT ADJUSTMENTS
Preparation:
Circuit adjustments should be made only after completion of set-up adjustments.
Circuit adjustments can be performed using the adjustable components inside the TV set. For TVs with
I2C bus control, first change the bus data.
1. Degaussing
A degaussing coil is built inside he TV set. Each time the TV is powered on, the degaussing coil will
automatically degauss the TV. If the TV is magnetized by external strong magnetic field, causing color
spot on the screen, use a specific degausser to demagnetize the TV in the following ways. Otherwise,
color distortion will be exist on the screen.
1.1 Power on the TV set and operate it for at least 15 minutes.
1.2 Receive red full-field pattern.
1.3 Power on the specific degausser and face it to the TV screen.
1.4 Turn on the degausser. Slowly move it around the screen and slowly take it away from the TV.
1.5 Repeat the above steps until the TV is degaussed completely.
2. Supply Voltage Adjustment
Caution: +B voltage has close relation to high voltage. To prevent X-ray radiation, set +B voltage
to the rated voltage.
2.1 Make sure that the supply voltage is within the range of the rated value.
2.2 Connect a digital voltmeter to the +B voltage output terminal VD891 of the TV set. Power on the TV and
set the brightness and sub-brightness to minimum.
2.3 Regulate voltage adjustment components on the power PCB to make the voltmeter read 1151V .
3. High Voltage Inspection
Caution: No high voltage adjustment components inside the chassis. Please perform high
voltage inspection in the following ways.
3.1 Connect a precise static high voltmeter to the second anode (inside the high voltage cap) of the picture
tube.
3.2 Plug in the supply socket (120V, AC) and turn on the TV. Set the brightness and contrast to minimum (0
A).
3.3 The high voltage reading should be less than the EHT limitation.
3.4 Change the brightness from minimum to maximum, and ensure high voltage not beyond the limitation in
any case.
Nominal EHT voltage: 221KV
SERVICE MANUAL
4. Focus Adjustment
Caution: Dangerously high voltages are present inside the TV. Extreme caution should be
exercised when working on the TV with the back removed.
4.1 After removing the back cover, look for the FBT on the main PCB. There should be a FCB on the FBT.
4.2 Power on the TV and preheat it for 15 min.
4.3 Receive a normal TV signal. Rotate knob of the FCB until you get a sharp picture.
Before Adjusting
After Adjusting
5. Safety Inspection
5.1 Inspection for insulation and voltage-resistant
Perform safety test for all naked metal of the TV. Supply high voltage of 3000V AC, 50Hz (limit current of
10mA) between all naked metal and cold ground. Test every point for 3 seconds. and ensure no arcing
and sparking.
5.2 Requirements for insulation resistance
Measure resistance between naked metal of the TV and feed end of the power cord to be infinity with a
DC-500 high resistance meter and insulation resistance between the naked metal and degaussing coil
to be over 20M.
6. DESIGN/SERVICE mode
6.1 To enter the DESIGN/USER SERVICE (S) mode
Set the volume to 0. Then press the MUTE key on the remote control and on the TV at the same time
for over 2 seconds. In the S mode, press the POWER key to quit the S mode.
6.2 Adjustments and bus data
Table 1 Bus Data
Item
Symbol Description
Bus Data
MENU.00
V.POSITION
VERTICAL POSITION
40
H.PHASE
HORIZONTAL PHASE
15
V.SIZE
VERTICAL SIZE
60
V.SC
VERTICAL S-CORRECTION
18
V.LINE
VERTICAL LINE
19
V.SIZE CMP
SUB.BIAS
SUB-BRIGHT
63
SUB.CONT
SUB-CONTRAST
31
V.KILL
VERTICAL KILL
MENU.01
(continued)
9
SERVICE MANUAL
RF.AGC
RF AGC
20
R.BIAS
RED BIAS
130
G.BIAS
GREEN BIAS
130
B.BIAS
BLUE BIAS
130
R.DRIVE
RED DRIVE
75
G.DRIVE
GREEN DRIVE
15
B.DRIVE
BLUE DRIVE
75
SECAM B DC
SECAM B-Y
SECAM R DC
SECAM R-Y
H.APC GAIN
SYNC.KIL
SYNC KILL
H.BLK.L
H.BLK.R
CROS.B/W
CROSSHATCH BLACK/WHITE
VIDEO.LVL
VIDEO LEVEL
FM.LEVEL
FM LEVEL
16
FM.MUTE
FM MUTE
AUDIO.MUTE
AUDIO MUIE
VIDEO.MUTE
VIDEO MUTE
DEEM.TC
SND.TRAP
SOUND TRAP
SUB.COLOR
SUB COLOR
63
SUB.TINT
SUB TINT
32
SUB.SHARP
SUB SHARP
63
AUTO FLESH
AUTOMATIC FLESH
CORING.GAN
CORING GAIN
C.EXT
EXTERNAL CHROMA
C.BYPASS
C.KILL ON
COLOR KILL ON
FIL.SYS
COLOR.SYS
COLOR SYSTEM
VOL.FIL
VOLUME FILTER
VIF.SYS
VIF SYSTEM
SIF.SYS.SW
VIDEO.SW
VIDEO SWITCH
R/B G.BAL
R/B ANGLE
R-Y/B-Y ANGLE
CD MODE
MENU.02
MENU.03
MENU.04
MENU.05
MENU.06
(continued)
10
SERVICE MANUAL
GREY MODE
GREY MODE
V.SETUP
VERTICAL SETUP
BLANK.DEF
BLANK DEFEAT
BRT.ABL.TH
RGB TEMP
BRT.ABL.DF
MID.STP.DF
FBP.BLK.SW
MENU.07
SWITCH
MENU.08
DIGITAL.OSD
OSD.CONT
10
OSD.CONTST
OSD.H.POS
22
H.FREQ
HORIZONTAL FREQUENCY
46
FM.GAIN
FM GAIN
C.KILL.OFF
AUDIO.SW
AUDIO SWITCH
T.DISBLE
G/Y ANGLE
G/Y ANGLE
COL KIL OP
CBCR-IN
YCBCR INPUT
Y-APF
PRE SHOOT
PRE-SHOOT WIDTH
WPL OPE
DC REST
LUMA DC RESTORATION
BK STR STA
BK STR GAN
MENU.09
MENU.10
MENU.11
OVER MD SW
Y GAMMA
FSC C.SYNC
VBLK SW
SND TRAP
SOUND TRAP
HALF TONE
HALF T SW
TST VERSET
MENU.12
E/W DC
E/WEAST/WEST
32
E/W AMP
E/W
32
(continued)
11
SERVICE MANUAL
E/W TILT
E/W
32
E/W C TOP
E/W
E/W C BOTM
E/W
E/W TEST
E/W TEST
HSIZE COMP
IF TEST 3B
3dB IF TEST
V.LEV ADJ
MENU.13
OV MOD LEV
PRE/OVER
PRE/OVER-SHOOT ADJUSTMENT
C.VCO SW
C.VCO ADJ
MENU.14
VNSYNC
TINT.THROU
0
TINT THROUGH
HLOCK.VDET
MENU.15
OPT.1CHIP
OPTION 1CHIP
OPT.VIDEO
OPTION VIDEO
OPT.DVD
OPTION DVD
OPT.AV1AV2
OPTION AV1/AV2
OPT.AV3
OPTION AV3
OPT.S-VHS
OPTION S-VHS
OPT.YUV
OPTION YUV
OPT.COMB
OPTION COMB
OPT.BYPASS
OPTION BYPASS
OPT. VM
OPTION VM
OPT.BLUEBK
OPTION BLUEBK
OPT.V-CHIP
OPTION V-CHIP
OPT.CCD
OPTION CCD
OPT.CLOCK
OPTION CLOCK
OPT.P-ON
OPTION
SRCH.SPEED
SEARCH SPEED
ROM .CORREC
ROM CORRECTION
OPT.BTSC
OPTION BTSC
OPT.AV-INP
OPTION AV-INP
OPT.BBE
OPTION BBE
OPT. DVD-IN
SUB.BASS
OPTION DVD-IN
SUB BASS
SUB.TREBLE
SUB TREBLE
MENU.16
MENU.17
(continued)
12
SERVICE MANUAL
MENU.18
LOUNDNESS
LOUDNESS
FM/AM.PRES
FM/AM PRESETTING
63
SCART.PRES
39
SCART.VOL
SCART VOLUME
117
OPT.AVC
OPTION AVC
AVC.DECAY
BBE.BASS
BBE BASS
32
BBE.TREBLE
BBE TREBLE
32
Notes:
The data sheet may differ dependent on different CRTs for the same model.
13
SERVICE MANUAL
Inspect digital audio output: When playing a disc, connect a signal cable to the coaxial output
terminal. Press the SETUP button on the remote control and set AUDIO OUT in the SETUP
menu to SPDIF/SOURCE CODE. Then start playback with the PLAY button and the following
diagram will be displayed with waveform amplitude of 0.750.25Vpp on the oscilloscope. After
inspection, set AUDIO OUTto ANALOG.
b.
Connect the OUT terminal on the DVD130A to the IN terminal on the TV and shift the TV to the DVD
mode. After power-on for several seconds, the TV should display the preset LOGO picture on the
screen, which should be smooth and distort-free with normal color. Press the OPEN/CLOSE button
on the remote control to open the disc tray. Place the disc on the disc tray. Press the PLAY button
and play should begin after several seconds. The color and sound should be normal, and picture
should be smooth and distortionless.
c.
With a CD disc played, the TV should display the preset LOGO picture on the screen. The color
and sound should be normal, and picture should be smooth and distortionless.
14
SERVICE MANUAL
15
SERVICE MANUAL
SERVICE MANUAL
17
SERVICE MANUAL
DVD130A
EEPROM
MODULE
2X16M SDRAM
CS4955-CD
MT1336E
+DJ-100
Sanyo
Pickup head
24C01
SPDIF
TV
74HCU04
MT1369AE
CS4340
Audio DAC
L
BA5954
S-VIDEO
NJM4558M
Audio Amp
8M FLASH
L-out
R-out
Power Supply
18
SERVICE MANUAL
Position
Type
CH04T1227
Function Description
D701
D702
AT24C08
EEPROM
N101
LA76835
NV01
KA2192B
N301
LA7840
N191
TDA7057AQ
NN01
TDA9808T
Audio IF demodulator
NN02
MSP3410G
N503
LM7805
Tri-pin regulator
10
NK01
HEF4053
11
U101
TDQ-3B8/136
Tuner
Microcontroller
19
SERVICE MANUAL
5.2.2. The DVD130A mainly uses the following ICs and assemblies.
Position
Type
Function Description
MPEG board
U1
MT1336E
RF amplifier
U2
BA5954FM
U3
MT1369AE
MPEG decoder
U5
74HCU04
Enhancement drive
U7
8M FLASH
Flash memory
U9
NJM4558M
Sound amplifier
U10
24C01
1K EEPOM
U13
CS4340
U14
CS4955-CD
Video encoder
10
U17
16M SDRAM
Dynamic EEPROM
DJ-100
20
SERVICE MANUAL
SERVICE DATA
SERVICE DATA FOR TV UNIT
TECHNICAL DATA OF KEY ICS
CH04T1227 (D701)
8-Bit Single Chip Microcontroller
1. Overview
The LC86F344BA are 8-bit single chip microcontrollers with the following on-chip functional blocks:
-CPU:Operable at a minimum bus cycle time of 0.424s
-On-chip ROM capacity
Program ROM:32K/28K/24K/20K/16K bytes
CGROM:16K bytes
-On-chip ROM capacity: 512 bytes
-OSD RAM: 3529 bits
-Closed-Caption TV controller and the on-screen display controller
-Closed-Caption data slicer
-Four channels6-bit AD Converter
-Three channels7-bit PWM
-16-bit timer/counter,14-bit base timer
-IIC-bus compliant serial interface circuit (Multi-master type)
-ROM correction function
-11-source 8-vectored interrupt system
-Integrated system clock generator and display clock generator
Only one Xtal oscillator (32.768kHz) for PLL reference is used for both generators
TV control and the Closed Caption function
All of the above functions are fabricated on a single chip.
21
SERVICE MANUAL
Fig. 9
3. Refer to Table 4 about Functions and Service Data of the ICs Pins.
22
SERVICE MANUAL
AT24C08 (D702)
EEPROM
1. Features
Data EEPROM internally organized as 1024/2048 bytes
and 64/128 pages16 bytes
Page protection mode, flexible page-by-page hardware
write protection
- Additional protection EEPROM of 64/128 bits, 1 bit per
data page
- Protection setting for each data page by writing its
protection bit
- Protection management without switching WP pin
Low power CMOS
Vcc=2.7 to 5.5V operation
Two wire serial interface bus, I2C-Bus compatible
Filtered inputs for noise suppression with Schmitt trigger
Clock frequency up to 400 kHz
High programming flexibility
- Internal programming voltage
- Self timed programming cycle including erase
- Byte-write and page-write programming, between 1 and 16 bytes
- Typical programming time 6 ms(<10ms) for up to 16 bytes
High reliability
- Endurance 106 cycles1)
- Data retention 40 years1)
- ESD protection 4000 V on all pins
8 pin DIP/DSO packages
Available for extended temperature ranges
- Industrial:
-40 to +85
- Automotive:
-40 to +125
3. Block Diagram
Fig.10
4. Refer to Table 5 about Functions and Service Data of AT24C08s Pins.
23
2. Pin Configuration
SERVICE MANUAL
KA2192B (NV01)
TV/Video Switch Circuit
1. Features
The TV/Video switch circuit KA2192B (NY01) is an electronic switch circuit controlling four sets of audio
signal inputs, three sets of video signal inputs, two sets of Y/C separation signals inputs, one set of video
signal output, one set of Y/C separation signal output and one set of audio signal output.
2. Block Diagram
Fig.11
3. Value Table
Level for Control Terminal
Switchover Mode
(15)
(16)
TV
AV1
SVHS
AV2
24
SERVICE MANUAL
LA7840 (N301)
Vertical Deflection Output Circuit
1. Features
Low power dissipation due to built-in pump-up circuit
Vertical output circuit
Thermal protection circuit built in
Excellent crossover characteristics
DC coupling possible
2. Block Diagram
Fig. 12
25
SERVICE MANUAL
TDA7057AQ (N191)
28W Stereo BTL Audio Output Amplifier with DC Volume Control
1. Features
DC volume control
Few external components
Mute mode
Thermal protection
Short-circuit proof
No switch-on and switch-off clicks
Good overall stability
Low power consumption
Low HF radiation
ESD protected on all pins.
2. General Description
The TDA7057AQ is a stereo BTL output amplifier
with DC volume control. The device is designed
for use in TVs and monitiors, but is also suitable
for battery-fed portable recorders and radios.
Missing Current Limiter (MCL)
A MCL protection circuit is built-in. The MCL
circuit is activated when the difference in current
between the output terminal of each amplifier
exceeds 100mA (typical 300 Ma). This level of
100mA allows for single-ended headphone
applications.
3. Block Diagram
26
SERVICE MANUAL
HEF4053 (NK01)
Triple 2-channel Analog Multiplexer/Demultiplexer
1. Description
The HEF4053 is a triple 2-channel analog
multiplexer/demultiplexer with a common enable
input (E). Each multiplexer/ demultiplexer has two
independent inputs/ outputs (Y0 and Y1), a
common input/ output (Z), and select inputs (Sn).
Each also contains two-bidirectional analog
switches, each with one side connected to an
independent input/output (Y0 and Y1) and the
other side connected to a common
input/output(Z).
2. Block Diagram
Channel
On
Yon-Zn
Yin-Zn
none
Notes
H=HIGH state (the more positive voltage)
L=LOW state (the less positive voltage)
X=STATE is immaterial
27
SERVICE MANUAL
TDA9808T
SINGLE STANDARD VIF-PLL WITH QSS-IF AND FM-PLL DEMODULATOR
1. Features
5V supply voltage (9V supply voltage for
TDA9808T (DIP20) only)
Applicable for IFs (lntermediate Frequencies) of
38.9MHz, 45.75MHz and 58.75 MHz
Gain controlled wide band Video IF (VIF)amplifier (AC-coupled)
True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics,
excellent pulse response)
Robustness for over-modulation better than 105%
due to Phase Locked Loop (PLL)-bandwidth control
at negative modulated standards
VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector
Tuner AGC with adjustable TakeOver Point (TOP)
Automatic Frequency Control (AFC) detector
without extra reference circuit
AC-coupled limiter amplifier for sound intercarrier
signal
Alignment-free FM-PLL demodulator with high
linearity
Sound IF (SIF) input for single reference Quasi
Split
Sound (QSS) mode (PLL controlled); SIF AGC
detector for gain controlled SIF amplifier, single
reference QSS mixer for high performance
Electrostatic Discharge (ESD) protection for all
pins.
28
2. General Description
The TDA9808T is an integrated circuit for
single standard (negative modulated) vision
IF signal processing and FM demodulation,
with single reference QSS-IF in TV and VTR
sets.
SERVICE MANUAL
3. Block Diagram
29
SERVICE MANUAL
MSP34X0G
MULTISTANDARD SOUND PROCESSOR FAMILY
Other processed standards are the Japanese
Release Note: Revision bars indicate significant
FM-FM multiplex standard (EIA-J) and the
changes to the previous edition. The hardware
FM Stereo Radio standard.
and software description in this document is
valid for the MSP34X0G version B5 and following
versions.
1. Introduction
The MSP34X0G family of single-chip
Multistandard Sound Processors covers
the sound processing of all analog
TV-Standards worldwide, as well as the
NICAM digital sound standards. The full TV
sound processing, starting with analog sound IF
signal-in, down to processed analog AF-out, is
performed on a single chip. Figure 10 shows a
simplified functional block diagram of the
MSP34X0G.
This new generation of TV sound processing ICs
now includes versions for processing the
multichannel television sound (MTS) signal
conforming to the standard recommended by the
Broadcast Television Systems Committee
(BTSC). The DBX noise reduction, or
alternatively MICRONAS Noise Reduction
(MNR) is performed alignment free.
2. Block Diagram
30
SERVICE MANUAL
Function Description
Voltage
of
Pin (V)
Measure with
red probe
while
grounding
black probe.
Measure with
black probe
while
grounding
red probe.
2.33
810
712
2.36
975
675
IF AGC filter
2.6
860
718
1.95
680
IF signal input
2.89
780
693
IF signal input
2.89
778
712
IF circuit ground
5.04
500
280
1.98
910
713
10
11
3.65
910
617
4.71
1560
640
12
4.41
1542
667
13
3.68
945
577
14
1.43/0
920
700
15
1.46/0
913
701
16
1.44/0
906
700
17
0.02/0
780
683
18
8.28
525
500
19
2.81
780
671
20
2.79
780
670
21
2.7
780
670
22
1.85
830
696
23
2.45
710
672
24
2.64
782
702
25
5.27
350
350
26
2.72
815
708
27
0.72
700
653
28
0.91
785
707
29
1.74
746
700
30
0.93
825
608
31
0.94
330
330
32
4.17
567
33
0
(continued)
31
SERVICE MANUAL
34
35
775
712
2.05
776
712
3.41
810
724
800
706
signal input
36
37
Clamp filter
38
2.83
790
716
39
APC filter
1.89
760
697
40
2.76
730
662
41
42
2.93
800
711
4.99
285
280
44
2.76
805
707
terminal (NC)
45
3.16
762
700
46
2.9
397
397
47
3.58
840
712
48
4.29
526
526
49
4.29
530
530
50
2.47
820
698
51
2.23
800
701
52
Sound IF output
1.94
809
697
53
2.41
808
691
54
Sound IF input
3.17
824
712
Pin
No.
Not connected
1.50
11.8
4.40
Not connected
1.43
12.1
5.20
(continued)
32
SERVICE MANUAL
4.70
11.6
6.20
4.47
12.1
6.00
Ground
0.00
0.00
0.00
1.78
12.6
5.1
2.88
12.0
4.91
Supply voltage
5.31
7.90
3.72
0.02
9.70
5.34
10
2.47
4.90
5.08
11
2325
6.70
4.59
12
0.015
8.86
3.81
13
Reset
5.27
4.67
1.88
14
3.87
1.11
4.98
15
3.53
12.3
4.50
16
0.01
9.76
15.0
17
5.07
15.4
18.1
18
4.62
17.4
18.4
19
0.015
3.92
3.29
20
0.014
3.95
3.71
21
0.015
3.19
3.66
22
0.015
6.50
3.67
23
Mute
0.015
18.7
17.62
24
Standby control
0.015
1.43
7.30
25
Not connected
1.23
9.50
6.65
26
4.61
13.0
6.95
27
0.014
3.713
3.42
28
5.19
12.2
5.32
29
Not connected
5.30
12.4
5.49
30
Not connected
5.30
12.6
5.42
31
Not connected
0.01
12.7
5.35
32
Not connected
0.01
12.7
5.30
33
5.30
12.7
6.59
34
5.30
11.8
6.36
35
5.30
11.4
6.33
36
5.29
11.2
6.33
33
SERVICE MANUAL
Function Description
Voltage of
Pin (V)
Measure with
black probe while
grounding red
probe.
Address terminal 0
Address terminal 1
Address terminal 2
Ground
Data line
4.8
11.7
5.25
Clock line
4.8
11.72
5.5
Supply voltage
6.7
Function Description
Voltage
of
Pin (V)
Measure with
red
probe
while
grounding
black probe.
Measure with
black probe
while
grounding
red probe.
L TV IN
5.67
6.45
3.53
R TV IN
5.67
6.45
3.74
TV IN
5.67
6.57
4.02
LS IN
5.69
6.45
3.66
RS IN
5.69
6.47
3.72
SY IN
5.54
6.85
3.96
TV SW
0.00
0.00
0.00
SC IN
5.54
6.75
3.85
L1 IN
5.69
6.43
3.36
10
R1 IN
5.70
6.37
3.72
11
E1 IN
5.56
6.85
3.96
12
L2 IN
5.70
6.43
3.87
(continued)
34
SERVICE MANUAL
13
R2 IN
5.70
6.33
3.67
14
E2 IN
5.56
6.83
4.01
15
SW1
5.25
6.84
5.59
16
SW2
5.25
6.85
5.59
17
MUTE
0.00
0.00
0.00
18
Y OUT
3.89
1.418
1.51
19
GND
0.00
0.00
0.00
20
C OUT
3.84
0.96
1.15
21
R OUT
4.37
0.63
3.35
22
L OUT
4.37
6.61
3.31
23
NC
0.06
6.71
3.97
24
Y IN
5.55
6.70
4.18
25
SYNC CLAMP
3.47
6.80
5.75
26
C IN
5.57
6.67
4.07
27
NC
0.25
6.69
4.13
28
VCC
9.38
0.34
0.33
29
VCC
9.38
0.31
0.30
30
VOUT
3.17
6.47
0.48
Ground Resistance ()
Function Description
Voltage of
Pin (V)
Ground
14.8
365
360
24.5
584
Reference voltage
2.24
660
600
2.23
800
672
Supply voltage
24
770
465
Vertical
2.25
1167
638
flyback
pulse
output
terminal
35
SERVICE MANUAL
Pin
No.
Function Description
Voltage
(V)
Positive
(K)
Resistance
Negative
(K)
Resistance
0.95
6.85
6.15
Not connected
0.00
2.38
12.59
6.51
Supply voltage
17.48
0.47
0.47
2.37
12.5
6.51
Ground
0.00
0.00
0.00
0.95
6.85
0.15
8016
6.46
5.59
Ground
0.00
0.00
0.00
10
8.25
6.46
5.59
11
8.24
6.46
5.59
12
Ground
0.00
0.00
0.00
13
8.13
6.46
5.59
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
36
SERVICE MANUAL
Ground
Pin
No.
1
477
Function Description
Reference
Positive
Negative
Voltage (V)
Resistance (20K)
Resistance(20K)
3.23
7.2
6.03
3.23
7.2
5.99
0.99
6.7
5.85
2.53
7.9
6.3
3.29
7.8
6.17
2.34
7.2
5.86
Filter
1.79
7.9
6.29
Video output
2.18
7.6
6.09
10
2.03
7.7
6.17
11
2.81
5.2
4.99
12
RFAGC output
0.04
13
3.05
7.9
6.2
14
2.76
15
2.76
16
Ground
0.001
0.00
17
AGC filter
3.13
7.9
6.11
18
2.1
2.7
19
3.2
2.1
6.27
20
3.2
6.27
6.1
Function Description
Reference Voltage
Positive Resistance
Negative Resistance
(V)
(20K)
(20K)
TP
NC
0.16
7.3
5.3
AVD-GL-OUT
NC
2.52
6.8
5.51
D-CTR-I/O-1
NC
0.01
7.3
5.57
D-CTR-I/O-0
NC
0.01
7.2
5.58
ADR-SEL
4.79
0.7
4.54
37
(Continued)
SERVICE MANUAL
STANDBYQ
4.79
0.7
4.54
I2C-CL
3.56
4.44
I2C-DA
3.9
4.44
I2S-CL
NC
2.36
7.2
6.24
10
I2S-WS
NC
2.4
7.2
6.24
11
I2C-DA-WT
NC
2.36
7.2
6.24
12
I2S-DA-IN1
NC
0.07
7.2
5.29
13
ADR-DA
NC
0.07
7.2
5.59
14
ADR-WS
0.07
7.2
5.59
15
ADR-CL
0.07
7.2
5.59
16
DVSVP
4.79
0.7
4.54
17
DVSS
0.01
0.001
0.00
18
I2S-DA-IN2
0.07
7.3
5.31
19
NC
20
RESETQ
4.76
5.24
21
DACA-R
NC
0.8
3.5
3.54
22
DACA-L
NC
0.08
3.5
3.52
23
VREF-I
0.01
0.001
0.00
24
DACM-R
0.17
3.5
3.52
25
DACM-L
0.08
3.5
3.54
26
DACM-SVB
NC
0.18
3.6
3.6
27
SC2-OUT-R
NC
3.82
7.1
5.92
28
SC2-OUT-L
NC
3.82
7.1
5.91
29
CREF 1
0.01
0.001
0.00
30
SC1-OVT-R
3.82
7.1
5.91
31
SC1-OUT-L
3.82
7.1
5.92
32
SAPL-A
7.19
7.1
6.04
33
AHVSUP
1.3
4.59
34
CAPL-M
7.2
7.1
6.04
35
AHVSS
7.2
7.1
0.00
36
ABNDC
0.01
0.001
6.02
37
SC3-ZN-L
NC
3.74
7.1
6.1
38
SC3-IN-R
NC
3.77
7.1
6.1
39
SC2-IN-L
NC
3.77
7.1
6.1
40
SC2-IN-R
NC
3.77
7.1
6.1
41
SC1-IN-L
3.77
7.1
6.1
42
SC1-IN-R
3.77
7.1
6.1
43
VREFTOP
2.6
1.6
1.63
44
WONO-IN
3.78
6.1
45
AVSS
0.01
0.001
0.00
46
AVSVP
4.9
0.7
4.53
47
ANA-IN1+
1.53
7.3
5.27
48
ANA-IN1-
1.53
7.3
5.26
49
ANA-IN2+
0.09
7.3
5.27
NC
NC
38
(Continued)
SERVICE MANUAL
50
TESTEN
0.01
0.001
0.00
51
XTAL-2N
2.35
6.8
5.27
52
XTAL-OUT
2.36Hs
6.8
5.3
39
SERVICE MANUAL
40
SERVICE MANUAL
41
SERVICE MANUAL
42
SERVICE MANUAL
V431
V431 B
V432
V513
V432
43
V513
SERVICE MANUAL
SERVICE MANUAL
High-speed ECC logic capable of correcting one error per each P-codeword or Q-codeword
Automatic sector mode and form detection
Automatic sector header verification
8-bit counter for decode completion on ck
Automatically repeated error corrections
8-bit C2 Pointer counter
Decoder Error Notification Interrupt that signals various decoder errors
Provide error correction acceleration
Buffer Memory Controller
Supports 16Mb/32Mb/64Mb SDRAM
Supports 16-bit/32-bit SDRAM data bus interface
Build in a DRAM interface programmable clock to optimize the DRAM performance
Provide the self-refresh mode SDRAM
Programmable DRAM access cycle and refresh cycle timings
Block-based sector addressing
Programmable buffering counter for buffer status tracking
Maximum DRAM speed is 133MHz
Support 5/3.3-Volt. DRAM Interface
Video Decode
Decodes MPEG1 video and MPEG2 main levelmain profile video720/480 and 720576
Maximum input bit-rate of 15Mbits/sec
Smooth digest view function with 1, P and B picture decoding
Baseline, extended-sequential and progressive JPEG image decoding
Support CD-G titles
Video/SPU/HLI Processor
Arbitrary ratio vertical/horizontal scaling of video, from 0.25X to 256X
256/16/4/2-color bitmap format OSD
256/16 color RLC format OSD
Automactic scrolling of OSD image
Warp mode of OSD can reduce memory required
Dual Sub-picture decoder
Provides 4-color/3232-pixel hardware cursor
Fade-inFade outand Wipe functions as specified in the DVD Audio Specification and other slide show
transition effects
Audio Processing
- Decoder format supports.
- Dolby Digital (AC-3) decoding
- DTS decoding
- MLP decoding for DVD-Audio
- MPEG-1 layer 1/layer 2 audio decoding
46
SERVICE MANUAL
Symbol
Type
Description
IREF
Analog Input
PLLVSS
Ground
LPIOP
Analog Output
LPION
Analog Output
LPFON
Analog Output
LPFIP
Analog Input
LPFIN
Analog Input
LPFOP
Analog Output
JITFO
Analog Output
10
JITFN
Analog Input
11
PLLVDD3
Power
12
FOO
Analog Output
13
TRO
Analog Output
14
TROPENPWM
Analog Output
PWMOUT 2
Analog Output
16
DVD2
Power
2.5V power
17
DMO
Analog Output
SERVICE MANUAL
18
FMO
Analog Output
19
FG
Inout, Pull Up
20
DVSS
Ground
Ground
21
HIGHA0
Inout, Pull Up
Microcontroller address 8
22
HIGHA1
Inout, Pull Up
Microcontroller address 9
23
HIGHA2
Inout, Pull Up
Microcontroller address 10
24
HIGHA3
Inout, Pull Up
Microcontroller address 11
25
HIGHA4
Inout, Pull Up
Microcontroller address 12
26
HIGHA5
Inout, Pull Up
Microcontroller address 13
27
DVSS
Ground
Ground
28
HIGHA6
Inout, Pull Up
Microcontroller address 14
29
HIGHA7
Inout, Pull Up
Microcontroller address 15
30
AD7
Inout
Microcontroller address/data 7
31
AD6
Inout
Microcontroller address/data 6
32
AD5
Inout
Microcontroller address/data 5
33
AD4
Inout
Microcontroller address/data 4
34
DVDD3
Power
3.3V power
35
AD3
Inout
Microcontroller address/data 3
36
AD2
Inout
Microcontroller address/data 2
37
AD1
Inout
Microcontroller address/data 1
38
AD0
Inout
Microcontroller address/data 0
39
IOA0
Inout, Pull Up
40
IOA1
Inout, Pull Up
41
DVDD2
Power
2.5V power
42
IOA2
Inout, Pull Up
43
IOA3
Inout, Pull Up
44
IOA4
Inout, Pull Up
45
IOA5
Inout, Pull Up
46
IOA6
Inout, Pull Up
47
IOA7
Inout, Pull Up
48
A16
Output
Flash address 16
49
A17
Output
Flash address 17
50
IOA18
Inout
51
KOA19
Inout
52
DMVSS
Ground
53
DMVDD3
Power
54
ALE
Inout, Pull Up
55
LOOE#
Inout
56
LOWR#
Inout
57
LOCS#
Inout, Pull Up
58
DVSS
Ground
Ground
59
UP1-2
Inout, Pull Up
60
UP1-3
Inout, Pull Up
61
UP1-4
Inout, Pull Up
SERVICE MANUAL
62
UP1-5
Inout, Pull Up
63
UP1-6
Inout, Pull Up
64
DVDD3
Power
65
UP1-7
Inout, Pull Up
66
UP3-0
Inout, Pull Up
67
UP3-1
Inout, Pull Up
3.3V power
68
INT0#
Inout, Pull Up
69
IR
Input
70
DVDD2
Power
2.5V power
71
UP3-4
Inout
72
UP3-5
Inout
73
UWR#
Inout, Pull Up
74
URD#
Inout, Pull Up
75
XTALI
Input
76
XTALO
Output
Crystal output
77
DVSS
Ground
Ground
78
RD7
Inout
DRAM data 7
79
RD6
Inout
DRAM data 6
80
RD5
Inout
DRAM data 5
81
RD4
Inout
DRAM data 4
82
DVDD2
Power
2.5V power
83
RD3
Inout
DRAM data 3
84
RD2
Inout
DRAM data 2
85
RD1
Inout
DRAM data 1
86
RD0
Inout
DRAM data 0
87
RWE#
Output
88
CAS#
Output
89
RAS#
Output
90
RCS#
Output
91
BA0
Output
92
DVDD3
Power
3.3V power
93
RD15
DRAM data 15
94
RD14
DRAM data 14
95
RD13
DRAM data 13
96
RD12
DRAM data 12
97
DVSS
Ground
Ground
98
RD11
DRAM data 11
99
RD10
DRAM data 10
100
RD9
DRAM data 9
101
RD8
DRAM data 8
102
VPVDD3
Power
103
VCOCIN
Analog Input
104
VPVSS
Ground
105
DVSS
Ground
Ground
(Continued)
49
SERVICE MANUAL
106
CLK
Output
DRAM clock
107
CLE
Output
108
RA11
Output
109
RA9
Output
DRAM address 9
110
RA8
Output
DRAM address 8
111
DVDD2
Power
2.5V power
112
RA7
Output
DRAM address 7
113
RA6
Output
DRAM address 6
114
RA5
Output
DRAM address 5
115
RA4
Output
DRAM address 4
116
DVSS
Ground
Ground
117
DQM1
Output
118
DQM0
Output
119
BA1
Output
120
RA10
Output
DRAM address 10
121
DVDD2
Power
2.5V power
122
RA0
Output
DRAM address 0
123
RA1
Output
DRAM address 1
124
RA2
Output
DRAM address 2
125
RA3
Output
DRAM address 3
126
DVSS
Ground
Ground
127
RD31
DRAM data 31
128
RD30
DRAM data 30
129
RD29
DRAM data 29
130
RD28
DRAM data 28
131
DVDD3
Power
3.3V power
132
RD27
DRAM data 27
133
RD26
DRAM data 26
134
RD25
DRAM data 25
135
RD24
DRAM data 24
136
DVSS
Ground
Ground
137
DQM3
Output
138
DQM2
Output
139
RD23
DRAM data 23
140
RD22
DRAM data 22
141
DVDD2
Power
2.5V power
142
RD21
DRAM data 21
143
RD20
DRAM data 20
144
RD19
DRAM data 19
145
RD18
DRAM data 18
146
DVSS
Guound
Ground
147
RD17
DRAM data 17
148
RD16
DRAM data 16
149
ABCK
Output
SERVICE MANUAL
(1) Audio left/right channel clock
150
ALRCK
151
DVDD3
Power
3.3V power
152
ASDATA0
153
ASDATA1
154
ASDATA2
155
ACLK
Inout
156
APVDD8
Power
157
APVSS
Ground
158
SPDIE
Output
SPDIF output
159
MC-DAT
Input
160
BLANK#
Inout
161
VSYN
Inout
Vertical sync/GPIO16
162
HSYN
Inout
Horizontal sync/GPIO15
163
DVSS
Ground
Ground
164
YUV0
Output
165
YUV1
Output
166
YUV2
Output
167
YUV3
Output
168
YUV4
Output
169
DVDD2
Power
2.5V power
170
YUV5
Output
171
YUV6
Output
172
YUV7
Output
173
ICE
174
PRST
175
DVSS
Ground
Ground
176
VFO13
Output
177
IDGATE
Output
178
DVDD3
Power
3.3V power
179
UDGATE
Output
180
WOBSI
Input
181
SDATA
Output
182
SDEN
Output
183
SLCK
Output
184
BDO
185
DVDD3
Power
3.3V power
186
PDMVDD3
Power
187
PWMVREF
Analog Input
188
PWM2VREF
Analog Input
189
PDMVSS
Ground
190
ADCVSS
Ground
191
ADIN
Analog Input
SERVICE MANUAL
192
RFSUBI
Analog Input
193
TEZISLV
Analog Input
194
TEI
Analog Input
195
CSO
Analog Input
196
FEI
Analog Input
197
RFLEVEL
Analog Input
198
RFRP-DC
Analog Input
199
RFRP-AC
Analog Input
200
RFRPSLV
Analog Input
201
HRFZC
Analog Input
202
ADCVDD8
Power
203
RADTSI VP
Analog Output
204
SCON
Analog Output
205
SCOP
Analog Output
206
RFDTSLVN
Analog Output
207
RFIN
Analog Input
208
RFP
Analog Input
52
SERVICE MANUAL
MT1336E
RF amplifier
1.General Description
MT1336 is a high performance CMOS analog front-end IC for both CD_ROM driver up to 48XS and
DVD_ROM driver up to 16XS. It also supports DVD_RAM lead up to 4XS Version 2. It contains servo
amplifiers to generate focusing error, 3-beam tracking error, 1 beam radial push-pull signal, RF level and
SBAD for servo functions. It also includes DPD tracking error signal for DVD_ROM application. For
DVD_RAM disks, there are also Differential Push-Pull (DPP) method for generating tracking signal and
Differential Astigmatic Detection (DAD) for processing focusing signal. Programmable equalizer and AGC
circuits are also incorporated in this chip to optimize read channel performance. In addition, this chip has
dual automatic laser power control circuits for DVD-ROM (DVD-RAM) and CD-ROM separately and
reference voltage generators to reduce external components. Programmable functions are implemented by
the access of internal register through bi-directional serial port to configure modes selection.
2. Features
RF equalizer with programmable fc from 3MHz to 70MHz and programmable boost from 3dB to 13dB.
MT1336 supports at least eight different kinds of pick-up heads with versatile input configuration for both
RF input stages and servo signal blocks.
3 beams tracking error signal generator for CD_ROM application.
One beam differential phase tracking error (DPD) generator for DVD_ROM application.
Differential push pull tracking error (DPP) generator for DVD_RAM application.
Focusing error signal generator for CD-ROM, DVD-ROM and DVD-RAM (DAD method).
RF level signal generator.
Sub-beam added signal for 3 beams CD-ROM.
One beam push-pull signal generator for central servo application.
High speed RF envelop detection circuit with bandwidth up to 400KHz for CD-ROM.
Defect and Blank detection circuits.
Dual automatic laser power control circuits with programmable level of LD monitor voltage.
Vref=1.4V voltage and V2ref=2.8V voltage generators.
V20=2.0V voltage for pick-up head reference.
Bi-directional serial port to access internal registers.
128-pin LQFP.
53
SERVICE MANUAL
3. block Diagram
54
SERVICE MANUAL
Symbol
Type
Description
Digital Output
LQFP128
RF Flag Interface
23
DEFECT
RF SIO interface
56
SCLK
Digital Input
58
SDEN
Digital Input
59
SDATA
Digital IO
RF serial data IO
60
RST
Digital Input
Reset(active high)
55
XCK16M
Digital Input
RF SERVO interface
40
UOG ATE
Digital Input
41
GGATE
Digital Input
38
VFO13
Digital Input
100
DVDA
Analog Input
99
DVDB
Analog Input
98
DVDC
Analog Input
97
DVDD
Analog Input
95
DVDRFIN
Analog Input
96
DVDRFIP
Analog Input
94
CDA
Analog Input
93
CDB
Analog Input
92
CDC
Analog Input
91
CDD
Analog Input
90
OSN
Analog
89
OSP
Analog
85
CEQP
Analog
84
CEQN
Analog
88
RFGC
Analog
87
RFGCU
Analog
86
RFGCU
Analog
101
MA
Analog Input
RF
SERVICE MANUAL
102
MB
Analog Input
103
MC
Analog Input
104
MD
Analog Input
105
SA
Analog Input
106
SB
Analog Input
110
SC
Analog Input
111
SD
Analog Input
108
IR
Analog
119
AGC1
Analog
121
AGC2
Analog
122
AGC3
Analog
127
RFSUBO
Analog
Output
V OBSO
Digital Output
RFOP
Analog
Output
RF positive output
PFON
Analog
Output
RF negative output
TRACKING ERROR
32
DPFN
Analog
33
DPFO
Analog
61
DPDMUTE
Digital Input
116
TNI
Analog Input
115
TPI
Analog Input
21
TEO
Analog Output
CDFOP
Analog Input
113
CDFON
Analog Input
18
FEO
Analog Output
19
LVL
Analog Output
RF level output
20
CSO
Analog Output
124
MDI1
Analog Input
125
LDO1
Analog Output
123
MDI2
Analog Input
ALPC
SERVICE MANUAL
126
LDO2
Analog Output
26
CRTP
Analog
27
CRTPLP
Analog
25
HRFRP
Analog output
24
LRFRP
Analog output
67, 69
AVDD
Power
65, 73
AGND
GND
64
AVDD
Power
62
AGND
GND
109
AVDD
Power
107
AGND
GND
RF path GND
114
SVDD
Power
Servo Power
117
SGND
GND
2,120
WAVDD
Power
128, 118
WAGND
GND
AVDDO
Power
AGNDO
GND
14
AVDDT
Power
12
AGNDT
GND
22
VDDP
Power
31
GNDP
GND
37, 54
VDD
Power
39, 57
GND
GND
RF RIPPLE
POWER
Master PLL filter power
GND for Master PLL filter
DPD Power
DPD GND
RF path Power
Servo GND
Wobble Power
Wobble GND
Power for RF output
GND for RF output
Power for trimming PAD
REFERENCE VOLTAGE
16
VREFO
Analog output
15
V2REFO
Analog output
17
V20
Analog output
ALPC TRIMMING
9
TM1
Analog input
10
TM2
Analog input
11
TM3
Analog input
13
TM4
Analog input
TRLP
Analog
SERVICE MANUAL
28
TRLPA
Analog
30
HTRC
Digital output
74
HALLSIN
Analog input
75
REFSIN
Analog input
76
SINPHI
Analog output
71
HALLCOS
Analog input
72
REFCOS
Analog input
70
COSPHI
Analog output
PCS
MON
Analog output
80
MOP
Analog output
66
VCON
Analog output
77
SWO
Analog output
78
SW2
Analog input
79
SW1
Analog input
IO0
43
IO1
44
IO2
45
IO3
46
IO4
47
IO5
58
SERVICE MANUAL
CS4334
Audio D/A Controller
1. Features
Complete
Stereo
DAC
System:
Interpolation, D/A, Output Analog Filtering
24-Bit Conversion
96 dB Dynamic Range
88 dB THD+N
PopguardTM Technology
Functionally
Compatible
with
CS4330/31/33
2. Description
The CS4334 family members are complete,
stereo digital-to-analog output systems including
interpolation, 1-bit D/A conversion and output
analog filtering in an 8-pin package. The
CS4334/5/6/7/8/9 support all major audio data
interface formats, and the individual devices differ
only in the supported interface format.
The CS4334 family is based on delta-sigma
modulation, where the modulator output controls
the reference voltage input to an ultra-linear
analog low-pass filter. This architecture allows for
infinite adjustment of sample rate between 2 kHz
and 100 kHz simply by changing the master clock
frequency.
The CS4334 family contains on-chip digital
de-emphasis, operates from a single +5V power
supply, and requires minimal support dircuitry.
These features are ideal for set-top boxes, DVD
players, SVCD players, and A/V receivers.
3. Block Diagram
Fig.18
59
SERVICE MANUAL
CS4955
Video Encoder
1. Features
Six DACs providing simultaneous
composite, S-Video, and RGB or Component
YUV outputs
Programmable DAC output currents for low
impedance (37.5 ) and high impedance
(150) loads.
Multi-standard support for NTSC-M,
NTSC-JAPAN, PAL (B, D, G, H, I, M, N,
Combination N)
ITU R.BT656 input mode supporting
EAV/SAV codes and CCIR601 Master/Slave
input modes
Programmable HSYNC and VSYNC timing
Multistandard Teletext (Europe, NABTS,
WST) support
VBI encoding support
Wide-Screen Signaling (WSS) support, EIA-J
CPX1204
NTSC closed caption encoder with interrupt
CS4955 supports Macrovision copy
protection Version 7
Host interface configurable for parallel or I2C
compatible operation
On-chip voltage reference generator
+3.3 V or +5V operation CMOS. low-power
modes, tri-state DACs
2. Description
The CS4954/5 provides full conversion from digital
video formats YCbCr or YUV into NTSC and PAL
Composite, Y/C (S-Video) and RGB, or YUV analog
video. Input formats can be 27 MHz 8-bit YUV, 8-bit
YCbCr, or ITU R.BT656 with support for EAV/SAV
codes. Video output can be formatted to be
compatible with NTSC-M, NTSC-J, PAL-B, D, G, H, I,
M, N, and combination N systems. Closed Caption is
supported in NTSC. Teletext is supported for NTSC
and PAL.
Six 10-bit DACs provide two channels for an S-Video
output port, one or two composite video outputs, and
three RGB or YUV outputs. Two-times oversampling
reduces the output filter requirements and
guarantees no DAC-related modulation components
within the specified bandwidth of any of the
supported video standards.
Parallel or high-speed I2C compatible control
interfaces are provided for flexibility in system
design. The parallel interface doubles as a general
purpose I/O port when the CS4954/5 is in I2C mode
to help conserve valuable board area.
Package:
CS4954CQ/CS4955CQ
3. Block Diagram
Fig. 19
60
48-Pin TQFP
SERVICE MANUAL
BA5954
Focus/tracking Coil and Feed Motor Drive
1. Functions
BA5954FM is a 4 channel driver for optical disc motor driver. Dual channel current feedback type
drivers are built in, in addition to dual channel motor drivers.
Wide dynamic range (4.0V (typ.) at PreVcc=12V, PVcc=5V, RL=8)
Separating Vcc into Pre+Power of sled motor, Power of loading motor and Power of actuator, can make
better power efficiency, by low supply voltage drive.
Level shift circuit built in.
Thermal-shut-down circuit built in.
Stand-by mode built in.
<Actuator driver>
Current phase lag influenced load inductance is little, because this type is current feedback.
< Sled motor driver >
Input pins consist of (+) and (-), therefore various input types are available such as differential input.
<Loading driver >
This is a single input linear BTL driver.
2. Pin Description
No.
Symbol
VINFC
Function
No.
Symbol
15
VOTK+
CFCerr1
16
VOTK-
CFCerr2
17
VOLD+
VINSL+
18
VOLD-
VINSL-
19
PGND
VOSL
Output of OP-amp
20
VNFTK
VNFFC
21
PVcc2
Vcc
22
PreGND
PVcc1
23
VINLD
10
PGND
24
CTKerr2
11
VOSL-
25
CTKerr1
12
VOSL+
26
VINTK
13
VOFC-
27
BIAS
14
VOFC+
28
STBY
Function
61
SERVICE MANUAL
NJM4558M
Sound Amplifier
1. General Description
The NJM4558/4559 integrated circuit are a dual high-gain
operational amplifier internally compensated and constructed
on a single silicon chip using an advanced epitaxial process.
Combining the features of the NJM741 with the close
parameter matching and tracking of a dual device on a
monolithic chip results in unique performance characteristics.
Excellent channel separation allow the use of the dual device
in single NJM741 operational amplifier applications providing
density. It is especially well suited for applications in
differential-in, differential-out as well as in potentiometric
amplifiers and where gain and phase matched channels are
mandatory.
2. Features
Operating Voltage
High Voltage Gain
High Input Resistance
Rackage Outline
Bipolar Technology
5. Package Outline
Fig. 20
( 4V18V )
( 100dB typ. )
( 5M typ. )
DIP8. DMP8. SIP8. SSOP8
3. Pin Configuration
Fig. 21
4. Equivalent Circuit (1/2 Shown)
Fig. 22
24C01
62
SERVICE MANUAL
1K EEPROM
3. Package Types
1. Features
Single supply with 5.0V operation
Low power CMOS technology
- 1 mA active current typical
- 10 A standby current typical at 5.0V
- 5A standby current typical at 5.0V
Organized as a single block of 128 bytes (1288)
or 256 bytes (2568)
2-wire serial interface bus, I2C compatible
100KHz compatibility
Self-timed write cycle(including auto-erase)
Page-write buffer for up to 8 bytes
2 ms typical write cycle time for page-write
Hardware write protect for entire memory
Can be operated as a serial ROM
ESD protection 3,000V
1,000,000 ERASE/WRITE cycles guaranteed
Data retention 200 years
8 pin DIP or SOIC package
Available for extended temperature ranges
- Automotive(E)
-40 to
+125
4. Block Diagram
2. Description
The Microchip Technology Inc. 24C01B and
24C02B are 1K bit and 2K bit Electrically Erasable
PROMs The devices are organized as a single block
of 1288 bit or 2568 bit memory with a 2-wire
serial interface. The 24C01B and 24C02B also have
page-write capability for up to 8 bytes of data. The
24C01B and 24C02B are available in the standard
8-pin DIP and an 8-pin surface mount SOIC package.
These devices are for extended temperature applications
only. It is recommended that all other applications use
Microchips 24LC01B/02B.
Pin Function Table
Name
Function
Vss
Ground
SDA
SCL
Serial Clock
WP
Vcc
NC
No Internal Connection
63
Fig. 23
SERVICE MANUAL
Pin No.
RF signal 0.9-1.5VP-P
2,5,14,64,67,69,109,114,120
16,41,70,82,111,121,141,169
25
U3 (MT1369AE) 11,34,53,64,92,102,131,151,
156, 178,185,186,202
U7 (8M FLASH)
U21 (BA5954)
33
12
14
Non-cyclical pulse
106
9,21
11,12,13,14,15,16,17,18
25
64
SERVICE MANUAL
1.3 The SMPS outputs voltage lower than the rated value.
65
SERVICE MANUAL
1.4 The SMPS outputs voltage higher than the rated value.
1.5 The power indicator lights, but the SMPS is still in the Standby mode.
2. Control System
2.1 The power indicator lights, but the CPU cannot enter the Operation mode
after power-on again.
66
SERVICE MANUAL
2.3
67
SERVICE MANUAL
68
SERVICE MANUAL
69
SERVICE MANUAL
4.2
5. Audio System
No sound
70
SERVICE MANUAL
Debugging begins.
AC power comes up to
the power PCB input
standard?
NO
YES
Supply power to the
power PCB separately.
NO
YES
Supply power to the
DEMO PCB after no
short circuit confirmed.
NO
Detect regulators or
diodes of the two sets of
power to get normal
voltage output.
YES
Connect the unit to a
computer and
program FLASH on
the DEMO PCB
Programming of
FLASH succeeded?
YES
NO
71
SERVICE MANUAL
A
Reset or power on again.
NO
NO
Access to FLASH
normally?
YES
SDRAM works normally?
NO
YES
YES
NO
Check connection
between FLASH and
MT1369. FLASH runs
fast enough?
Check connection
between SDRAM and
MT1369, and SDRAM
for normality.
YES
The TV encoder outputs
normally?
NO
YES
Check connections
between the video
filter/video AMP and the
TV.
NO
NO
YES
Check the signals
TRCLOSE and
TROPEN for normality.
YES
YES
YES
NO
72
NO
SERVICE MANUAL
NO
NO
NO
NO
YES
YES
YES
Check the signals SL+
and sL- for normality.
YES
Check connection to the
loader.
No disc.
NO
YES
NO
Check connection
between MT1369 and
BA5954 or check if
MT1369 works.
YES
Check the drive signals
F+ and F- for normality.
C
YES
Check the circuit
between the pickup
head and BA5954.
73
NO
SERVICE MANUAL
C
When reading a disc, laser on
OK?
NO
NO
YES
Check the collector
voltage of triode for
normality.
YES
NO
NO
NO
NO
YES
Check the circuit
between the laser head
and triode.
Discs placed?
NO
Laser off.
YES
Focus on OK?
NO
YES
Check signal from
MT1336 to FEO for
normality.
YES
YES
Check circuit between
MT1336's FEO and
MT1369.
Disk ID OK?
NO
YES
YES
Check the circuit
between MT1336 and
MT1369.
74
SERVICE MANUAL
D
Spindle revolves?
NO
NO
YES
Check the signals SP+ and
SP- for normality.
NO
YES
YES
Track on OK?
NO
NO
YES
MT1339 outputs correct TRSO
signal?
NO
YES
YES
YES
Check the circuits between
T+/T- and laser head.
Disk is ready?
NO
Check RF signal.
YES
75
NO
SERVICE MANUAL
NO
NO
YES
AUDIO DAC outputs
correctly?
NO
NO
Check connection
between MT1369 and
module, and the
peripheral circuit of IR,
VFD and drive IC.
YES
YES
Check connections to
audio filter, audio
amplifier, mute and
output.
NO
Check communication
between the
IR/VFD/control buttons
and MT1369 for
normality.
YES
YES
Debugging completed.
Check connections to
the remote control,
button matrix and VFD.
76
BTSC PCB
VCC
[ 1,2,3,4 ]
VCC
-P12V
[1]
-P12V
[1]
+P12V
(9)
+P12V
+12V
[4]
+12V
+5VV
R64
18K
+ C83
10u
CB92
J2
AUDIO
C74
-12V
0.1u
220p
LMAIN
[4]
A_MUTE
[ 1,2,3,4 ]
AGND
10k
LMAIN
R74
R75
A_MUTE
267k
10k
C77
2000p
L12
33UH/0307
CVBS
LCH
CVBS
LCH
CB82
A_MUTE
NJM4580
SSOP8
[4]
10u
RMAIN
R68
100
RMAIN
[4]
C76
10u
U9A
RCH
1
3
7
4
2
LMAIN
D
R66
C75
R67
5.1k
Q9
CB83
100P
100P
3904
+12V
(8)
AGND
R70
18K
SPDIF
J1
C79
-12V
SPDIFOUT
220p
4
R71
RMAIN
T_SC
6
5
C80
T_SC
[4]
10u
T_CVBS
10k
R76
C82
R77
VGND
267k
VGND
R73
100
L15
33UH/0307
SC
SY
RCH
CB87
A_MUTE
NJM4580
SSOP8
2000p
[ 1,2,3,4 ]
C81
10u
U9B
7
T_CVBS
[4]
R72
5.1k
T_SY
T_SY
[4]
Q10
CB88
100P
100P
10k
3904
+12V
(8)
S-video
ASPDIF
[2]
ASPDIF
L14
+5VV
+5VV
C114
10p
R105
75,1%
(OPEN0
R/Cr-OUT
C99
1
+12V
R108
200
C117
220p
C118
220P
FB4
HM102/0805
Q19
R/Cr
3906
100U
D5
L19
1.8uH,DIP
R87
200
C51
220p
C89
220P
1N4148
1N4148
1
33UH/0307
FB1
HM102/0805
D6
+P12V
L16
1.8uH/0805
Q16
3906
L11
D4
1N4148
CVBS1
C86
10p
R88
75,1%
(9)
D3
1N4148
(9)
+5VV
+5VV
33UH/0307
VCC
+5VV
CB81
0.1u
+ C73
100uF/16V
+5VV
R111
75,1%
(OPEN0
C90
10p
R89
75,1%
D7
D10
1N4148
G/Y/CVBS2-OUT
1
C97
R114
200
L17
1.8uH/0805
C125
220p
C126
220P
Q18
3906
D9
100U
FB5
HM102/0805
G/YCVBS2
Q21
3906
R90
200
L21
1.8uH,DIP
FB2
HM102/0805
1N4148
Y/CVBS2
+5VV
+5VV
C121
10p
+5VV
C92
C91
220P
220p
D8
1N4148
1N4148
L13
-12V
-P12V
B
33UH/0307
+5VV
+5VV
+5VV
100uF/16V
C128
10p
R116
75,1%
0.1u
(OPEN0
B/Cb-OUT
L18
1.8uH/0805
C131
220p
C132
220P
FB6
HM102/0805
Q20
3906
R118
200
D14
1N4148
C98
1N4148
CHROMA
C93
10p
R91
75,1%
D11
+5VV
C78
D13
100U
B/Cb
Q22
3906
R92
200
L23
1.8uH,DIP
FB3
HM102/0805
CB86
C95
220p
C94
220P
D12
1N4148
1N4148
R107
CB106
ASPDIF
SPDIFOUT
100
R109
100
0.1u
C119
330p
3906
C
MediaTek Incorporation
Title
DVD130(MT1369AE)
Size
C
Date:
Document Number
Rev
2
AV OUTPUT
Wednesday, July 24, 2002
Sheet
1
of
3-SY3669P2-V2
NAME
TYPE
DEVICE
NAME
TYPE
VCC
Digital 5V
SUPPLY
GND
Digital Ground
RVCC
Servo 5V
MT1336E
SGND
AVCC
RF 5V
PICKUP HEADER
AGND
Audio Ground
V33
Digital 3.3V
VGND
Video Ground
DV33
Digital 3.3V
MT1369E
AV33
Servo 3.3V
MT1369E
V25
Digital 2.5V
MT1369E
+5VA
Audio 5V
Audio DAC
+3VV
Video 3.3V
Video DAC
+5VV
Video 5V
Video DAC
+12V
Audio 12V
Audio filter
JP7
1
2
3
4
5
6
7
8
9
10
11
12
+12V
GND
-12V
D5V
GND
3.6V
GND
S5V
GND
-22V
~3.5V
~3.5V
+P12V
+P12V
PGND
-P12V
V33
+P5V
PGND
+P3.6V
CB60
0.1u
C59
220u
PGND
+PS5V
GND
-P22V
AC35V+
AC35V-
-P22V
AC35V+
AC35V-
-P12V
+ C58
10u
+P5V
+P12V
-P12V
(11)
L20
SGND
CB62
0.1u
+P36V
+
CON12
+P5V
+P12V
-P12V
VCC
RVCC
AVCC
[ 2,3,4,5 ]
[5]
[5]
[ 2,3,4,5 ]
[2]
[2]
DV33
V33
AV33
V25
DV33
V33
AV33
V25
[ 2,3,4 ]
[ 2,3,4 ]
[2]
[2]
GND
SGND
GND
SGND
[ 2,3,4,5 ]
[ 2,3,4,5 ]
URST
URST
[2]
DV33
URST
C61
33UH/0307
220u
VCC
RVCC
AVCC
D1
R50
RLS4148E
(11)
4.7k
|
V
AV33
Pitch=2.54 m/m
AV33
+
CB61
0.1u
L6
33UH/0307
SOT223
VCC
+P5V
VCC
+ C64
100U
CB65
0.1u
L8
U11
G960T63U
+P5V
AVCC
VO
V33
CB63
0.1u
C63
100u
L7
+PS5V
RVCC
RVCC
33UH/0307
CB68
0.1u
CB67
0.1u
+ C66
100U
(6)
D2
1N4001
(OPEN)
U12
G950T63U
+P36V
3
DV33
C62
220u
SOT223
+
DV33
+
1
CB64
0.1u
+ C67
100U
CB69
0.1u
VI
GND
AVCC
33UH/0307
C60
220u
VI
VO
GND
V25
V25
+
1
CB66
0.1u
C65
100u
MediaTek Incorporation
Title
DVD130(MT1369AE)
Size
C
Date:
5
Document Number
Rev
2
Sheet
1
of
[ 1,2,3,5 ]
VCC
[ 1,2,3 ]
DV33
[ 1,2,3,5 ]
+P5V
[ 1,2,3,5 ]
VCC
DV33
L9
+5VA
VCC
+5VA
T_SY
+P5V
VCC
GND
CB70
C68
0.1u
1u
T_SC
33UH/LA0307
GND
T_SY
[5]
T_SC
[5]
T_CVBS
[5]
VGND
[ 1,2,3,5 ]
ASPDIF
[ 2,5 ]
T_CVBS
VGND
[ 1,5 ]
+P12V
+P12V
[5]
R80A
0
NO STUFF
R82A
0
R84A
0
DIF0
DIF1
DEM0
R81A
0
R83A
0
NO STUFF
R85A
0
NO STUFF
+12V
+12V
+12V
U13
RESET#
SDAT0
SBCLK
SLRCK
SACLK
DIF1
DIF0
DEM0
1
2
3
4
5
6
7
8
MUTEC
AOUTL
Vcc
GND
AOUTR
REF_GND
VQ
FILT+
16
15
14
13
12
11
10
9
LMAIN
R53
R85
R84
ASDAT0
ASPDIF
GND
3
VO VI
RMAIN
RMAIN
RMAIN
[5]
LMAIN
LMAIN
[5]
A_MUTE
A_MUTE
[5]
AGND
AGND
[ 1,2,3,5 ]
7805_2
CB71
C69
CB73
C70
0.1u
1u
0.1u
1u
SACLK
33
33
33
R86
+5VA
CS4340
ACLK
ALRCK
ABCK
U15
RST
SDATA
SCLK/DEM1
LRCK
MCLK
DIF1
DIF0
DEM0
SLRCK
SBCLK
SDAT0
33
VSDA(U3.61)
UP3..0(U3.66)
DIF1
DIF0
Descriptions
I2S , Up to 24-bit
UP1..5(U3.62)
2-CHANNEL,AUDIODAC
VCCA
MCLK
U19
DEM0
TBCK--
BCK
Description
TSD0--
DATA
Disable
TWS
LRCK
44.1 KHz
1
2
3
4
5
6
7
8
BCK
DATA
LRCK
DGND
VDD
VCC
VOL
VOR
SCK
ML
MC
MD
ZL
ZR
Vcom
AGND
16
15
14
13
12
11
10
9
R97
10k
ZL
ZERO
ZR
R98
PCM1748E
10k
C96
47uF
D18
AGND
GND
RLS4148
VOR
VOL
D17
VGND
GND
RLS4148
3.3UH/0805
L22
VCC33
CB48
0.1UF
RST_TVE
RST_TVE
[2]
MUTE#
MUTE#
[2]
RESET#
RESET#
DV33
L10
33UH/0307
+5VA
[ 2,3 ]
[ 2,3 ]
SCL
SDA
CB74
0.1u
SCL
SDA
+ C72
47u
B
R55
10k
[2]
[2]
VSCK
VSCK
VSDA
CB75
0.1u
VSDA
[2]
[2]
[2]
ACLK
ABCK
ALRCK
[2]
ASDAT0
ACLK
ABCK
ALRCK
ASPDIF
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
ASPDIF
29
34
1
2
3
4
5
6
7
8
26
25
24
23
22
21
20
19
[2]
27MHZ
27MHZ
[2]
[2]
HSYNC#
VSYNC#
HSYNC#
VSYNC#
[2]
Y[0..7]
Y[0..7]
CB77
0.1u
+12V
U14
27MHZ
RST_TVE
ASDAT0
[ 2,5 ]
CB76
0.1u
27
28
30
31
12
VCC
R51
680
R52
680
Q7
CLOCK
RESET
V0
V1
V2
V3
V4
V5
V6
V7
VDD
VAA
VAA
VAA
VREF
FIELD/CB
HSYNC/CB
VSYNC
PDAT0
PDAT1
PDAT2
PDAT3
PDAT4
PDAT5
PDAT6
PDAT7
CVBS
C
RD
WR
TTXDAT
TTXRQ
INT
32
33
13
14
15
16
3906
R54
470/0.25W
38
Q8
3906
9
CB80
0.1u
10
HSYNC#
11
VSYNC#
44
R56
82
A_MUTE
DIP, pitch=10m/m
R57
7.5k
CVBS1
ZD1
Zener / 5V1
48
Y/CVBS2
47
39
R/Cr
4.7K
A
40
G/Y/CVBS2
MUTE#
SDA
SCL
BLUE
TEST
ISET
XTALOUT
XTALIN
GNDD
GNDA
GNDA
GNDA
PADDR
43
B/Cb
R93
37
Q24
3906
MUTEC
18
35
42
45
D16
1K
1N4001
MediaTek Incorporation
R99
R62
4k, 1%
ZERO
R94
1K
Title
DVD130(MT1369AE)
4.7K
CS4954, TQFP-48
Size
C
Date:
3906
R58
22k
C71
100u/25V
R99
RED
GREEN
SDA
SCL
17
36
41
46
Document Number
Rev
2
Sheet
1
of
U6
U16
[ 1,2,4,5 ]
D
[ 1,2,4 ]
[ 1,2,4,5 ]
VCC
VCC
V33
V33
GND
GND
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
DMA11
DBA0
DBA1
23
24
25
26
29
30
31
32
33
34
22
35
20
21
SDCLK
SDCKE
38
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
BA0/A13
BA1/A12
CLK
CKE
L5
V33
SD33
CB49
0.1u
FB / 0805
+ C55
47u
DCS#
DRAS#
DCAS#
DWE#
19
18
17
16
RDQM0
RDQM1
15
39
[2]
[2]
DCLK
DCKE
DCLK
DCKE
[2]
[2]
[2]
[2]
CAS#
RAS#
WE#
CS#
CAS#
RAS#
WE#
CS#
[2]
[2]
[2]
MA[0..11]
BA[0..1]
DQ[0..31]
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
DQML
DQMH
NC
NC
54
41
28
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
DQM[0..3]
[2]
[2]
[2]
[2]
[2]
PCE#
PRD#
PWR#
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
1
14
27
DMA7
DMA8
DMA9
DMA10
DBA0
21
22
23
24
27
28
29
30
31
32
20
19
SDCLK
SDCKE
35
34
DCS#
DRAS#
DCAS#
DWE#
18
17
16
15
SD33
RDQM0
RDQM1
3
9
43
49
14
36
33
37
6
12
46
52
26
50
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
BA/A11
CLK
CKE
U17
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CS
RAS
CAS
WE
DQML
DQMH
NC
NC
VSS
VSS
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
VSSQ
VSSQ
VSSQ
VSSQ
2
3
5
6
8
9
11
12
39
40
42
43
45
46
48
49
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
SD33
1
25
SD33
7
13
38
44
DMA7
DMA8
DMA9
DMA10
DBA0
21
22
23
24
27
28
29
30
31
32
20
19
SDCLK
SDCKE
35
34
DCS#
DRAS#
DCAS#
DWE#
18
17
16
15
RDQM2
RDQM3
14
36
33
37
4
10
41
47
26
50
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
BA/A11
CLK
CKE
CS
RAS
CAS
WE
DQML
DQMH
NC
NC
VSS
VSS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
VSSQ
VSSQ
VSSQ
VSSQ
2
3
5
6
8
9
11
12
39
40
42
43
45
46
48
49
RDQ16
RDQ17
RDQ18
RDQ19
RDQ20
RDQ21
RDQ22
RDQ23
RDQ24
RDQ25
RDQ26
RDQ27
RDQ28
RDQ29
RDQ30
RDQ31
SD33
1
25
SD33
7
13
38
44
4
10
41
47
SDRAM 1Mx16x4
SDRAM 512Kx16x2
SDRAM 512Kx16x2
ESMT M12L16161A-5T
50-PIN TSOP(II),
(400milx825mil, 0.8mm pin pitch)
ESMT M12L16161A-5T
50-PIN TSOP(II),
(400milx825mil, 0.8mm pin pitch)
AD[0..7]
[ 2,4 ]
[ 2,4 ]
SCL
SDA
RDQ20
RDQ21
RDQ22
RDQ23
RDQ24
RDQ25
RDQ26
RDQ27
RDQ28
RDQ29
RDQ30
RDQ31
33x4
1
3
5
7
DCS#
DRAS#
DCAS#
DWE#
2
4
6
8
DBA0
DBA1
DCLK
DCKE
+
C56
47u
CB50
0.1u
C57
47u
CB51
0.1u
CB52
0.1u
CB53
0.1u
CB54
0.1u
CB55
0.1u
CB56
0.1u
VCC
A[0..19]
SCL
SDA
AD[0..7]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
U8
PCE#
PRD#
PWR#
FCE#
FRD#
FWR#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
FCE#
FRD#
FWR#
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
22
24
9
SD33
U7
B
RDQ16
RDQ17
RDQ18
RDQ19
BA0
BA1
PCE#
PRD#
PWR#
AD[0..7]
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
RN1
DQM[0..3]
A[0..19]
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
CS#
RAS#
CAS#
WE#
DQ[0..31]
A[0..19]
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
EliteMT M12L64164A-5T
54-Pin TSOPII(400mil x 875mil)
MA[0..11]
BA[0..1]
SD33
[2]
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
SD33
CS
RAS
CAS
WE
36
40
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
D0
D1
D2
D3
D4
D5
D6
D7
NC
NC
NC
25
26
27
28
32
33
34
35
11
29
38
10
RESET
12
RY/BYRY/
VCC
VCC
CE
OE
WE
VSS
VSS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
11
10
9
8
7
6
5
4
42
41
40
39
38
37
36
35
34
3
2
V33
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
RESET
BYTE
30
31
23
39
Vcc
CB78
0.1u
FWR#
FRD#
FCE#
CB79
0.1u
43
14
12
WE
OE
CE
GND
GND
AT49F8192A
23
15
17
19
21
24
26
28
30
16
18
20
22
25
27
29
31
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
CB57
0.1u
SDCLK
SDCKE
DMA0
DMA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
DMA11
DQM0
DQM1
DQM2
DQM3
RDQM0
RDQM1
RDQM2
RDQM3
U10
SDA
SCL
CB59
VCC
0.1u
44
33
33
33
MA0
MA1
V33
A19
R47
R48
5
6
SDA
SCL
NC
NC
NC
WP
1
2
3
7
M24C16-W
13
32
MediaTek Incorporation
Title
8M Flash
Size
ize
Rev
2
Document Number
Sheet
1
of
IO1
IO0
VCC
IO4
RVCC
Z3
Z4
AVCC
Z2
R38,R49,R61: FOR 5V
R61
0
R49
0
LDO_AVCC
MT1336E
R38
0
RVCCIN
RFVCC
R46,R60,R63: FOR 3V
TRCLOSE
TROPEN
ENDM
STBY
MT1336E
R63
0
V33
R60
0
R46
0
CB1
0.1u
STBY
LIMIT
TROUT
TRIN
SCLK
0.1u
TRCLOSE
IOA
ENDM
PWMOUT2
URST
SDATA
SDEN
CB2
RVCCIN
AVCC
R5
MT1336E/MT1369E with
SANYO SF-HD6AV PUH
10k
10k
10k
10k
L1
33UH/0307
R6
(10)
RFVCC
10K
100K
Q1
R1
R2
R3
R4
R7
10K
R8
100K
VCC
RVCC
AVCC
VCC
RVCC
AVCC
[ 1,3,4,5 ]
[1]
[1]
V33
AV33
V25
DV33
V33
AV33
V25
DV33
[ 1,3,4 ]
[1]
[1]
[ 1,3,4 ]
GND
GND
[ 1,3,4,5 ]
SGND
SGND
[ 1,3,4,5 ]
IOA
3
2
Very Important
to reduce Noise
Q3
2SK3018
CB11
Q2
2SK3018
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
100u
2SK3018
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
0.1u
AVCC
CB12
SF-HD6AV/0.5mm,24P
0.1u
100u
MDI1
IOA
C
D
F
MDI1
MDI2
L2
C137
V20
0.1u
CB23
E
A
B
B
Q4
3CG8550D
0.1u
33UH/0307
L3
33UH/0307
CB21
CB22
0.1u
0.1u
2SB1132
LDO2
L4
CON1
D
C
B
A
C12
GND-LD
LD-DVD
HFM
LD-CD
MD
VR-DVD
VR-CD
(LD-CD)
NC
CD/DVD
C
D
F
VCC
VC
GND-PD
E
A
B
NC
TT+
F+
F-
CB13
0.1u
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
OPO
OPOP+
C3
33UH/0307
R11
22
R12
22
47u
LDO_AVCC
C13
DD
1u
C15
C14
1u
1u
C16
1u
CC
AA
BB
AA
CC
B
C
CB31
0.1u
AGNDF
VCON
AVDDF
AGNDX
AVDDM
COSPHI
HALLCOS
REFCOS
AGNDM
HALLSIN
REFSIN
SINPHI
SW0
SW2
SW1
MOP
MON
AGNDX
AGNDX
CEON
CEOP
RFGCI
RFGCU
RFFGC
OSP
OSN
CDD
CDC
CDB
CDA
DVDRFIN
DVDRFIP
DVDD
DVDC
DVDB
DVDA
MA
MB
MT1336E
C18
47u
CB3
0.1u
U1
DV33
AVDDP
AGNDX
AGNDP
DPDMUTE
RST
SDATA
SDEN
GNDS
SCLK
XCK16M
VDDS
IOB
IOA
IO9
IO8
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
HDGATE
UDGATE
GND
S
D
+ C1
MC
MD
SA
SB
AGND
IR
AVDD
SC
SD
CDFOP
CDFON
SVDD
TPI
TNI
SGND
WGAND
AGC1
WAVDD
AGC2
AGC3
MDI2
MDI1
LDO1
LDO2
RFSUBO
WGND
2N3904
D
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
VFO13
VDD
AGNDX
AGNDX
AGNDX
DPFO
DPFN
GNDP
HTRC
TRLP
TRLPA
CRTPLP
CRTP
HRFRP
LRFRP
DEFECT
VDDP
TEO
CSO
LVL
FEO
V20
VREFO
V2REFO
AVDDT
TM4
AGNDT
TM3
TM2
TM1
AGNDO
RFON
RFOP
AVDDO
AGNDX
AGNDX
WVDD
WOBSO
Z6
R9
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
C7
C4
CB10
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
RESET#
RESET#
[4]
MUTE#
MUTE#
[4]
V25
0.015u
CB14
CB15
CB16
CB17
CB18
CB19
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
100k
27MHZ
27MHZ
[4]
URST
URST
[1]
Y[0..7]
Y[0..7]
[4]
HSYNC#
VSYNC#
HSYNC#
VSYNC#
ASPDIF
ACLK
ALRCK
ABCK
ASDAT0
ASPDIF
ACLK
ALRCK
ABCK
ASDAT0
[5]
[4]
[4]
[4]
[4]
A[0..19]
A[0..19]
[3]
390p
390p
Z11
TEO
Z12
CSO
C8
C9
470p
0.033u
Z13
RFL
Z14
FEO
CB24
0.1u
CB28
RFON
0.1u
CB25
CB26
0.1u
0.1u
+ C10 CB27
10u
+ C11
0.1u
10u
RVCCIN
RVCCIN
+ C17
47u
CB29
CB30
0.1u
0.1u
R13
+ C20
[4]
[4]
AV33
RFOP
V1P4
100k
CB32
0.1u
CSO
FEO
RFL
RFRP
CB34
MT1336E
47u
0.1u
HTRC
R14
MDI2
MDI1
LDO1
LDO2
RVCCIN
CB9
27p
D
A
CB8
V2P8
LDO1
Q5
3CG8550D
C6
TEO
CSO
RFL
FEO
V20
V1P4
CB7
10p
R10
CB20
0.1u
CB6
27k
C2
Z8
HTRC
C5
BDO
CB5
HRFRP
HTRC
RFRP
CB4
CB33
0.1u
+ C19
47u
AD[0..7]
R15
C21
1000p
R16
18k
RST_TVE
RST_TVE
RFZC
RFRPC
Z16
RFRPC
AD[0..7]
[3]
PRD#
PWR#
PCE#
PRD#
PWR#
PCE#
[3]
[3]
[3]
MA[0..11]
BA[0..1]
MA[0..11]
BA[0..1]
[3]
[3]
TEO
C22
0.015u
F
E
20k
TRSO
V1P4
STBY
C33
150p
CB39
0.1u
R24
20k
DMSO
C135
V1P4
OPO
R120
AV33
R
ADIN
FOSO
OPOP+
C34
150p
R121
R
VCC
R122
R
R124
0
R29
20k
R33
10K
R31
390
C36
1000p
RFIN
C31
1000p
RFIP
LPIOP
R137
220
VCC
CB40
C38
C39
0.1u
1u
10n
Z23
LPFON
10n
C44
C42
10n
100p
R30
750k
R32
R34
20k
18k
R35
0
V25
10n
PWMOUT2
DMSO
FMSO
R36
R37
10k
15k
FG
GND
A8
A9
A10
A11
A12
A13
Z30
FG
V1P4
C46
C
C47
330p
C48
330p
C49
0.015u
CB45
0.1u
LOAD5
4
3
2
1
GND
A14
A15
AD7
AD6
AD5
AD4
TO-92
HEADER-5 (2.00mm)
R140
1K
Q14
TROPEN
R141
DV33
1K
TRCLOSE
Q13
8050
R143
390
AD3
AD2
AD1
AD0
A0
A1
C165
C164
390P
390P
U3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
8.2k
10n
C41
C43
Z25
JITFO
FOSO
TRSO
TROPEN
Z27
TRSO
Z29
FMSO
3904
100p
FOSO
Z28
DMSO
JP4
TRIN
LPION
Z24
LPFOP
Z26
PLAYER_SLED,9P,2.0 m/m
Q12
LOAD+
TROUT
C28
150p
C30
150p
R144
390
V25
R22
RAS#
CAS#
CS#
WE#
[3]
[3]
[3]
[3]
10
DCLK
DCKE
DCLK
DCKE
[3]
[3]
[3]
IREF
PLLVSS
LPIOP
LPION
LPFON
LPFIP
LPFIN
LPFOP
JITFO
JITFN
PLLVDD3
FOO
TRO
TROPENPWN
PWMOUT2
DVDD2
DMO
FMO
FG
DVSS
HIGHA0
HIGHA1
HIGHA2
HIGHA3
HIGHA4
HIGHA5
DVSS
HIGHA6
HIGHA7
AD7
AD6
AD5
AD4
DVDD3
AD3
AD2
AD1
AD0
IOA0
IOA1
DVDD2
IOA2
IOA3
IOA4
IOA5
IOA6
IOA7
A16
A17
IOA18
IOA19
DMVSS
APLLVSS
ACLK
ASDATA2
ASDATA1
ASDATA0
DVDD3
ALRCK
ABCK
RD16
RD17
DVSS
RD18
RD19
RD20
RD21
DVDD2
RD22
RD23
DQM2
DQM3
DVSS
RD24
RD25
RD26
RD27
DVDD3
RD28
RD29
RD30
RD31
DVSS
RA3
RA2
RA1
RA0
DVDD2
RA10
BA1
DQM0
DQM1
DVSS
RA4
RA5
RA6
RA7
DVDD3
RA8
RA9
RA11
CKE
CLK
DVSS
MT1369E_208
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
SCL
SDA
SCL
SDA
ACLK
[ 3,4 ]
[ 3,4 ]
ASDAT0
DV33
ALRCK
ABCK
DQ16
DQ17
R104
1K
GND
DQ18
DQ19
DQ20
DQ21
VSCK
VSDA
VSCK
VSDA
V25
DQ22
DQ23
DQM2
DQM3
GND
DQ24
DQ25
DQ26
DQ27
DV33
DQ28
DQ29
DQ30
DQ31
GND
MA3
MA2
MA1
MA0
V25
MA10
BA1
DQM0
DQM1
GND
MA4
MA5
MA6
MA7
DV33
MA8
MA9
MA11
DCKE
DCLK
GND
DMVDD3
ALE
IOOE#
IOWR#
IOCS#
DVSS
UP1_2
UP1_3
UP1_4
UP1_5
UP1_6
DVDD3
UP1_7
UP3_0
UP3_1
INT0#
IR
DVDD2
UP3_4
UP3_5
UWR#
URD#
XTALI
XTALO
DVSS
RD7
RD6
RD5
RD4
DVDD2/3
RD3
RD2
RD1
RD0
RWE#
CAS#
RAS#
RCS#
BA0
DVDD3
RD15
RD14
RD13
RD12
DVSS
RD11
RD10
RD9
RD8
VPVDD3
VCOCIN
VPVSS
A2
A3
A4
A5
A6
A7
A16
A17
A18
A19
[3]
DQM[0..3]
RAS#
CAS#
CS#
WE#
AV33
C32
2.2u
DQ[0..31]
DQM[0..3]
GND
C29
RFOP
C40
VCC
C37
47u
CB42
0.1u
RFON
R28
V1P4
9
8
7
6
5
4
3
2
1
SL+
SLQ6
3904
Q11
8550
20p
R27
10
JP9
SPSP+
LIMIT
FG
VCC
C27
R123
R
C35
10u
CB41
0.1u
R136
220
20p
Z20
RFOP
20K
+
GND
Z19
RFON
C134
C
R119
R26
BA5954
DQ[0..31]
CB35
0.1u
CB38
0.1u
C26
ASPDIF
R23
10K
CB36
0.1u
Z18
ADIN
V25
47u
C25
47u
GND
VCC
7
6
5
4
3
2
1
10k
V2P8
ADIN
CB37
0.1u
DV33
C24
HSYNC#
VSYNC#
VNFFC
VOSL
VINSLVINSL+
CF2
CF1
VINFC
Z17
V2P8
R21
33k
SPSP+
Y4
Y3
Y2
Y1
Y0
PREGND
VINLD
CTK2
CTK1
VINTK
BIAS
STBY
14
13
12
11
10
9
8
Y7
Y6
Y5
22
23
24
25
26
27
28
FMSO
R25
VOFC+
VOFCVOSL+
VOSLPGND
PVCC1
VCC
R145
URST
VCC
VOTK+
VOTKVOLD+
VOLDPGND
VNFTK
PVCC2
C23
1000p
R20
1,0805
DV33
15
16
17
18
19
20
21
SL+
SL-
R19
1,0805
BDO
SCLK
SDEN
SDATA
U2
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
R18
1,0805
RFIP
RFIN
RFDTSLVN
SCOP
SCON
RFDTSLVP
ADCVDD3
HRFZC
RFRPSLV
RFRP_AC
RFRP_DC
RFLEVEL
FEI
CSO
TEI
TEZISLV
RFSUBI
ADIN
ADCVSS
PDMVSS
PWM2VREF
PWMVREF
PDMVDD3
DVDD3
BDO
SLCK
SDEN
SDATA
WOBSI
UDGATE
DVDD3
IFGATE
VFO13
DVSS
PRST
ICE
YUV7
YUV6
YUV5
DVDD2
YUV4
YUV3
YUV2
YUV1
YUV0
DVSS
HSYN
VSYN
BLANK#
MC_DAT
SPDIF
APLLVDD3
R17
1,0805
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
C50
DQ11
DQ10
DQ9
DQ8
DQ15
DQ14
DQ13
DQ12
DQ3
DQ2
DQ1
DQ0
WE#
CAS#
RAS#
CS#
BA0
DQ7
DQ6
DQ5
DQ4
RxD
TxD
IR
SDA
RESET
MUTE
V-STB
V-SCK
V-SDA
CB46
0.1u
C87
1u
GND
Z31
ALE
RESET#
C52
100p
DV33
V-STB
V-SCK
V-SDA
V25
0
0
0
GND
R65
R69
R78
10U
(10)
1k
V25
VSCK
VSDA
R40
R39
IR
VSTB
AV33
10
R42
10
SCL
-P22V
AC35V+
AC35VVFDVCC
ALE
PRD#
PWR#
PCE#
-P22V
AC35V+
AC35VAGND
DV33
VCC
1
2
3
4
5
6
7
8
9
GND
JP6
C88
Q15
1u
R79
1k
R41
10
VCC
VCC
V33
(OPEN)
R81
V33
R125
10
JP8
1k
RxD
TxD
R103
0 OHM
U5B
R44
0 OHM
0.1u
3
74HC04
VFDVCC
R45
0 OHM
Q17
R82
+
RS232/4P,2.0 m/m
AV33
R102
0 OHM
U5A
CB47
MUTE#
1
2
3
4
(OPEN)
R101
0 OHM
(10)
C136
100u
1k
R43
100k
2N3904
74HC04
27MHZ
DIP
R83
4.7k
R80
4.7k
C53
1n
C85
VCC
C53
1n
27MHz
Y1
MediaTek Incorporation
C54
20p
22p
Title
DVD130(MT1369AE)
L22
3.3UH/0805
Size
Document Number
Custom
Date:
Rev
2
SERVO & RF
Sheet
of
TO TV
JUV6.604.272
10
Technical Requirements
1. During mounting, ensure static protection
XP4
XP3
TO TV
JUV6.604.270
JUV6.604.274
JUV6.604.322
XP1
JUV6.672.287
Decoding board assembly
XS1
12
XS2
XP2
CN1
JUV6.604.290
JUV6.604.291
Flat cable
11
13
18
17
16
15
14
13
12
11
10
9 JUV8.817.041
Warning label
8 JU8.667.310
Wire clip
7 JUV8.072.015
Supporting column
6 JUV7.312.004
Shield cover
5 JUV7.312.003
4 JUV6.672.287
Shield case
Decoding board assembly
3 JUV6.604.291
Wired connector
2 JUV6.604.290
Wired connector
1 JUV6.463.001
Serial
Code No.
No.
Parts
Qty
Remarks