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vikas
OBJECTIVE
To work in an innovative and challenging environment where I could use my existing skill set to benefit the organisation to the fullest while at the same time gain more knowledge and tecnological & cultural exposure
ACADEMIC ACHIEVEMENTS
Degree
Institute
B Tech
Delhi Technological University
Specialisation
ECE
Year
Percentage
Till 6th Sem
78.94%
12th
2011
92.00%
10th
2009
96.80%
Consistently Ranked amongst top 15 students in batch of 195 pursuing Electronics & Communication engineer Topper in 10th Board Examination with overall 5th Rank in Delhi Region
INTERNSHIPS AND TRAININGS
Developed a generic Commentary Functionality for Reporting tools like OBIEE & Spotfire
Learned and used JavaScript and SharePoint Custom Web Content Creation tools
VERILOG , VHDL
C, C++, JavaScript
XILINX ISE Design Suite 14.2 , ISim, Pspice, MATLAB
8085/8086, Arduino, Spartan 3E FPGA trainer board
PROJECTS
Implementation of Modular Bit Serial Multiplier and Modular Inversion Algorithms in Galois Field
Scalar multiplication of Elliptic Points using Point Doubling and Point addition
Conceptual Architecture of Processor using ALU,Memory and Control Unit
Design of an 8 bit RISC processor with a basic instruction set that can be extended using MACROS.
The processor executes all instructions in one clock cycle including returns from interrupt subroutines and
external accesses
Implementation of a Parking Lot Occupancy counter using a FPGA chip for a single entry-exit gate.
Implementation of long divison algorithm using Verilog.
Design and Synthesis of Period Counter and accurate low frequency Counter using Verilog .
FIFO memory buffer system: Circular Queue based implementation.
Development of Sensor and Data Handling Subsystems For Team Zenith:DTU CANSAT team for annual
NASA competition in Texas ,USA (2013-2014) as embedded systems lead.