Closed-Loop Sampled-Data Error Model for PWM DC/DC Converters with Input

Variations

Sbastien Cliquennois ST-Ericsson, Nya Vattentornet. SE-223 83 Lund, Sweden email;

.sebastien,cltquennois#stericsson,com

AbstractThis paper proposes and extended sampled-data error (small-signal)

model of closed-loop Switched Mode Power Supplies (SMPS) operated with PulseWidth Modulated (PWM) signals, This model includes a formulation of the input-to-state
sensitivity matrix as well as support for non-linear ramps in expression of the switching
conditions. A practical implementation of this model is derived for a Buck DC/UC
converter operating in Discontinuous Conduction Mode <DCM). Transient simulations
of both proposed model and piecewise-linear (PWL) system are performed, in order to
check validity and performance of sampled-data error-model with respect to input
variations. Output impedance also is derived from the proposed model, and compared
with PWL model simulations.
INTRODUCTION
Sampled-data models [1] , [2] can be used as an alternative to average models
(derived from state-space or circuit aver-aging [3]) for performing stability analysis of
Switched-Mode Power Supplies (SMPS). They are widely used for analysis of digitally
controlled SMPS [4], [5], because of their discrete-time nature. but can also be used
with analog control loops. A critical point in stability analysis using sampled-data
models for analog feedback loops consists in determining an exact closed-loop
sensitivity matrix of the system which correctly takes into account the duration variation
of each phase. A generic expression of this matrix for a class of PWM schemes is
proposed in [6]. However by adding a term taking into account input variations. it is
possible to derive a complete closed-loop. Small-signal,

discrete-time model. This

sampled-data "error*' model enables not only to assess closed-loop system stability.
but also to predict important closed-loop characteristics. such as load transients, line
transients. output impedance or power-supply rejection ratio.
In a first section analysis in [6] is amended with the introduction of a more general
representation of switching conditions that can deal with non-linear ramps. The
formulation is extended in order to account for input variations, which leads to a full
sampled-data error model. In a second section an algorithm for implementation is
proposed. In the last section, a model is derived for a Buck DC/IX" converter operating
in Discontinuous Conduction Mode (DCM). Transient simulations comparing a

Piecewise Linear (PWL) model with sampled-data model are performed. Closed-loop
output impedance is calculated with the closed-loop discrete-time model, and also
compared to PWL model simulations.
978-1 -4244-7463-9/10/X26.00 @2010 IEEE
II. DERIVATION OF S AMPLED -D ATA E RROR MODEL

A. System pre-requisites and analysis limitations

FigI

Closed-Loop> switching conditions for PWL SMPS model

In order to derive sampled-data models. some genera! pre-requisites on SMPS have to

be enforced. First, sampled-data models assume that system possesses a unique
steady-state (may it be. unstable). of which two properties are fundamental: the order
of the different system topologies is invariant and the system has a fixed working
frequency Ts.
Although the classical sampled-data models are valid for large signals, the statesensitivity matrix derivation is done using a linearization around a periodic steady-state.
This means that the derived model has only a local, small-signal existence. What's
more, the analysis is limited to analog control loops which action can be described in
terms of "switching conditions" - may they be external or internal - as shown on Fig. I.
which ate described in the following section.
B. State-sensitivity and input-to-state sensitivity matrices
A SMPS is modeled as a PWL system: each possible topology k is described as a
linear system, and represented by the following state-space equations:
(1)
X = AkX + BkU
Y =ckx +.Dku

with k = 1 , 2 , - , N where N is the number of topologies. X the state vector. U the input
vector and Ak.Bk.Ck.Dk the state-space matrices for topology k . For a given topology k
of duration tk the relation between state vector at beginning of topology X k - 1 and at the
end of topology X k . is classically given by {7}

x
k

k 1

U
(2)