CORE TECHNOLOGIES

SUITE NO.8A, 3RD FLOOR

core technologies

184, LENIN SARANI

KOLKATA 700 013
PHONE: 91-33-22126863, 65
FAX: 91-33-22124167
EMAIL:support@core-technologies.com
WEB:www.core-technologies.com

Introduction

General Description
The Universal Trainer Kit (CT-UTK) is an Embedded Systems training tool for different
platforms e.g. 8052, PIC, AVR, ARM etc.). The kit contains different experiments
which are interfaced with the microcontroller using connecting cables. The
microcontroller is placed as a daughter module which can be interchanged with
other controllers. This makes the kit very flexible and caters to a universal
embedded platform. The different microcontrollers come along with their various
tool-chains (programmers, emulators, IDE) which may be connected between the kit
and computer.
The kit comes along with an Atmel AT89S52 daughter module with a built in InCircuit Programmer and an Integrated Development Environment (IDE). The
software enables the user to write code in assembly language, assemble the code
and download the same onto the microcontroller.
Hardware Features
16 x 2 Line LCD Module
4 nos. of 7 segment Display
8 nos. of Digital Output
8 nos. of Digital Input
8 bit Analog to Digital converter
8 bit Digital to Analog Converter
Serial Port Interface using MAX232
8 x 8 LED Matrix
2 Nos. Opto-Couplers
1 No. Encoder Input
2 Nos. Relays
LM35 Temperature sensor
0 ~ 5V DC Voltage Source
DC Motor Interface (PWM) with motor
Stepper Motor Interface with motor
ASCII Keyboard Interface
Matrix Keypad Interface
Serial ROM Interface
Real Time Clock Interface
Software Features
8051/8052 assembler for AT89S51/AT89S52 Targets
Integrated In-Circuit Programmer
RUN/REST Control

System Requirements
Pentium I or higher
16MB RAM
Windows 9x/Me/XP/2K/NT

Packing List
1) Universal Trainer Kit (CT-UTK)
2) Daughter Card (CT-EDB-89S52)
3) Serial Cable
4) Software CD
5) User Manual
6) Flat Cable Connectors (4)
7) Patch Chords (4)
8) Serial Cable (1)

Installation
Hardware Installation
1) Connect the 4-pin CPU cable to the power supply connector. Maintain proper
alignment and check the connection before switching on.
2) Remove all flat cables and connectors.
3) Switch on the power.
4) Refer to the comments given on the examples for connections for different
experiments.
Software Installation
Insert the installation CD into the CD drive and run setup.exe.
Follow the installation procedure on the screen.
Run Core Embedded Lab 2012 program.

Connectors
Connector Description
CN1 ~ CN8 Daughter Card Terminations
CN9 & CN10 Daughter Card ~ Main Board Connections
CN11 Motor & Relay
CN12 ADC Data
CN13 DAC Data
CN14 Serial Data
CN15 Isolated Input & Encoder
CN16 RTC & Memory Data
CN17 Matrix Display Row Data
CN18 Matrix Display Column Data
CN19 Digital Output (LEDs) Data
CN20 Digital Input (DIP switches) Data
CN21 7 segment display digit drive
CN22 7 segment display segment drive
CN23 LCD Control Pins
CN24 LCD Data Pins
CN25 ASCII Keyboard Data

Connector Details
Microcontroller Interface (only for CT-EDB-PIC16F887)
Pi
n
1
2
3
4
5
6
7
8
9
10

CN
1
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7

CN
2
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7

CN
3

Peripheral Interface

CN
4

CN
5

CN
6
RE0
RE1
RE2

CN
7
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7

CN
8
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

Pi
n
1

CN
11
M1

M2

M3

M4

M5

M6

RL1

RL2

CN
12
ADC
0
ADC
1
ADC
2
ADC
3
ADC
4
ADC
5
ADC
6
ADC
7

CN
13
DAC
0
DAC
1
DAC
2
DAC
3
DAC
4
DAC
5
DAC
6
DAC
7

CN
14
RXD

CN
15
IN1

TXD

IN2

CN
20
SW
0
SW
1
SW
2
SW
3
SW
4
SW
5
SW
6
SW
7

CN
21
DIG
1
DIG
2
DIG
3
DIG
4

CN
22
SEG
A
SEG
B
SEG
C
SEG
D
SEG
E
SEG
F
SEG
G
DP

ENC

CN
16
RES
T
IO
SCL
K
CS
SK
DI
DO

CN1
7
ROW
0
ROW
1
ROW
2
ROW
3
ROW
4
ROW
5
ROW
6
ROW
7

9
10

Pi
n
1
2
3
4
5
6
7
8
9
1
0

CN
19
LED
0
LED
1
LED
2
LED
3
LED
4
LED
5
LED
6
LED
7

CN
23
RS

CN
24
D0

RW

D1

EN

D2
D3
D4
D5
D6
D7

CN2
5
KBCL
K
KBD
AT

CN1
8
CST
B
CDA
T
CCL
K

Appendix
Instructions that affect flags
INSTRUCTION
ADD
ADDC
SUBB
MUL
DIV
DA
RRC
RLC
CJNE
SETB
CLR
CPL
ANL
ANL
ORL
ORL
MOV

C
C
C
C,bit
C,/bit
C,bit
C,/bit
C,bit

CY
X
X
X
0
0
X
X
X
X
1
0
X
X
X
X
X
X

8051 INSTRUCTION SET

FLAG
OV
X
X
X
X
X

AC
X
X
X

ARITHMETIC
MNEMONIC
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
SUBB
SUBB
SUBB
SUBB

OPERATIONS
BYTE
A,@Ri
1
A,Rn
1
A,direct
2
A,#dat
2
a
A,@Ri
1
A,Rn
1
A,direct
2
A,#dat
2
a
A,@Ri
1
A,Rn
1
A,direct
2

CYC
1
1
1
1
1
1
1
1
1
1
1

INC
INC
INC
INC
INC

A,#dat
a
A
@Ri
Rn
DPTR
direct

1
1
1
1
2

1
1
1
1
1

DEC
DEC
DEC
DEC
MUL
DIV
DA

A
@Ri
Rn
direct
AB
AB
A

1
1
1
2
1
1
1

1
1
1
1
4
4
1

LOGICAL OPREATIONS
MNEMONIC
ANL
A,@Ri
ANL
A,Rn
ANL
A,direct
ANL
A,#data
ANL
direct,A
ANL
direct,#data
ORL
A,@Ri
ORL
A,Rn
ORL
A,direct

BYTE
1
1
2
2
2
3
1
1
2

CYC
1
1
1
1
1
2
1
1
1

ORL
ORL
ORL
XRL
XRL
XRL
XRL
XRL
XRL
CLR
CPL
RL
RLC
RR
RRC
SWAP

A,#data
direct,A
direct,#data
A,@Ri
A,Rn
A,direct
A,#data
direct,A
direct,#data
A
A
A
A
A
A
A

DATA TRANSFER
MNEMONIC
MOV
A,@Ri
MOV
A,Rn
MOV
A,direct
MOV
A,#data
MOV
@Ri,A
MOV
@Ri,direct
MOV
@Ri,#data
MOV
Rn,A
MOV
Rn,direct
MOV
Rn,#data
MOV
Direct,A
MOV
Direct,@Ri
MOV
Direct,Rn
MOV
Direct,direct
MOV
Direct,#data
MOV
DPTR,#data
16
MOVC
A,@A+DPTR
MOVC
A,@A+PC
MOVX
A,@Ri
MOVX
A,@DPTR
MOVX
@Ri,A
MOVX
@DPTR,A
PUSH
direct
POP
direct
XCH
A,@Ri
XCH
A,Rn
XCH
A,direct
XCHD
A,@Ri

2
2
3
1
1
2
2
2
3
1
1
1
1
1
1
1

1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1

BYTE
1
1
2
2
1
2
2
1
2
2
2
2
2
3
3
3

CYC
1
1
1
1
1
2
1
1
2
1
1
2
2
2
2
2

1
1
1
1
1
1
2
2
1
1
2
1

2
2
2
2
2
2
2
2
1
1
1
1

BOOLEAN VARIABLE MANIPULATION

MNEMONIC
BYTE
CYC
CLR
C
1
1
SETB
C
1
1
CPL
C
1
1
CLR
Bit
2
1
SETB
Bit
2
1
CPL
Bit
2
1
ANL
C,bit
2
2
ANL
C,/bit 2
2
ORL
C,bit
2
2
ORL
C,/bit 2
2
MOV
C,bit
2
1
MOV
Bit,C
2
2

PROGRAM AND MACHINE CONTROL

MNEMONIC
BYTE
NOP
1
1
RET
1
2
RETI
1
2
ACALL
Addr11
2
AJMP
Addr11
2
LCALL
Addr16
3
LJMP
Addr16
3
SJMP
rel
2
JMP
@A+DPTR
1
DJNZ
Rn,rel
2
DJNZ
Direct,rel
3
JZ
rel
2
JNZ
rel
2
JC
rel
2
JNC
rel
2
JB
Bit,rel
3
JNB
Bit,rel
3
JBC
Bit,rel
3
CJNE
A,direct,rel
3
CJNE
A,#data,rel
3
CJNE
@Ri,#data,r 3
el
CJNE
Rn,#data,rel 3

CYC

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

Special Function Registers

Register
Symbol
P0
SP
DP0L
DP0H
DP1L
DP1H
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
AUXR
P1
SCON
SBUF
P2
AUXR1
WDTRS
T
IE
P3
IP
T2CON
T2MOD
RCAP2L
RCAP2H
TL2
TH2
PSW
ACC
B

MSB
b7

LSB
b0

b6

b5

b4

b3

b2

b1

P0.7

P0.6

P0.5

P0.4

P0.3

P0.2

P0.1

P0.0

SMOD
TF1
GATE

TR1
C/T

TF0
M1

TR0
M0

GF1
IE1
GATE

GF0
IT1
C/T

PD
IE0
M1

IDL
IT0
M0

WDIDLE

DISRTO

DISALE

P1.7
SM0

P1.6
SM1

P1.5
SM2

P1.4
REN

P1.3
TB8

P1.2
RB8

T2EX
TI

T2
RI

P2.7

P2.6

P2.5

P2.4

P2.3

P2.2

P2.1

P2.0
DPS

EA
RD

WR

TF2

EXF2

ET2
T1
PT2
RCLK

ES
T0
PS
TCLK

ET1
INT1
PT1
EXEN2

EX1
INT0
PX1
TR2

ET0
TXD
PT0
C/T2
T2OE

EX0
RXD
PX0
CP/RL
2
DCEN

F1
ACC.1
B.1

P
ACC.0
B.0

CY
ACC.7
B.7

AC
ACC.6
B.6

F0
ACC.5
B.5

RS1
ACC.4
B.4

RS0
ACC.3
B.3

OV
ACC.2
B.2

Pin Configuration of AT89S52

(T2) P1.0
(T2 EX) P1.1
P1.2
P1.3
P1.4

1
2
3
4
5

40
39
38
37
36

VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)

Byte
Addre
ss
80H
81H
82H
83H
84H
85H
87H
88H
89H
8AH
8BH
8CH
8DH
8EH
90H
98H
99H
A0H
A2H
A6H
A8H
B0H
B8H
C8H
C9H
CAH
CBH
CCH
CDH
D0H
E0H
F0H

(MOSI) P1.5
(MISO) P1.6
(SCK) P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
XTAL2
XTAL1
GND

6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)