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Culture Documents
Multiplexers
En
S
Sel
b
b
N sources
mux
D0
D1
:
output
ALU
registers
mux
DN-1
2-to-1 multiplexer
s
w0
w1
0
1
w0
w1
w0
w0
s
w1
s
w1
4-to-1 multiplexer
s
w
w
w
w
00
01
10
11
s0
(a) Graphic symbol
w0
s1
w1
f
w2
w3
(c) Circuit
s0
w
w
f
1
w
w
Cascading Multiplexers
s3
s2
s1
s0
w0
w1
w2
w3
w4
w5
w6
w7
w8
w9
w10
w11
w12
w13
w14
w15
s0
s1
w0
w3
w4
s2
s3
w7
f
w8
w11
w12
w15
A crossbar switch
s = 0: y1 = x1 and y2 = x2
s = 1: y1 = x2 and y2 = x1
s
x1
0
1
x1
y1
x2
y2
s
x2
y1
0
1
y2
i1
0/1
i1
i2
(a)PartoftheFPG
AinFigure3.39
Storage
cel
0/1
0/1
0/1
(b)Im
plem
entationusingpasstransistors
i1
f
i2
0/1
0/1
i2
0/1
0/1
0/1
(c)Im
plem
entationusingm
ultiplexers
0/1
0/1
x2
x1
f0
f0
f1
f1
f2
f2
f3
f3
f(x1, x2)
Essentially,
we directly
represent the
truth table
Example
w1 w2
w2
w1
0
1
1
0
w1 w2
w1
w2
w2
w1
w2
f
(c) Circuit
Example
3-input majority function
w1 w2 w3
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
w2
w1
0
0
0
1
0
1
1
1
w1 w2
0
0
1
1
w1 w2 w3
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
1
1
f(w3)
f0(w3)
f0(w3)
f1(w3)
f2(w3)
f3(w3)
f1(w3)
f2(w3)
f3(w3)
w1 w2
0
1
0
1
0
0
1
1
w3
w3
w2
w1
w3
Example
F = w1 xor w2 xor w3
w1 w2 w3
0
0
1
1
0
0
1
1
0
1
1
0
1
0
0
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
w2 w3
w2
w1
w3
f
w2 w3
(b) Circuit
Example
0
0
1
1
0
0
1
1
0
1
1
0
1
0
0
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
w3
w3
w2
w1
w3
f
w3
w3
(b) Circuit
Example
0
0
1
1
0
0
1
1
0
0
0
1
0
1
1
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
w1
0
1
w2w3
w2 + w3
w1
w2
w3
(b) Circuit
Do it Yourself
w1
f(0,w2, , wn)
f
f(1,w2, , wn)
w1
f
Example
w3
w2
(a)Usinga2-to-1m
ultiplexer
f (w1 , w2 =
, w3 ) w1w3 + w2w3
Use w1:
Use w2:
Use w3:
Examples
f(x,y,z) = m(0,4,6,7)
Examples
f(x,y,z) = m(0,4,6,7)
Expand y:
f = y f (x ,0, z) + y f (x ,1, z) = y (z ) + y (x)
Expand z:
f = z f (x , y ,0) + z f (x , y ,1) = z (y + x) + z (xy)
Choose y.
f0
f1
f2
f3
f(x1, , xn)
Example
f (w1 , w2 , w3 ) = w1w3 + w1w2 + w1w3
f = w1w2 fw1w2 + w1w2 fw1w2 + w1w2 fw1w2 + w1w2 fw1w2
= w1w2 (w3 ) + w1w2 (w3 ) + w1w2 (w3 ) + w1w2 (1)
w2
w1
w3
f
1
(b)Usinga4-to-1multiplexer
Example
w1
w2
0
w3
Example
f (w1 , w2 , w3 , w4 ) =
w2w3 + w1w2w3 + w2w3w4 + w1w2w4
w1 fw1 + w1 fw1
f w1
f w1
w4
Example
f w1
f w1
w4
I0I1I2
0w2w3
w2 w3 w4
w1fw1fw1
000
001
010
011
100
101
110
111
Example
Expand using w2
f (w1 , w2 , w3 , w4 ) =
w2w3 + w1w2w3 + w2w3w4 + w1w2w4
=
f w2 fw2 + w2 fw2
= w2 (w3 + w1w4 ) + w2 (w1w3 + w3w4 )
fw2 = fw2
(w3 + w1w4 ) =
(w3 (w1w4 ))
= (w3 (w1 + w4 ))
= (w1w3 + w3w4 )
w2
0
w1
w3
w4
fw
Example
Expand using w2
f w2
I0I1I2
w1w3w4
0w2fw2
000
001
010
011
100
101
110
111
Do it yourself
f(w,x,y,z)=m(0,1,5,6,7,9,13,14)
Do it yourself
f(w,x,y,z)=m(0,1,5,6,7,9,13,14)
Do it yourself
f(w,x,y,z)=m(0,1,5,6,7,9,13,14)
f = wx (y ) + wx (y + z) + wx (yz) + wx (yz + yz )
f = wx (y ) + wx g1 + wx g2 + wx g3
g1 = y g1 (0, z) + y g1 (1, z) = y (z) + y (1)
g2 = y g2 (0, z) + y g2 (1, z) = y (z) + y (0)
g3 = y g3 (0, z) + y g3 (1, z) = y (z) + y (z )
4 to1 Mux
2 to1 Mux
Do it yourself
f = wx (y ) + wx g1 + wx g2 + wx g3
g1 = y (z) + y (1)
g2 = y (z) + y (0)
g3 = y (z) + y (z )
2 to 1 Mux
4 to 1 Mux
Temperature (T), Average miles-per-gallon (A), Instantaneous mpg (I), and Miles
remaining (M) -- each is 8-bits wide
Choose which to display using two inputs x and y
Use 8-bit 4x1 mux
Decoders
w0
wn 1
000
001
010
011
100
101
110
111
*A
Enable
En
y0
2n
outputs
y2n 1
1-out-of-8 code
00000001
00000010
00000100
00001000
00010000
00100000
01000000
10000000
code where exactly one of the bits is a 1 (also called a one-hot code)
y0
y1
y2
y3
En w1 w0
1
1
1
1
0
0
0
1
1
x
0
1
0
1
x
y0 y1 y2 y3
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
w0
y0
w1
y1
y2
Equations
y0 = w1w0En
y1 = w1w0En
y2 = w1w0En
y3 = w1w0En
y3
En
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Equations
y0 = w2w1w0En
y1 = w2w1w0En
y2 = w2w1w0En
y3 = w2w1w0En
y4 = w2w1w0En
y5 = w2w1w0En
y6 = w2w1w0En
y7 = w2w1w0En
B
A
w0
w1
En
y0
y1
y2
y3
f(A,B) = m(1,2)
w0
w1
En
y0
y1
y2
y3
w0
w1
w2
En
y0
y1
y2
y3
y4
y5
y6
y7
Decoder 2 to 4
Decoder 3 to 8
74xx138
Active Low Output
B1
Y1
A1
Y2
G1
Y3
Y0
Y1
Y2
Y3
Y4
G1
G2A
Y6
G2B
Y7
Y5
Cascading Decoders
w0
w1
w2
En
w0
w1
En
w0
w1
En
y0
y1
y2
y3
y0
y1
y2
y3
y0
y1
y2
y3
y4
y5
y6
y7
Cascading Decoders
w0
w1
En
w0
w1
w2
w3
w0
w1
En
En
y0
y1
y2
y3
En
w0
w1
En
w0
w1
En
y0
y1
y2
y3
y0
y1
y2
y3
y0
y1
y2
y3
y4
y5
y6
y7
y0
y1
y2
y3
y8
y9
y10
y11
y0
y1
y2
y3
y12
y13
y14
y15
Exercise
f(x,y,z) = m(2,3,5)
f(x,y,z) = M(1,4,6,7)
f(w,x,y,z) = m(1,5,8,9,12,13)
Decoder as Multiplexer
w1
s0
s1
1
w0
w1
En
y0
y1
y2
y3
f
w2
w3
Decoder as Multiplexer
s0
s1
1
w0
w1
En
y0
y1
y2
y3
w1
f
w2
w3
Decoder Applications
Address decoding
Function generator
Do an arbitrary logic
function with a decoder and
an OR gate
Decoders in ROMs
Sel0
Fixed connections
from inputs to
AND gates
Programmable
connections to
OR gates
No Enable,
sometimes also
named
Demultiplexers
a0
a1
am 1
m-to-2m decoder
Sel1
Sel2
Sel2m 1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
Read
Data
dn 1 dn 2
d0
Large ROMs
10 bits
size of decoder?
210 = 1024
10
10: 1024
Decoder
1024
A9
A8
y0
y1
y2
A5
y31
A4..A0
32:1 mux
D
Example
4:1 mux
2:4 decoder
x
w
1
w0
w1
En
y0
y1
y2
y3
y0 = w1 w0
y1 = w1 w0
y2 = w1 w0
y3 = w1 w0
d0
d1
d2
d3
z
y
s0
s1
f = s1 s0 d0 + s1 s0 d1 + s1 s0 d2 + s1 s0 d3
f(w,x,y,z) = w x y z + w x y z + w x y z + w x y z
Encoders
w0
y0
2n
inputs
n
outputs
yn 1
w2n 1
Truth
table
w3 w2 w1 w0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
y1 y0
0
0
1
1
0
1
0
1
Circuit
w0
w1
y0
w2
w3
y1
Equations
w7 w6 w5 w4 w3 w2 w1 w0 y2
y1
y0
y2 = w4 + w5 + w6 + w7
y1 = w2 + w3 + w6 + w7
y0 = w1 + w3 + w5 + w7
Priority Encoder
w3 w2 w1 w0
0
0
0
0
1
0
0
0
1
x
0
0
1
x
x
y1 y0
d
0
1
0
1
0
1
1
1
1
0
1
x
x
x
d
0
0
1
1
w3
y1
w2
y0
w1
w0
1xxx 1000
01xx 0100
001x 0010
0001 0001
Then
y0 = i1 + i3
y1 = i2 + i3
and
z = w3 + w2 + w1 + w0
i3
i2
i1
i0
y1
y0
Equations
w7
w6
w5
w4
w3
w2
w1
w0
Intermediate Variables
y2
i7 = w7
y1
i6 = w6 w7
y0
i5 = w5 w6 w7
...
Example
i7
i6
i1
i0
y2
y1
y0
Code Converter
w0
w1
w2
w3
BCD to 7 Segment
a
b
c
d
e
f
g
0
0
1
1
0
0
1
1
0
0
w3 w2 w1 w0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
1
0
1
0
0
0
1
0
1
0
1
0
0
0
1
1
1
0
1
1
0
0
1
1
1
1
1
0
1
1
Color
White: R=11111111,
G=11111111, B=11111111
Black: R=00000000, G=00000000,
B=00000000
Other colors: values in between,
e.g., R=00111111, G=00000000,
B=00001111 would be a reddish
purple
R
255
G
8
255
255
8
C
8
M
8
Y
Comparators
a
DIFF = a $ b
EQ
b1
:
an-1
bn-1
EQ = (a $ b)
Comparators
AeqB
A
B
AgtB
4
AltB
Comparator 4 bit
a3
b3
i3
a2
b2
i2
a1
b1
i1
a0
b0
i0
AeqB
AltB
AgtB
Combining Comparators
01111111
B
8
0
1
0
8
8
A
B
Igt
Ieq 8-bit magnitude comparator
Ilt
AgtB
AeqB
AltB
1
0
0
I1
I0
8-bit
2x1 mux
8
C
(a)
01111111
B
Min
C
8
(b)
Expensive
Imperfect mixing C, M, Y doesnt
yield good-looking black
(200,200,200): K=200
R
G
B
R GB t o CMY
C
M
Y
Compute minimum of C, M, Y
values
8
C
8
M
8
Y
MIN
8
MIN
8
C2
M2
8
Y2
8
K