Application Note AN2178

Yet Another PSoC-Based Oscilloscope

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Author: Andrea Giacosi

Associated Project: Yes
Associated Part Family: CY8C26443 and CY8C27443
PSoC Designer Version: 4.1
Associated Application Notes:

Abstract
This Application Note describes how to realize a “just for fun” oscilloscope with a PSoC™ and some
additional components. The project has two parts: the PSoC hardware and firmware and a Microsoft.Net
front-end application. The oscilloscope hardware is connected to the host PC through an RS232 interface to
exchange data and commands. The RS232 communication protocol is specified in a separate document to
let readers who want to design their own hardware/firmware or their own front-end application to do so.

Introduction The firmware reads samples from the ADC and

Figure 1 shows a block diagram of the system sends data to the host PC through the UART. A
structure. A resistor network is used to feed the MAX232 driver is used to translate from TTL to
PSoC with a differential signal in the desired RS232.
range. The differential signal is driven to an
instrumental amplifier, which amplifies the input The firmware also implements some of the
signal according to the value specified by the commands described in:
oscilloscope firmware. The amplifier is built using
two PSoC analog continuous time (CT) blocks “OscilloscopeCommunicationDescription.pdf.”
(AMP_CH1 NON_INV, INV).
Note that this document covers the reserved time
The low part of the resistor network is connected base commands for further extensions using the
to the output of two 6-bit voltage output digital-to- faster ADC.
analog converters (ADC), built using two analog
switched capacitor (SC) blocks (VOFF_INV,
VOFF_NINV). The two voltages are selected by
the firmware to shift the input voltages of the
instrumental amplifier into the desired range.
With a 1:10 resistor ratio and a usable input
range less than 4V (when the power supply is 5V
DC), the maximum differential input signal is +/-
25V. The common mode that can be
“compensated” by the offset generator has the
same magnitude.

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 AN2178

differential
output

Divide 12 bit
0
by 10 0 0 Amplifier incremental
Differential ADC
input 0 0

Instrumental
Amplifier

Oscilloscope RS-232 to
FW UART driver Host
Offset [PSOC CPU] PC
Offset Generator
Adjust
0 0
signals

0 0
0

PSOC

Figure 1. System Block Diagram

PSoC Project In this project the 12-bit incremental ADC is used

The implementation of the PSoC blocks
described is straightforward. Standard library
blocks are used. A 5V power supply voltage is
selected. The CPU frequency is set to 12 MHz.
24V1 and 24V2 divisors are 8 and 10,
respectively, to achieve 3 MHz and 300 kHz
frequencies. A UART is configured as 38400 bps
8N1.
and the sample frequency was set to 180 sps.
Users can employ a faster ADC, for example, the
8-bit sigma-delta ADC, if a higher sample rate is
required. The UART speed can be increased to
115200 bps without any problems.
Placement of the different blocks is shown in
Figure 2.

Figure 2. PSoC Block Placement

Pin names, sources and types are shown in Figure 3.

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 AN2178

A B
Figure 3. Pin Names and Sources (A) and Types (B)

Circuit Realization Figure 5 shows the breadboard with the basic

A schematic for the project is shown in the functional blocks highlighted.
Appendix.

Figure 4 shows the breadboard built to support

the code-debugging phase. The PSoC ICE-4000
debugger is used instead of the final chip in order
to speed-up code debugging. The ICE is also
used to power the system, which eliminates the
power section from the breadboard.

Figure 5. Breadboard Functional Blocks

Figure 4. Breadboard

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 AN2178

Figure 6 shows a board working with a 6V DC Client Application

supply voltage. A simple .Net Windows application, developed
using C+, is included with this Application Note.
To access RS232, the application uses a
VB.NET class written by Corrado Cavalli and
freely available for download on the Internet.

The ScopeEngine class implements the

IScopeEngine interface used by the main class,
Scope, to retrieve data to be viewed and to send
commands to the PSoC board. Commands for
the Scope class are shown in Figure 7.
«interface»
IScopeEngine «interface»
IScopePlot
+setTimeBase(in timeBase : int) : bool
+setVoltageGain(in ch : int, in gain : int) : bool +scanModeAddPoint(in newVal : int)
+setScanOrBurstMode(in mode : bool) : bool +replaceModeSetPoints(in newValues : int[])
+setVoltageOffset(in ch : int, in offset : int) : bool +setLinkStatus(in status : int)
+shutdown()

ScopeEngine
-serial : Rs232
-reader : Thread
-plotter : IScopePlot
Scope
-bReaderRun : bool
-samples : int[] +scanModeAddPoint(in newVal : int)
-samplesPointer : int +replaceModeSetPoints(in newValues : int[])
-bTriggerEdgeRising : bool +setLinkStatus(in status : int)
-bTriggerSingleAuto : bool +Scope()
-bContinuousScan : bool -redraw(in sender : object, in e : PaintEventArgs)
-READ_TIMEOUT_MS : int #Dispose(in disposing : bool)
-SAMPLE_BURST_SIZE : int -InitializeComponent()
-Main()
+setTimeBase()
-Scope_Load(in sender : object, in e : EventArgs)
+setVoltageGain()
-timeBaseTB_Scroll(in sender : object, in e : EventArgs)
+setScanOrBurstMode()
-voltageGainCH1_Scroll(in sender : object, in e : EventArgs)
+setVoltageOffset()
-holtRunBt_Click(in sender : object, in e : EventArgs)
+shutdown()
-scanTriggerMode_CheckedChanged(in sender : object, in e : EventArgs)
+ScopeEngine()
-voltageOffsetCH1_Scroll(in sender : object, in e : EventArgs)
-makeTriggerModeOptions()
-ch1OffsetIncr_Click(in sender : object, in e : EventArgs)
-OnDataReceived()
Figure 6. 6V-Powered Example Board -dataReaderLoop()
-ch1OffsetDecr_Click(in sender : object, in e : EventArgs)
-sendCmd()

Firmware Overview Figure 7. Scope and ScopeEngine commands.

The firmware architecture is very simple. After all
Figure 8 shows a screenshot of the front-end
the devices are initialized, the system enters in
application.
the main loop where commands are received
from the UART and processed as soon as they
are received.

Global variables are used to keep the

configuration persistent for the oscilloscope
required by the host system.

When a continuous sample mode is selected, as

soon as a new sample is available, it is sent to
the host through the UART. If the trigger is ON,
data is transmitted en mass to the host only after
128 data bits have been sampled. Data are
saved in the sample’s array.

All commands are a single byte and are decoded

Figure 8. Front-End Application
by a simple switch. Offset and gain commands
directly change the gain of the instrumental
amplifier and the output of the DAC. Future Improvements
o The second channel will be
The trigger mode, selected by the host system, is implemented.
saved in a bit-field variable, which is checked o All the missing commands will be
with each loop of the main loop where the added to the firmware, especially the
sampling is performed. basic trigger functionalities.
o A voltmeter form will be created.
o A “calibration” XML file will be added to
the client side to calibrate the actual
speed and gain of the channel.

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 AN2178

Appendix
VCC
VCC
20 28 1 16
P2[0] VCC C1+ VCC
8 C5 3
P2[1] 1u
C1-
21 27 4
CH1+ P2[2] P0[6] C2+ C2
7 5 2 1u
P2[3] C2- V+
R2 22 15 6
CH1- P2[4] P1[7] C4 V-
9M 1u
6 13
P2[5] P1[6]
23 16 11 14
P2[6] P1[5] T1IN T1OUT C3 C1
5 12 10 7 1u 1u
P2[7] P1[4] T2IN T2OUT
R1 R3 17 12 13
9M 1M
P1[3] R1OUT R1IN Tx
24 11 9 8
P0[0] P1[2] R2OUT R1IN Rx
4 18
P0[1] P1[1] GND
2 10 VCC 15
P0[5] P1[0] GND
R4 3
1M
P0[3]
25 19 R5 MAX232
P0[2] XRES
26 1k
P0[4]
19
XRES
9
SMP
R6
14 1k
VSS

CY8C27443

Figure 9. Device Schematic

About the Author

Name: Andrea Giacosi
Title: Electronic Engineer
Background: Real-Time Software
Contact: giacosi@libero.it

Cypress MicroSystems, Inc.

nd
2700 162 Street SW, Building D
Lynnwood, WA 98037
Phone: 800.669.0557
Fax: 425.787.4641
http://www.cypress.com/ / http://www.cypress.com/support/mysupport.cfm
Copyright © 2004 Cypress MicroSystems, Inc. All rights reserved.
PSoC™, Programmable System-on-Chip™, and PSoC Designer™ are trademarks of Cypress MicroSystems, Inc.
All other trademarks or registered trademarks referenced herein are the property of their respective owners.
The information contained herein is subject to change without notice. Made in the U.S.A.

10/8/2004 Revision A -5-