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Digital and Computer Organization V2
Assignment A
S. No. Questions

Marks - 10

1
a) List the type of Instructions. what are the factors that play an important ro
le for selection of instruction set for a machine
b) Why does DMA have priority over the CPU when both request a memory transfer?
2
a) Describe the role of Encoder & Decoder in Data Transmission. Calculate the si
ze of output data, if Input is given as 4 bits data to Decoder.
b) Calculate the size of Address Code & Op-Code of instruction & draw the Instr
uction format, if Block size is 512 Bits and No. of operations are 128.
3
a) Describe the functions of Control Memory in Basic Computer Organization and D
esign.
b) Describe the each phase of Instruction Cycle used for Micro operation. Give
a suitable example to describe Fetch and decode phase of instruction.
4
. ROM is a permanent memory but it is a combinational circuit. Justify this stateme
nt by giving example of 2 word-4 bit ROM. How is a cell of ROM different from th
at of RAM?
5
Make the logic diagram of 4-bit serial shift register using J-K flip flops. Show
the steps to shift the binary number 1001, through this shift register.
6
Using
using
a)
b)
c)
d)

2's complement notation perform the following arithmetic operations

8 bit registers
67 + (- 76)
87 - 5
37 - (40)
25 - (- 25)

7
. Convert the decimal number 456.7 89 to the following:
a)
Binary number
b)
BCD equivalent
c)
Hexadecimal number
d)
Octal number
8
. Describe the function of Cache Memory & Virtual Memory in memory organization.
Assignment B

Case Detail : A digital computer has a memory unit with 24 bits per word. The in
struction set consists of 150 different operations. All instructions have an ope
ration code part (opcode) and an address part (allowing for only one address). E
ach instruction is stored in one word of memory
Suppose we have the instruction Load 1000. Given that memory and register R1 co
ntains the values tabulated below:
Memory
1000
--1100
--1200
--1300
--1400

Address Value
1400
400
1000
1100
1300

Assuming R1 is implied in the indexed addressing mode, determine the actual valu
e loaded into the accumulator if R1= 200 and fill in the table below:
Please give your answer in at least 25 words and press save and continue button.
S. No. Questions
Marks - 10
________________________________________
1.
How many bits are needed for the opcode? How many bits are left for the
address part of the instruction?
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2.

What is the maximum allowable size for memory?

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3.
What is the largest unsigned binary number that can be accommodated in o
ne word of memory?
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Assignment C
Question No: 1
DMA module takes control of bus in order to transfer data when-Only when the CPU does not need the bus
The data is ready to transfer
Interrupt is being serviced by CPU

None of the above

Question No: 2
The typical microprocessor is most likely to contain-ALU
RAM
Power supply
Audio input pin
Question No: 3
In register addressing mode operands are looked at-IN
In
In
In

CACHE
secondary storage
CPU
primary memory

Question No: 4
The sum of two octal numbers 12 and 17 would be in octal as-21
23
29
31
Question No: 5
The two parts of a microprocessor instruction are called operation and the-Operator
Operand
Observable
None of the above
Question No: 6
A microprocessor has a data bus with 32 lines and address bus with 20 lines. The
maximum number of bits that can be stored in this memory is
32
32
20
20

x
x
x
x

220
232
220
232

Question No: 7
Which memory is faster?
Register
Cache
RAM

Hard disk
Question No: 8
Which of the following gates are called universal gates?
AND and OR
AND and NAND
XOR and XNOR
NAND and NOR
Question No: 9
The decimal number +14 can be represented in 6 bit two s complement format as
010010
101110
001110
110010
Question No: 10
The full adder performs binary addition on-2
3
2
3

binary digits
binary digits
decimal digits
decimal digits

Question No: 11
A reverse polish notation is evaluated with the help of-Stack
RAM
ROM
None of the above
Question No: 12
Pipeline arithmetic units are used to implement-Floating point operations
Multiplication of fixed-point numbers
A) and B) both
None of the above
Question No: 13
In NOR latch, race condition occurs when--R=0,
R=0,
R=1,
R=1,

S=0
S=1
S=0
S=1

Question No: 14
A register which can be incremented or decremented and whose primary function is
point to data, is called-Accumulator
Program Counter
Flat register
Index register
Question No: 15
Which of the following is not arithmetic instruction?
MUL
STORE
INC
NEG
Question No: 16
The number of fetch operations to execute instruction having immediate operand i
s-0
1
2
NON OF THE ABOVE
Question No: 17
In instruction cycle-The indirect cycle is always followed by execute cycle
Fetch cycle is always followed by interrupts
Execute cycle and fetch cycles are simultaneously executed
None of the above
Question No: 18
Which of the following gates recognizes only words that have an odd number of 1s
?
Nand Gate
Exclusive -OR gate
NOR gate
And Gate
Question No: 19
Octal number system is-A
A
A
A

positional system with weights 0 to 9

positional system with weights 0 to 8
positional system with weights 0 to 7
non - positional system with weights 0 to 7

Question No: 20
A CPU has a 16 bit program counter. This means that the CPU can address-16 K memory locations
32 K memory locations
64 K memory locations
256 K memory locations
Question No: 21
The sum of two hexadecimal numbers 23D and 9AA gives the hexadecimal number-AF7
BF6
BE7
BE5
Question No: 22
2's complement of 10101100 is-1010100
1100010
1001001
1100101
Question No: 23
Virtual memory system allows the employment of-The full address space
More space than the address space
More than the hard disk space
Cache memory
Question No: 24
Which of the following memory is not possible?
10 bit address,12 bit cell size, 1024 cells
9 bit address, 8 bit cell size 1024, cells
11 bit address, 8 bit cell size, 1024 cells
10 bit address, 8 bit cell size, 1024 cells
Question No: 25
Pseudo-operation means-Simulation of arithmetic operations
Directive to assembler to perform a specific operation
Those operations which produce single machine instructions
None of the above

Question No: 26
. An attempt to execute illegal of undefined instruction may lead to-TRAP event
I/O interrupt
CPU malfunctioning
None of the above
Question No: 27
In karnaugh map of four variables A, B, C and D, the term-will
will
will
will

cover
cover
cover
cover

a
a
a
a

strip
strip
strip
strip

of
of
of
of

two squares
four squares
three squares
eight squares

Question No: 28
In the memory hierarchy, the fastest memory is-SRAM
Cache
CPU registers
DRAM
Question No: 29
The maximum number of directly addressable location in the memory of a processor
having 10 bits wide control bus, 20 bit address bus and 8 -bit data bus is-1
2
1
2

K
K
M
M

Question No: 30
Relocation of program is possible by-Dynamic programming
Suitably adjusting address sensitive operands in the program
Using appropriate loader
None of these
Question No: 31
What can be used to store one or more bits of data, which can accept and/or tran
sfer information serially?
Parallel registers
Shift registers
Counters
None of these

Question No: 32
To avoid wastage of memory, the instruction length should be-Multiple of character size only
Of word size only
Of word size which is multiple of character size
None of these
Question No: 33
DMA modules can communicate with CPU through-Interrupt
Cycle stealing
Branch instruction
None of these
Question No: 34
The sequence of microinstructions is also known as-Software
Hardware
Firmware
None of these
Question No: 35
The number of select input lines required for an 8 to 1 multiplexer is-1K
2K
1M
None of these
Question No: 36
A CPU has a 16 bit program counter. This means that the CPU can address-16 K memory locations
32 K memory locations
64 K memory locations
256 K memory locations
Question No: 37
The minimum numbers of bits required to represent numbers in the range -50 to 50
is5
7
6
8

Question No: 38
The sum of two hexadecimal numbers 23D and 9AA gives the hexadecimal numbe--r
AF7
BF6
BE7
BE5
Question No: 39
Stored program concept may provide-Maximal use of secondary storage
Program to modify its own instructions
Use of cache memory
None of the above
Question No: 40
Viewing computers single addressable memory of unlimited size is connected with
concept of -Virtual memory
Associative memory
Dynamic memory
None of the above
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