Von

Neumann
and the
Fetch, Decode, Execute
Cycle

Von Neumann Machines

Deni:on from www.webopedia.com
An early computer created by Hungarian mathema:cian John von
Neumann (1903-1957). It included three components used by most
computers today: a CPU ; a slow-to-access storage area, like a hard
drive ; and secondary fast-access memory (RAM ). The machines
stored instruc:ons as binary values (crea:ng the stored program
concept) and executed instruc:ons sequen:ally - the processor
fetched instruc:ons one at a :me and processed them. Today "von
Neumann architecture" oYen refers to the sequen:al nature of
computers based on this model.
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Von Neumann

Von Neumann Machines 2

The computer repeatedly performs the following cycle of events;

1. fetch an instruc:on from memory.
2. fetch any data required by the instruc:on from memory.
3. execute the instruc:on (process the data).
4. store results in memory.
5. go back to step (1).

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Von Neumann

Some Important Proper:es

Data and Program are stored in the same space (Memory)

Thus, the machine can alter its own program or data This is the
property that makes computer viruses possible
Condi:onal gotos to other points in the program
First real general purpose computer is a von Neumann machine
(EDVAC)
Most current micros are von Neumann architecture
Example Excep:on PIC Microcontrollers (MTRX3700)

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Von Neumann

Von Neuman Hardvard Architecture

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Von Neumann

An Example
From your textbook (star:ng on page 31)

Consider the assembly instruc:ons:


CLRA
;clears accumulator A (sets to 0)


LDAA #$5C ;loads accumulator A with $5C

This is translated by the assembler to (assume base address of
E000):
Address
Opcode Operand


E000
4F


E001
86 5C
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Von Neumann

Fetch, Decode, Execute 1

Fetch, Decode
CLRA

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Von Neumann

Fetch, Decode, Execute 2

Execute
CLRA

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Fetch, Decode, Execute 3

Fetch, Decode
LDAA

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Fetch, Decode, Execute 4

Execute
LDAA

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Assembly Instruc:ons and Execu:on

Dierent assembly language instruc:ons (Opcodes) take a certain

number of clock cycles to execute

For example (refer to table 10-1 in the data book)

LDAA #$5C takes 2 clock cycles
INY (increment register Y) takes 4 clock cycles

INY has a two-byte opcode, 18 6E. Two byte opcodes were introduced
as a way of adding extra instruc:ons without breaking compa:bility with
the older 6800 series of processors

This is why INY takes 4 clock cycles (new instruc:on) while INX (opcode
08) only takes 3.

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