Professional Documents
Culture Documents
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Agenda
Foundation of Electronics
Component Placement
Power Distribution
Test Results
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Why Do I Care?
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Why Do I Care?
The
packaging?
The
The
microcontroller?
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Why Do I Care?
Software
Correct
Efficient
PCB design!
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Why Do I Care?
Usually
Usually
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What Changes?
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What Changes?
IC technology was described as % shrink from Integer
Design Rules
Circuit-based approach usually was close enough
IC technology now described in nanometers
Circuit-based approach completely falls apart
EM field (physics) based approach essential
EMC standards have changed
Lower frequency compliance requirements
Higher frequency compliance requirements
Lower emission levels allowed
Greater immunity required
The playing field and the equipment have changed!
This really is a brand new game!
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Freescale, of course!
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Old
Time
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Geometry is critical.
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Foundation of Electronics
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Myths We Depended On
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What is Electricity?
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What is Electricity?
In high clock rate (and rise time) circuits, once the "quasi static
approximation does not hold true anymore, field control plays a
critical role
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Maxwells Equations
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Maxwells Equations
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A shielded enclosure
with an opening
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Energy Management
A capacitor is:
A conductor geometry that
concentrates the storage of
electric field energy
An inductor is:
A conductor geometry that
concentrates the storage
of magnetic field energy
In a capacitor
Field energy is stored in
the space between the
plates
In an inductor
Field energy is stored in
the space around wires
and in gaps
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Energy Management
Why does field energy follow conductors?
Why does water flow in a stream?
Same
reason
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Energy Management
Transmission lines are convenient paths for energy flow:
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= 150 mm / ns or 6 / ns
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Note: This is not a curve, but a series of step functions. The amplitude of the step is
determined by the impedance of the transmission line and the width of the step is
determined by the length of the transmission line and a two way transition for the wave.
(Slide compliments of Ralph Morrison, Consultant)
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to capacitors
Connections to IC dies
Lead frames and wire bonds
BGA interposers
Traces to vias
Vias to ground/power planes
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Transmission Lines
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Energy Management
All energy is moved by wave action!
When a switching element closes, this results in a drop in the voltage on the power supply. The
resulting field energy request wave travels until this request is filled or it radiates.
The only way to reduce noise in a system is to reduce this distance and provide adequate
sources of electromagnetic field energy.
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wave length
1 Hertz
Rise time equivalent, who cares
10 Hertz
Rise time equivalent, still who cares
100 Hertz
Rise time equivalent, .01 seconds
1 KHz
Rise time equivalent, 1 millisecond
10 KHz
Rise time equivalent, 100 microseconds
100 KHz
Rise time equivalent, 10 microseconds
1 MHz
Rise time equivalent, 1 microsecond
10 MHz
Rise time equivalent, 100 nanoseconds rise time distance, 100 feet
24.6 feet
Across the room
2.46 feet
Less than a yard
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+1
0
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1/4
90
-1
1/2
180
3/4
270
0
4/4
360
wave length
10 MHz
HMOS
Rise time equivalent, 100 nanoseconds
rise time distance, 100 feet
24.6 feet
Across the room
2.46 feet
Less than a yard
100 GHz
32 nm HCMOS
Rise time equivalent, 10 picoseconds
rise time distance, 0.12 inches
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DEVICE TYPE
RISETIME
Inner (inch/mm)
Outer (inch/mm)
Standard TTL
Schottky TTL
10K ECL
ASTTL
FTTL
BICMOS
10KH ECL
100K ECL
GaAs
5.0 ns
3.0 ns
2.5 ns
1.9 ns
1.2 ns
0.7 ns
0.7 ns
0.5 ns
0.3 ns
7.27 / 185
4.36 / 111
3.63 / 92
2.76 / 70
1.75 / 44
1.02 / 26
1.02 / 26
.730 / 18
.440 / 11
9.23 / 235
5.54 / 141
4.62 / 117
3.51 / 89
2.22 / 56
1.29 / 33
1.29 / 33
.923 / 23
.554 / 14
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Wave Reflection
Reflection Coefficient
Reflection:
Z2 Z1
Z 2 + Z1
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5V
V
5V
V
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V
2x V
V
2x V
V
From a low impedance to a high impedance, the wave voltage is doubled and reflected. From a high
impedance to a low impedance, the wave voltage is inverted and reflected.
This is called ringing and continues until all of the energy is either transferred to the receiver,
converted to heat in the dielectric, or radiates.
(Slide compliments of Ralph Morrison, Consultant)
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Rise time distance is how far the wave travels by the time it reaches full amplitude.
Determined by the switching speed of the output driver
In digital circuits, this is really wavelength, or 180 degrees!
Lets look at this from a switching speed vs. lumped distance perspective.
Remember, lumped distances are basically the size of a
discontinuity which remains invisible to the energy flow.
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1
0
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0
1/2
180
2/2
360
Frequency
5 MHz
HMOS
Rise time equivalent, 100 nanoseconds
Rise time distance, 100 feet
16.4 feet
In the room
1.64 feet
Anywhere on the board
50 GHz
32 nm HCMOS
Rise time equivalent, 10 picoseconds
Rise time distance, 0.12 inches
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The wave requesting the energy (seen as a dip in the power supply
caused by the switching event) has to travel to the source and back
to the switch.
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5 MHz
HMOS
Rise time equivalent, 100 nanoseconds
Rise time distance, 100 feet
4.92 feet
Somewhere in the room
.492 feet
Somewhere on the board, should be routed
as co-planar pairs
50 GHz
32 nm HCMOS
Rise time equivalent, 10 picoseconds
Rise time distance, 0.12 inches
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If the energy source is not inside the 1/20 wavelength distance, there will
be radiated energy caused by the switching event.
As the geometry of the ICs we use continues to shrink, so does the area of
effective power delivery.
Even if they are outside of the zone, they can minimize the amount of
radiated energy.
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driver does not know what is at the end of the transmission line
The driver only sees a short circuit until after a reflection occurs
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to planar copper
Adjacent to ground trace
Any
Any
This is a very serious problem and a big change from normal board
design philosophy
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Any failure to insure that both signal and ground copper are
contiguous (and adjacent) results in large discontinuities that will
cause signal integrity and EMC issues
Vertical
This
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Where Do We Start?
by previous product
Customer requirements
Placement
1. Pre-defined components / usually connectors
2. Filter components / high priority, must be as close to the pins as
allowed by manufacturing
3. Power control / as close to connector involved as possible
Voltage regulators
Power switching devices
See number 2 above
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complexity
Reduced trace length
Improved EMC performance
on MCUs
A/D pins on MCUs
Address and data lines to memories
No,
the memory does not care what you call each pin.
They are just address and data, not Addr14 or Data12
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This can be applied when you are not allowed sufficient returns,
but will improve EMC
DCAGACDCBAP
DCBABCDCAGP
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IC
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Shorter traces
Cleaner returns
Reduced field volumes (Yes, this is a three-dimensional consideration)
Bypass capacitors, Inductors, resistors
Use the largest value capacitor in the smallest package allowed by
manufacturing and reliability3
3
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If the traces are not near each other, there is no magic that
will cause them to interfere with each other.
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Power Distribution
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The first and most important job is to route the power distribution
network it is the source of all of the electromagnetic energy you will
be managing on the PCB.
On low layer count boards, with no dedicated ground plane, the power
lines must be routed in pairs
Power
and ground
Side by side
Trace
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Bulk
Cap
HF
Bulk
Cap
Cap
GND
VDD
VREG
Minimize loop area, or field volume
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HF
Cap
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GND
VDD
Input Filter
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GND
VDD
No crosstalk here!
Input Filters
Routed Triplet
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Signal
Signal
Signal
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Signal
Ground
Signal
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Routed Triplet
No crosstalk here! Well-defined transmission lines
Secondary Side
Input Filters
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GND
VDD
Input Filters
Referenced to second ground pin
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No crosstalk here!
Routed Triplet
Routed Triplets
Routed Triplets
MCU
GND
Mini-Plane
VDD
Local Charge
Source
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VDDI
GND
Internal
Regulator
Lead frame and wire bonds are parts of transmission lines, too
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Oscillator ground must be routed to MCU pin, not tied to System Ground
Connect System Ground on the opposite side of the MCU pin
C1
R1
XTAL
EXTAL
VSSPLL
Y1
C2
Widen this trace to flood the area between the signal traces
to reduce the impedance to the absolute minimum possible.
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VSS
PLL
EXTAL
Y1
C2
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Energy flows out, between the MCU output signal trace and MCU oscillator ground trace to the crystal or
resonator
Energy flows back, between the crystal output signal trace and the oscillator ground trace to the MCU
input pin
Another important fact is that this is a low amplitude, low frequency, analog circuit. It is not
required to be placed as close as possible to the MCU, just that it must be connected with
transmission lines as described above. Moving these components can allow for placement and
routing of more criticial components in the area near the MCU.
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Test Results
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MC9S12XD128 MCU
Designed
Two-layer PCB
Business card dimensions
Implements these design and layout concepts
Smart
connector pinout
MCU mini-plane
Triplet routing
Maximum flooding
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70.0
60.0
Amplitude (dBuV/m)
50.0
40.0
30.0
20.0
10.0
0
10.0M
100.0M
Frequency (Hz)
Horizontal Data
Limit A
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80.0
Amplitude (dBuV/m)
70.0
60.0
50.0
40.0
30.0
1.0G
10.0G
Frequency (Hz)
Limit Class A
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Horizontal Data
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WOW!
What would you do for 30 db?
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Radiated immunity
The EUT failed with all LEDs turning off. Manual restart worked. The frequencies that caused this fault
were 110 MHz, 112 MHz, 134 MHz and 136 MHz up to 149 MHz. After 149 MHz, the EUT worked
properly.
I know, check the chart to see what the wave length would be.
Aha, the USB cable! I forgot to put a filter on the USB power supply. Add a cap quick.
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wave length
1 Hertz
Rise time equivalent, who cares
10 Hertz
Rise time equivalent, still who cares
100 Hertz
Rise time equivalent, .01 seconds
1 KHz
Rise time equivalent, 1 millisecond
10 KHz
Rise time equivalent, 100 microseconds
100 KHz
Rise time equivalent, 10 microseconds
1 MHz
Rise time equivalent, 1 microsecond
10 MHz
Rise time equivalent, 100 nanoseconds rise time distance, 100 feet
24.6 feet
Across the room
2.46 feet
Less than a yard
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board warping
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C Stage Core
Copper Foil
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Four-Layer Boards
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Four-Layer Boards
Ground transition vias are required when signals go from layer 4 to any
other layer to insure the transmission line is continuous
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Six-Layer Boards
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Using Planes
Using Capacitors
Impedance
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proximity
Using Planes
When routing signals with returns between power and ground
planes, return energy will transfer as follows:
Signal
Return
Ground
Power
Signal
Return
Ground
Power
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Using Planes
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Using Planes
That
You must provide the path you want, or the field will
find its own path
It
will most likely be the one that causes the most problems!
1 Statement
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Differential signals are referenced to each other only when twisted pair
wiring is used, NOT on PCBs
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For a typical 500 MHz DDR memory interface, the data lines only need
to be within 500 mils of each other in length 2
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02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
VSS
MVTT0
ddr_ras
ddr_cke
ddr_address[0]
ddr_address[5]
ddr_address[4]
ddr_address[7]
ddr_address[11]
PF15
PF14
PF10
PG12
PF9
PF7
PF1
PK1
PJ14
PL12
PL10
PG5
VDDE
ddr_dq[30]
VDDE_DDR
ddr_cs
ddr_web
ddr_ba[0]
ddr_ba[2]
ddr_address[3]
ddr_address[9]
ddr_address[13]
VDDE_DDR
PF12
PF8
PF6
PF0
PB2
PJ12
PM2
PG11
PG7
PG6
PG4
PA13
ddr_dq[26]
ddr_dq[29]
ddr_dq[31]
ddr_odt
ddr_dram_clk
ddr_cas
ddr_ba[1]
ddr_address[1]
ddr_address[8]
ddr_address[12]
PF13
PF3
PK0
PF11
PJ13
PL11
PG3
PG2
VREFH_RSDS2
PG1
PG0
PA12
ddr_dq[25]
ddr_dq[28]
ddr_dq[24]
VDDE_DDR
ddr_dram_clkb
ddr_address[6]
ddr_address[2]
ddr_address[14]
ddr_address[10]
ddr_address[15]
VDDE
PF5
PF4
PB3
PJ15
PL13
PA14
PA15
VREFH_RSDS1
PA10
PA9
PA8
ddr_dm[3]
ddr_dqs[3]
ddr_dq[27]
VDDE_DDR
PA4
PA11
PA6
PA7
ddr_dq[19]
ddr_dq[20]
ddr_dq[23]
ddr_dq[22]
PA5
PA3
PA2
PA1
ddr_dq[16]
ddr_dq[18]
ddr_dq[21]
ddr_dq[17]
PJ0
PM12
PM13
PA0
ddr_dqs[2]
ddr_dm[2]
ddr_dq[12]
ddr_dq[9]
ddr_dq[15]
ddr_dq[14]
ddr_dq[13]
VDDE_DDR
VDDE
MVTT0
ddr_dq[11]
ddr_dq[10]
MVREF
ddr_dq[8]
ddr_dqs[1]
ddr_dm[1]
ddr_dq[4]
ddr_dq[7]
ddr_dq[3]
ddr_dq[1]
ddr_dq[6]
ddr_dqs[0]
ddr_dq[5]
ddr_dq[0]
RESET
PO7
PO6
PO5
PO4
VSS
VSS
VSS
VDD12
VDD12
PO0
PO1
PO2
PO3
VDDE
VSS
VSS
VDD12
VDD12
VDD12
PN15
PN14
PN13
PN12
VDDE
VDDE
VSS
VDD12
VDD12
VDD12
PE7
PE6
PE3
PE2
ddr_dm[0]
VDDE
VDDE
VSS
VSS
VSSM_SMD
VDDM_SMD
PE5
PE4
PE1
PE0
ddr_dq[2]
VDDE_DDR
VDDE
VDDE
VSS
VSS
VSSM_SMD
VDDM_SMD
PD15
PD14
PD11
PD10
PB0
PJ8
VDDE
VDDE
VSS
VSS
VSSM_SMD
VDDM_SMD
PD13
PD12
PD9
PD8
PJ10
PB11
PJ1
PD7
PD6
PD3
PD2
VSS
PJ11
PL5
PJ2
PD5
PD4
PD1
PD0
XTAL
PL6
VRC_CTRL
VDDREG
PC0
PC1
PC2
PC3
EXTAL
VREG BYPASS
VDDPLL
PL4
PC4
PC5
PC6
PC7
VSUP_TEST
PJ9
PM4
PN0
PK3
PK8
PH2
PB13
PK11
PN2
PN6
PN10
PB7
PJ7
PB5
MDO4
MDO8
MDO0
VSSA
PC8
PC9
PC10
PG8
PG10
PM3
PN1
PK4
PK9
PH3
EVTI
PN3
PN9
PJ4
PB4
MSEO2
MDO9
MDO11
MDO3
PL1
PL3
VDDA
VSSEH_ADC
PC11
PC12
PG9
PB10
PL7
PK2
PK6
PH1
PF2
EVTO
PM1
PN5
PN8
PB8
PJ6
MCKO
PB6
MDO6
MDO10
MDO7
PL2
PL0
VDDEH_ADC
PC13
PB1
PL8
PL9
PK5
PK7
PH0
PB12
PK10
MSEO
PM0
PN4
PN7
PN11
PB9
PJ5
PJ3
PH4
MDO5
MDO1
MDO2
PC15
PC14
10
11
12
13
14
15
16
17
18
19
20
21
22
AA
AA
AB
AB
Only 14 VSS (blue) pins, but package met original marketing price target.
Significant issues with signal integrity and EMC. Notice, only one VSS for then
entire DDR interface.
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Worked with customer to discuss need for larger package with more pins.
Used a mixture of 3x3 grids with center pin VSS (green) for outer balls and checkerboard approach to center power balls
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Fundamentals to Remember
Electromagnetic fields travel in the space between the conductors, not in the
conductors
The switching speed of the transistors determines the frequency of operation,
not the clock rate
Signal and power connections need to be one dielectric from ground for their
entire length (including layer transitions)
Adjacent plane
Co-planar trace
In a 4-layer design, if one layer is a ground plane, the two adjacent layers are one
dielectric from ground.
The 4th layer must be routed as if it were a single layer board.
There is no such thing as a noisy ground, just poor transmission line design
To quote Dr. Todd Hubing, Thou shalt not split ground.
Any compromises to these rules will increase system noise and must be done as
carefully considered engineering decisions.
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Right the First Time: A Practical Handbook on High Speed PCB and System Design
Volumes I & II, Lee W. Ritchey. Speeding Edge, ISBN 0-9741936-0-7
High Speed Digital Design: A Handbook of Black Magic, Howard W. Johnson &
Martin Graham. Prentice Hall, ISBN 0-13-395724-1
High Speed Signal Propagation: Advanced Black Magic, Howard W. Johnson &
Martin Graham. Prentice Hall, ISBN 0-13-084408-X
Signal Integrity Issues and Printed Circuit Design, Doug Brooks. Prentice Hall, ISBN
0-13-141884-X
(Slide compliments of Rick Hartley, Consultant)
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EMC for Product Engineers, Tim Williams. Newnes Publishing. ISBN 0-75062466-3
Grounding & Shielding Techniques, 5th Edition, Ralph Morrison. John Wiley &
Sons, ISBN 0-471-24518-6
(Slide compliments of Rick Hartley, Consultant)
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Additional References
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Closing Remarks
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Q&A
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