FT/GN/68/00/21.04.

15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 1 of 8
LP: EC6304

Department of Electronics and Communication Engineering

B.E: Electronics and Communication Engineering
Regulation:2013
PG Specialization

:Not Applicable

Rev. No: 01
Date: 26/06/2015

Sub. Code / Sub. Name : EC6304 /Electronic Circuits-I

Unit

:I
Unit Syllabus : BIASING OF DISCRETE BJT AND MOSFET
9
Rectifiers with Filters -DC Load line, operating point, various biasing methods for BJTDesign-Stability-Bias compensation, Thermal stability, Design of biasing for JFET, Design of
biasing for MOSFET.
Objective: To Learn about Biasing of BJTs and FETs.

Session
No *

Topics to be covered

Ref
1-Ch.5;pg303-309
2-Ch.9;pg378-419

Teaching
Aids

Introduction to BJT

BJT -DC Load line, Operating point

Various biasing methods for BJT

Stability - Various biasing methods

Tutorial

Bias compensation

Thermal stability

Tutorial

Design of Biasing for JFET

10

Tutorial

11

Design of biasing for MOSFET

12

Rectifiers

6-Ch.9;pg282-390
8-Ch.4pg185-220
8-Ch.5;pg268-281
6-Ch.10;pg335-338
8-Ch.5;pg313-370
6-Ch.9;336-347
8-Ch.5;pg287-290
2-Ch4;pg280-285
8-Ch.2;pg74-77,

13

Rectifiers with Filters

8-Ch.18;859-867

PPT,BB

14

Tutorial

8-Ch.9;pg509-590
2-Ch.6;pg280-287

PPT,BB

3-Ch.5;pg181-187
8-Ch.4;pg185-188
8-Ch.4;pg185-208
6-Ch.9;pg282-287
6-Ch.9;pg290-299
3-Ch5;pg188-202
6-Ch.9;pg282-390
6-Ch.9;pg299-302
6-Ch.9;pg306 -307

PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
PPT,BB
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Content beyond syllabus covered (if any): Course Outcome 1: Students will be able to design various biasing circuits for all the type of transistors to
keep the operating point Stable .

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY
* Session duration: 50 minutes

Page 2 of 8

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 3 of 8
LP: EC6304

Department of Electronics and Communication Engineering

B.E: Electronics and Communication Engineering
Regulation:2013
PG Specialization

:Not Applicable

Rev. No: 01
Date: 26/06/2015

Sub. Code / Sub. Name : EC6304 /Electronic Circuits-I

Unit

: II
Unit Syllabus : BJT AMPLIFIERS
9
Small signal Analysis of Common Emitter-AC Load line, Voltage swing limitations, Common
collector and common base amplifiers Differential amplifiers- CMRR- Darlington
Amplifier- Bootstrap technique - Cascaded stages - Cascode Amplifier.
Large signal Amplifiers-Class A, Class B and Class C power Amplifiers.
Objective: To Design and construct the Small Signal model of BJT Amplifiers.

Session
No *
15
16
17

Topics to be covered

Small signal Analysis of BJT- Common Emitter

Small signal Analysis of Common Emitter-AC Load line,
Voltage swing limitations
Small signal Analysis of Common Collector and common
Base amplifiers

Ref

Teaching
Aids

1-Ch.8;pg399-401,
3- Ch.6 ;pg470-476
9-ICT

PPT,BB

6-Ch.8;pg233-269

PPT,BB

3-Ch.6;pg477-483
6-Ch.8;pg263-265

PPT,BB

18

Tutorial

6-Ch.8;pg249-281

PPT,BB

19

Differential amplifiers- CMRR

1-Ch7;pg750-788
2-Ch.7;pg704-709

PPT,BB

7- Ch.7;pg 350-358

PPT,BB

CAT-I
20

Darlington Amplifier- Bootstrap technique

21

Tutorial

22

Cascaded stages

6-Ch.8;pg280-281
2-Ch.7pg;704-725
8-Ch.12;pg 649-653

23

Cascode Amplifier

3-Ch.12;pg512

PPT,BB

24

Tutorial

6-Ch.8;pg280-281

PPT,BB

25

Large signal Amplifiers-Class A, Class B and Class C

power Amplifiers

1- Ch.8;pg(561-593)
7-Ch.5;pg(220-250)

PPT,BB

26

Tutorial

2-Ch.7;pg745-776

PPT,BB

PPT,BB
PPT,BB

Content beyond syllabus covered (if any):

Course Outcome 2: Students will be able to design and analyze the small signal equivalent circuits of BJT
Amplifiers

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 4 of 8

* Session duration: 50 mins

LP: EC6304
Department of Electronics and Communication Engineering
B.E: Electronics and Communication Engineering
Regulation:2013
PG Specialization

:Not Applicable

Rev. No: 01
Date: 26/06/2015

Sub. Code / Sub. Name : EC6304 /Electronic Circuits-I

Unit

: III
Unit Syllabus : JFET AND MOSFET AMPLIFIERS
9
Small signal analysis of JFET amplifiers- Small signal Analysis of MOSFET and JFET,
Common source amplifier, Voltage swing limitations, Small signal analysis of MOSFET and
JFET Source follower and Common Gate amplifiers, - BiMOS Cascode amplifier.
Objective: To Design and construct the Small Signal model of FET Amplifiers.

Session
No *

27
28

Topics to be covered

Small signal analysis of JFET amplifiers- Common source

amplifier
Small signal analysis of JFET Common source amplifiersVoltage swing limitations

Ref

Teaching
Aids

8-Ch.8;pg 485-505

PPT,BB

2-Ch.4;pg 290-310

PPT,BB

29

Small signal Analysis of JFET amplifiers- Source follower

8-Ch.8;pg502-504

PPT,BB

30

Tutorial

8-Ch.9;pg485-546

PPT,BB

Small signal Analysis of JFET amplifiers- Common Gate

amplifiers
Small signal Analysis of MOSFET- Common Source
amplifier,

8-Ch.8;pg505-508

PPT,BB

1-Ch.11;pg219-230
4-Ch.1;pg46-76

PPT,BB

33

Tutorial

8-Ch.9;pg510-546

PPT,BB

34

Small signal Analysis of MOSFET- Source follower

1-Ch.11;pg231-238
2-Ch.4;pg315-318

PPT,BB

35

Small signal Analysis of MOSFET- Common Gate

amplifiers

1-Ch.11;pg239-242
2-Ch.4;pg311-314

PPT,BB

Tutorial
Double cascode and Folded cascode amplifier
BiMOS Cascode amplifier

8-Ch.9;pg510-546
2-Ch.6;pg613-628
1-Ch.11;pg262-268

PPT,BB

Tutorial

2-Ch.6;pg628,677

PPT,BB

31
32

36
37
38

PPT,BB

CAT-II
Content beyond syllabus covered (if any): Double cascode and Folded cascode amplifier
Course Outcome 3: Students will be able to design and analyze the small signal equivalent circuits of FET
Amplifiers

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 5 of 8

* Session duration: 50 mins

LP: EC6304
Department of Electronics and Communication Engineering
B.E: Electronics and Communication Engineering
Regulation:2013
PG Specialization

:Not Applicable

Rev. No: 01
Date: 26/06/2015

Sub. Code / Sub. Name : EC6304 /Electronic Circuits-I

Unit

: IV
Unit Syllabus : FREQUENCY ANALYSIS OF BJT AND MOSFET AMPLIFIERS
9
Low frequency and Miller effect, High frequency analysis of CE and MOSFET CS amplifier,
Short circuit current gain, cut off frequency f and f unity gain and Determination of
bandwidth of single stage and multistage amplifiers.
Objective:To Study about the Frequency response of Amplifiers.

Session
No *

Topics to be covered

Ref

Teaching
Aids

39

BJT -Low frequency and Miller effect

4-Ch.6;pg166-167
6-Ch.8;pg 233-274

PPT,BB

40

High frequency analysis of CE

2-Ch.5;pg485-487
6-Ch.11;pg348-361

PPT,BB

41

Short circuit current gain, cut off frequency f and f unity

gain

5-Ch.7;pg178-179
8-Ch.11;Pg624-631

PPT,BB

42

Tutorial

8-Ch.10;Pg550-565

PPT,BB

43

Low frequency analysis of MOSFET CS amplifier

44

High frequency analysis of MOSFET CS amplifier

45

Tutorial

46

Determination of bandwidth of single stage

47

Tutorial

Determination of bandwidth of multistage amplifiers CE

amplifiers
Determination of bandwidth of multistage amplifiers high
49
frequency - CE amplifiers
50
Tutorial
Content beyond syllabus covered (if any):
48

2-Ch.4;pg320-327,10ICT
8-Ch.11;pg616-623
4-Ch. 6;pg172-177
8-Ch.11;pg631-635
8-Ch.11;Pg569-590
2-Ch.4;pg491-497
8-Ch.11;pg598-607

PPT,BB
PPT,BB
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8-Ch.11;Pg589-590

PPT,BB

6-Ch.12;pg395-400
8-Ch.11;pg-635-638

PPT,BB

6-Ch.12;pg395-400

PPT,BB

8-Ch.11;Pg635-648

PPT,BB

Course Outcome 4: Students will be able to design and analyze the Frequency Response of Amplifiers

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 6 of 8

* Session duration: 50 mins

LP: EC6304
Department of Electronics and Communication Engineering
B.E: Electronics and Communication Engineering
Regulation:2013
PG Specialization

:Not Applicable

Rev. No: 01
Date: 26/06/2015

Sub. Code / Sub. Name : EC6304 /Electronic Circuits-I

Unit

:V
Unit Syllabus : IC MOSFET AMPLIFIERS
9
IC Amplifiers- IC biasing Current steering circuit using MOSFET- MOSFET current sourcesPMOS and NMOS current sources. Amplifier with active loads - enhancement load,
Depletion load and PMOS and NMOS current sources load- CMOS common source and
source follower- CMOS differential amplifier-CMRR.
Objective: To Design and Construct amplifiers with active loads.
Topics to be covered

Session
No *
51

IC Amplifiers- IC biasing Current steering circuit using

MOSFET

52

MOSFET current sources- PMOS and NMOS current sources

53

Tutorial
Amplifier with active loads - enhancement load, Depletion
load
Amplifier with active loads - PMOS and NMOS current
sources

54
55

Ref

Teaching
Aids

2-Ch.6;pg562-565
5-Ch.1;pg255-257

PPT,BB

1-Ch.11;pg704-715
4-Ch.5;pg (135-154)
2-Ch.6;pg666-668

PPT,BB
PPT,BB

1-Ch.11;pg721-730

PPT,BB

2-Ch.6; pg582-583
1-Ch.11;pg729-730

PPT,BB

2-Ch.6;pg666-668

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56

Tutorial

57

CMOS common source and source follower

58

Tutorial

2-Ch.6;582-587
2-Ch.6; pg635-638
2-Ch.6;pg680-681

59

CMOS differential amplifier-CMRR

1-Ch.11;pg795-821

PPT,BB

60

Tutorial

2-Ch.6;pg780-785

PPT,BB

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CAT-III
Content beyond syllabus covered (if any):
Course Outcome 5: Students will be able to design and analyze the different types of current mirror used for
biasing.

* Session duration: 50 mins

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 7 of 8

Sub Code / Sub Name: EC6304 /Electronic Circuits-I

Mapping CO PO:
PO1

PO2

PO3

CO1

CO2

CO3

CO4

CO5

PO4

PO5

PO6

PO7

PO8

PO9

PO10

PO11

A Excellent ; B Good ; C - Average

TEXT BOOK
1. Donald .A. Neamen, Electronic Circuit Analysis and Design 2nd Edition, Tata Mc Graw Hill,
2009.

REFERENCES:
2.Adel .S. Sedra, Kenneth C. Smith, Micro Electronic Circuits, 6th Edition, Oxford
University Press, 2010.
3.David A., Bell Electronic Devices and Circuits, Oxford Higher Education Press, 5th
Editon, 2010
4.Behzad Razavi, Design of Analog CMOS Integrated Circuits, Tata Mc Graw Hill,
2007.
5.Paul Gray, Hurst, Lewis, Meyer Analysis and Design of Analog Integrated Circuits,
4thEdition ,John Willey & Sons 2005.
6.Millman.J. and Halkias C.C, Integrated Electronics, Mc Graw Hill, 2001.
7.D.Schilling and C.Belove, Electronic Circuits, 3rd Edition, Mc Graw Hill, 1989.
8.Robert L.Boylestad and Louis Nasheresky,Electronic Devices and Circuit Theory,
10 th Edition,peaeson Education/PHI,2008
9. http://nptel.ac.in
10. http://freevideolectures.com/Course/2312/Basic-Electronics/15#

PO12

FT/GN/68/00/21.04.15

SRI VENKATESWARA COLLEGE OF ENGINEERING

COURSE DELIVERY PLAN - THEORY

Page 8 of 8

Prepared by

Approved by

Mr.S.R. Balasubramanian
Ms.M.Anushya

Dr.S Ganesh Vaidyanathan

Assistant Professor

HOD-EC

Signature
Name
Designation
Date
Remarks *:

Remarks *:

* If the same lesson plan is followed in the subsequent semester/year it should be mentioned
and signed by the Faculty and the HOD