Professional Documents
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Prof. D. Manstretta
LEZIONI DI
FILTRI ANALOGICI
Danilo Manstretta
AA 2012-13
AA2012-13
Prof. D. Manstretta
AA2012-13
Prof. D. Manstretta
equivalent circuit
i1
ee+
e2
Ro
e+
e2
Ri
A(e+-e-)
e-
AA2012-13
Prof. D. Manstretta
equivalent circuit
i1
ee2
e2
e+
e+
Gm(e+-e-)
Ro
Co
e-
AA2012-13
Prof. D. Manstretta
B2
biquads
B3
AA2012-13
Prof. D. Manstretta
SINGLE-OTA BIQUADS
Sallen-Key, Rauch
AA2012-13
Prof. D. Manstretta
C1
C2
1
R2 R3
R3
R2
R1
R2
R3
1
R2 R3C1C2
G
() =
2 1
2 3
1 + 2 2 + 3 +
+ 2 1 2 2 3
1
R2
R1
AA2012-13
Prof. D. Manstretta
0 =
1
2 2
1
1 + 4 + 2 82 2
Q=1/2
G = -1
AA2012-13
Prof. D. Manstretta
AA2012-13
Prof. D. Manstretta
10
AA2012-13
11
Prof. D. Manstretta
R1
R2
R1R2C 1C 2
1
C2
Rb
Ra
() =
1 2 1 2
1
1
1
1
+
+
+
+ 2
1 2 1 2
1 1 2 1 2 2
02+s0/Q+s2
R1R2C 1C 2
1
1
1
AA2012-13
12
Prof. D. Manstretta
0=1/(RC)
G=3-1/Q
Note: Q is independent of R,C
Design 2. G=2 (Ra=Rb), C1=C2=C
1
R1R2C 1C 2
1
R1R2C 1C 2
Q
1
1
1
02=1/(R1R2C2)
R1=Q/0C
Note: R1/R2=Q2
Design 3. G=1, R1=R2=R
02=1/(R2C1C2)
C1=2Q/0C ; C2=1/2Q0C
Note: C1/C2=4Q2
AA2012-13
13
Prof. D. Manstretta
E2=A0(E4-V-)
E4
C1
R1
E3
0 = 1 +
R2
E1
E2
E
Ra 2
R a Rb
A0
E2
E4
C2
1
1
E4 E2
0 A0
1/
Rb
Ra
E2 E4
=
1+
0
0
AA2012-13
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Prof. D. Manstretta
implementation:
C1=2C2=2C
2C
R1=R2=R
=1
R
E2
E1
E3
() =
0 =
1
1 + 2 + 2 2 2 2
1
2
Q=1/2
G=1
E4
C
AA2012-13
15
Prof. D. Manstretta
2
2 =
0 = 1 +
1
0
1 = 40 2 +
1 + 1 + 2 2
() =
0 + 1 + 2 2 + 3 3
2 + 0
2 = 20 2 2 + 4 + 20
2
3 = 2 0
AA2012-13
16
Prof. D. Manstretta
frequency!
The frequency of the zeros is
1
2
+ 2 2 2 2 1 +
1+
AA2012-13
Prof. D. Manstretta
TWO-OTA BIQUADS
Fleisher-Tow, KHN, Tow-Thomas
17
AA2012-13
Prof. D. Manstretta
Fleischer-Tow Biquad
G
R 2
s R R1
1
s
R
R1C1 R 5 R 4 R3 R 6 C1C2
E2
5
s
1
E1
s2
R1C1 R2 R 3 C1C2
R2
R6
1
R2 R3C1C2
R1
R2 R3
C1
C2
AA2012-13
19
Prof. D. Manstretta
Kerwin-Huelsman-Newcomb (KHN)
R5
C
R6
E1
R1
R3
C
R2
E2
R4
Q
G02
E2
E1 s 2 0 s 2
0
Q
R5 R3 R4
R3 R5 R6
R6 R1C1
R5 R2C2
R6
1
R5 R1 R2C1C2
R4 R5 R6
R6 R3 R4
AA2012-13
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Prof. D. Manstretta
E1
b1
0
QP
a0
-1/s
a0 b0 02
Rb0
C
a0
E2
2
E1 s b1s b0
E2
-1/s
E1
Ra0
R
E2
Rb1
AA2012-13
21
Prof. D. Manstretta
Tow-Thomas
R3
R1
C
R4
E1
R
R2
1 R2 R4C 2
E2
E1 s 2 s 1
R1C R2 R3C 2
R
E2
G02
E2
E1 s 2 0 s 2
0
Q
R3
R4
1
R2 R3 C
R1
R2 R3
AA2012-13
Prof. D. Manstretta
circuit?
Lets consider the impact of circuit limitations on the active
integrator, the basic building block of high order filters
designs.
22
AA2012-13
23
Prof. D. Manstretta
OTA-RC Integrator
C
VIN
Ideal integrator:
R
VO
gm(V--V+)
v IN
v0
sRC
RO
CO
parameters
Derive design guidelines for the OTA
AA2012-13
Prof. D. Manstretta
Output capacitance
Study effect on poles Q:
define Integrator quality factor (QINT)
24
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Prof. D. Manstretta
Finite DC Gain
Neglect output/load capacitance (C0=0), Gm is very large
but the DC gain (GmR0) is finite and equal to A0.
1
vO
sC Gm sC v
RO
R
vIN
iIN
e+
Gm(e+-e-)
v0
Ro
v v
v
iIN IN
v vO sC Gm v O
R
RO
1 sC vO
v
O
Gm
AO Gm AO
v IN
1
vO v 1
sRC
sRC
vO
A0
v IN 1 sRC 1 A0
AA2012-13
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Prof. D. Manstretta
vO
A0
v IN 1 sRC 1 A0
PHASE
AA2012-13
Prof. D. Manstretta
27
v IN 1 sRC 1 A0
vO
180 arctan 1 A0
v IN
0
AA2012-13
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Prof. D. Manstretta
Finite Gm
Neglect output/load capacitance (C0=0) and conductance:
DC gain is infinite but Gm has a finite value.
vO sC Gm sC v
R
vIN
iIN
e+
v0
G
vO v 1 m
sC
Gm(e+-e-)
v IN
1
v Gm
R
R
v v
iIN IN
v vO sC Gm v
R
vO 1 sC Gm
v IN sC R 1 Gm
AA2012-13
29
Prof. D. Manstretta
Finite Gm (2)
AMPLITUDE
vO 1 sC Gm
vIN sC R 1 Gm
PHASE
z = 100 0
AA2012-13
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Prof. D. Manstretta
Finite Gm (3)
z = 100 0
1 s z
vO
v IN sC R 1 Gm
vO
90 arctan
v IN
z
z = Gm/C
AA2012-13
31
Prof. D. Manstretta
v IN
1
vO v 1
sRC
sRC
iIN
e+
Gm(e+-e-)
iIN
v0
Co
v IN v
v vO sC Gm v vO sCO
R
v IN
CTOT 1 sRC
vO 1
sRC
G
sC
sRC
m
vO
1
1 sC / Gm
v IN sR C 1 sC O / Gm
1 C O /C
Gm R
AA2012-13
32
Prof. D. Manstretta
vO
1
1 sC / Gm
vIN sR C 1 sC O / Gm
PHASE
z = 100 0
p = 500 0
AA2012-13
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Prof. D. Manstretta
vO
1 1 s / z
v IN sR C 1 s / p
vO
90 arctan arctan
v IN
z
p
z = Gm/C
p = Gm/CO
AA2012-13
Prof. D. Manstretta
34
DEFINITION
QINT
H j0
tan
1
tan 90
H. Khorramabadi and P. R. Gray, High-frequency CMOS continuous time filters, JSSC Dec 1984.
AA2012-13
35
Prof. D. Manstretta
1
j 0
QINT
Real integrator
1
H j
R jX
H j H j e j
X
arctan
R
QINT
X 0
R 0
1
tan
tan 90
AA2012-13
36
Prof. D. Manstretta
Summary
Finite DC Gain
vO
A0
vIN 1 sRC 1 A0
QINT
X 0
1 A0
R 0
v IN sC R 1 Gm
X 0 1 / 0
R 0
1 / z
QINT
v IN
s 1 s / p
X 0
1
R 0 0 / p
QINT
AA2012-13
Prof. D. Manstretta
37
Summary (2)
QINT
1
0 0
1 A0 z p
AA2012-13
38
Prof. D. Manstretta
QP
Q 'P
2QP
1
QINT
Re(s)
QINT <0
Im(s)
Re(s)
AA2012-13
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Prof. D. Manstretta
HLP 0
H 'LP 0
2QP
1
QINT
If the error on the gain of the biquad at the pole frequency is to be
QINT
2QP
10
ERR ,dB 20
Notice that the above considerations apply to any pair of poles of the filter
AA2012-13
40
Prof. D. Manstretta
a0
E1
b1
0
QP
-1/s
a0 b0 02
Rb0
C
a0
E2
2
E1 s b1s b0
E2
-1/s
E1
Ra0
R
E2
Rb1
AA2012-13
41
Prof. D. Manstretta
Integrator Non-Idealitities
The effect of integrator non-idealities will be evaluated using the modified
integrator transfer function HINT(s)
a0 b0 02
-b0
b1
E1
a0
b1
HINT(s)
HINT(s)
0
QP
E2
1
2
a0 H INT
s
H s
2
1 b1H INT s b0 H INT
s
HINT(s)
Finite DC Gain
RHP zero
Finite GBW
(additional pole)
1 A0
1
1 s z
s
1
1
s 1 s / p
AA2012-13
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Prof. D. Manstretta
Finite DC Gain
H INT
1
1 / 1 A0 s / 0
2
a0 H INT
s
H s
2
1 b1H INT s b0 H INT
s
'0 0 1
Q 'P
1
1
2
QP 1 A0 1 A0
1
QP
QP
2QP
2QP
1
1
1 A0
QINT
b1
H s
0
QP
b0 02
20
1
1
2
s2 s 0
Q
1
A
Q
1
0
P
0
P
0
0
1
2QP 1 A0
QINT 1 A0
Assuming A0 >>1
AA2012-13
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Prof. D. Manstretta
RHP Zero
H INT s
1
1 s z
s
b1
0
1
Q 'P
QPz
2
0
2
z
QP
2QP0
0
0
1
2QPz
QP
2QP
1
QINT
QP
b0 02
02 1 s / z
H s
0
02 0
02
2
s 1
2 s
2 02
z
QPz z QP
2
a0 H INT
s
H s
2
1 b1H INT s b0 H INT
s
'0
Assuming
z >>0
QINT
z
0
AA2012-13
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Prof. D. Manstretta
Finite GBW
H INT s
1
s 1 s p
b1
2
a0 H INT
s
H s
2
1 b1H INT s b0 H INT
s
Q 'P
QP
2QP0
QP
2QP
1
QINT
QINT
p
0
H s
b0 02
QP
1 s / p s 2 s
Assuming
p >>0
02
0
Q 'P
02
AA2012-13
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Prof. D. Manstretta
Summary
-b0
b1
E1
a0
HINT(s)
HINT(s)
E2
Finite DC Gain
H INT
H INT s
QINT 1 A0
1
1 s z
s
H INT s
Q 'P
1
s 1 s p
QINT
QP
2QP
1
QINT
z
0
QINT
p
0
AA2012-13
Prof. D. Manstretta
HIGHER ORDER
OPAMP-RC FILTERS
Canonic Synthesis
46
AA2012-13
Prof. D. Manstretta
47
AA2012-13
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Prof. D. Manstretta
State-Variable Method:
All-pole filters
En
a0
n
E1 s bn1s n1 ... b2 s 2 b1s b0
E1
E2
E1
a0
E3
E
2
-b0
s s n1 bn1s n2 ... b2 s b1 E2 E4
1
s n ... b1s b0
E3
E4
1
s n 1 b1
1
s
E2
AA2012-13
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Prof. D. Manstretta
a0
n
s E2
sn-1E2
1
n-2
s E2
sE2
E2
En
a0
n
E1 s bn1s n1 ... b2 s 2 b1s b0
K. Laker, M. Ghausi, "Synthesis of a low-sensitivity multiloop feedback active RC
filter," IEEE Transactions on Circuits and Systems, Mar 1974
AA2012-13
Prof. D. Manstretta
a0
n
(-s) E2
(-s)n-1E2
1
n-2
(-s) E2
-sE2
En
a0
n
E1 s bn1s n1 ... b2 s 2 b1s b0
E2
AA2012-13
Prof. D. Manstretta
51
AA2012-13
Prof. D. Manstretta
b0
b2
b1
b3
E1
a0
E2
0.2756
4
E1 s 0.9528s 3 1.4539s 2 0.7426s 0.2756
E2
AA2012-13
Prof. D. Manstretta
b0
b2
b1
b3
E1
a0
Ri=1/bi
E2
0.2756
4
E1 s 0.9528s 3 1.4539s 2 0.7426s 0.2756
E2
AA2012-13
Prof. D. Manstretta
General Realization
En
an1s n1 ... a2 s 2 a1s a0
more complicated
AA2012-13
55
Prof. D. Manstretta
FILTER MASK
Normalization
Approximation
Network
Function
Realization
Denormalizati
on
|H|
A0
IN-BAND
RIPPLE
PASS-BAND
p s
STOP-BAND
Min
ATTEN
.
AA2012-13
Prof. D. Manstretta
56
Example 3
Design a 5th order all-pole low-pass filter using follow-the-
AA2012-13
Prof. D. Manstretta
57
(2k 1)
(2k 1)
(2k 1)
1
11
s
sin
sinh
v
j
cos
cosh v
k
k
k
v sinh u
2n
2n
2n
n
e
2 sP1
sP 2
2 2
2
D( s) s
P1 s
P 2 s P 3
Q
Q
P1
P2
AA2012-13
58
Prof. D. Manstretta
D ( s ) s 5 b4 s 4 b3s 3 b2 s 2 b1s b0
b4 P 3
P1
QP1
b3 P21 P2 2
P1P2 2 P 2P21
2
2
b1 P 3
P1P 2
QP 2
QP1
P 2
QP 2
P1P 2
QP1QP 2
P 3P1
QP1
P 3P 2
QP 2
2
P1P 2 P 2P21 P1P2 2
2
b2 P 3 P1 P 2
QP1QP 2
QP 2
Q P1
b0 P 3P21P2 2
AA2012-13
59
Prof. D. Manstretta
Flowgraph
-1
b3
b1
b2
b4
E1
a0
b0
E2
AA2012-13
60
Prof. D. Manstretta
Circuit Implementation
R
R
C
Rb0
VIN
Rb2
Rb3
Rb4
Rb1
C
Rb0
C
R
VOUT
1
0
RC
b ''k bk
R
Rbk
bk
AA2012-13
Prof. D. Manstretta
BACKUP SLIDES
MATERIALE INTEGRATIVO
61
AA2012-13
62
Prof. D. Manstretta
Im(s)
S1
sp = sp+jp
0
sP
Re(s)
S2
0
2
AA2012-13
Prof. D. Manstretta
63
1
1 + 0 + 0
Frequency response at 0
H(j0)=-jQ
Notice how the network function has been written, with explicit reference to 0
and Q. This is usually done in biquad-based filter design since it greatly
simplifies the design procedure.
AA2012-13
Prof. D. Manstretta
64
1
1 + 0 + 0
0
0 2 2
f(j0)=-/2
Notice how, in low Q poles, the phase starts to move about a decade before the
pole (i.e. much earlier than the magnitude response.
As we shall see, low Q poles are desirable to lower power consumption and to
minimize the sensitivity of the filter reponse to parameter variations.
AA2012-13
Prof. D. Manstretta
65
AA2012-13
66
Prof. D. Manstretta
Example 1
Design of a low-pass biquad:
DC gain=1
0=1MHz
QP=0.7
E2
a0
2
E1 s b1s b0
a0 b0 02
b1
0
QP
AA2012-13
67
Prof. D. Manstretta
Flowgraph Implementation
b0
b1
E1
a0
-1/s
-1/s
-1
E2
b1RC
a0 RC
E1
E4
1
sRC
E3
1
sRC
E2
AA2012-13
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Prof. D. Manstretta
Flowgraph (2)
1
E1
E4
1
sRC
E3
1
sRC
E2
R
Circuit
implementation:
Rbk
R
bk
QPR
C
R
R
E1
E3
E2
EE22
AA2012-13
69
Prof. D. Manstretta
E2 a2 s 2 a1s a0
2
E1
s b1s b0
E3 sE2'
E6 s 2 E2'
E6
Low-pass output
Band-pass
output
High-pass
output
a0
a2
-a1
E2 E2' a2 s 2 a1s a0
AA2012-13
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Prof. D. Manstretta
Example 2
Design of a low-pass biquad with transmission zero
DC gain=1
0=1MHz
Q=0.7
z=2MHz
E2
a 2 s 2 a0
2
E1 s b1s b0
a0 b0 02
b1
0
QP
02
a2 2
z
AA2012-13
71
Prof. D. Manstretta
Flowgraph
E2
a0 a 2 s 2
2
E5 s b1s b0
a2
a0
E2
AA2012-13
72
Prof. D. Manstretta
Example 2
Start with the poles.
Modify flowgraph using flowgraph rules to simplify circuit
implementation: divide and multiply by RC
b0 RC
b1RC
a0 RC
E1
E4
a0
E2
2
E1 s b1s b0
a0 b0 02
1
sRC
E3
b1
0
QP
1
sRC
E2
AA2012-13
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Prof. D. Manstretta
Example 2
If we let 0
1
RC
-1
1/QP
1
E1
E4
1
sRC
E3
1
sRC
E2
AA2012-13
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Prof. D. Manstretta
Example 2
Adder circuit implementation:
E4 E1 E2
E3
QP
Rb0
E2
R
E1
E4
R
E2
Rb 0
R Rb 0
RG
E4
E3
E4
RG
E3 Rb1 RG
1
2 RG
QP Rb1 RG
Rb1 2QP 1 RG
Rb1
R
1
Rb 0
E4
2
4
E1
QP
AA2012-13
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Prof. D. Manstretta
Zeros Implementation
The zeros are now implemented with another adder:
VOUT
02
E2 2 E4
z
-1
1/QP
1
E1
E4
1
sRC
E3
02 z2
1
sRC
E2
1
VOUT
AA2012-13
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Prof. D. Manstretta
Circuit Implementation
R
VOUT
02
E2 2 E 4
z
Ra 2 R
2
z
2
0
R
E2
Ra2
E4
VOUT
AA2012-13
77
Prof. D. Manstretta
E1
R
E2
E4
E3
R
2QP 1 R
z2
R 2
0
R
VOUT