Sip Design and Verification Using Ads

SiP Design and Verification using ADS
June 17, 2010

hyuntai.kim@statschippac.com
Contents
Introduction
SiP Definition in Package Assembly Area
SiP Test Board Design and Characterization
ADS Applications for STATSChipPAC Technology
Introduction
9 High Experience in Product Designs
Packaging Products
Packaging Focus
Fanout
WLCSP
LowcostfcCSP
QFNdr
FBGASD
Emphasis on
flip chip & wafer
level packaging
development
Advanced and Standard Laminate Packaging

3D Package Stacking (PiP, PoP, fcPiP, fcPoP, fiPoP)
System-in-Package (SiP)
Flip-chip Chip-scale Package (FCCSP)
Chip-scale package
Advanced and Standard Leaded Packaging
Stacked Die
QFN, QFP
Wafer Level Packaging (WLCSP) / Embeded Wafer Level BGA (eWLB)
Bumping and Wafer Process Services
12/8 Electroplated Bumping
eWLB
Integrated Passive Device (IPD)
Redistribution Layer (RDL)
PoP
LowcostFlip
ChipMUFbase
PiP
CufcPoP/CufcPiP+TSV
Memorystack
Enabling Technology Focus

3D Enabling Technologies
Stacked die
BOL
SOW
Stacked WLCSP
Emerging Enabling Technologies
Hybrid Bump
Cu Column
Pb-free Bump
TSV & bump
9 SiP Definition in Package Assembly Area

System in Package Definition
Key Technologies for SiP Module
System in Package Definition

9
A Fully Integrated System or Sub-System

One or more semiconductor chips on a die interconnect
substrate plus:
Passive components that would otherwise be integrated on the
mother board.
Surface mount discrete passives.
Embedded or patterned into substrate.
Integrated passive components/die.
Other subsystem components:
Shield, SAW filters, packaged ICs, connectors, antennas,

mechanical housings, etc.
A fully integrated functional block bridging the gap between

SOC and PCB implementations.
Key Technologies for SiP Module

Design capability for customized module
Highly integrated passive mounting
Capable of Multi die and Stack die combination
Consistent Wire Length and Wire Loop Control
Passives on Leadframe
IPD tech. based on Si

EMI metal shield application
Build up and stubless substrate design
Metal Shield Integration
Chip Cap
PCB
High density SMT
Placement
IPD (Integrated
Passive Die ) Tech
Stacked Die
Capability
Stacked Die +
Passive Mount
Mold fill under

Chip cap
9 Test Board Design and Characterization

Single Ended Transmission Line Design
Differential Pair Design
Printed Inductor / Capacitor
Wire Bond Characterization
Overall Test Board Layout
Dimension: 40mm X 40mm

GSG Probe Pitch: 150um
Stack-up: 1-2-1 4 layer
Thickness: 0.26T
Single Ended Transmission Line

Line Length
Line Width
GSG Probe
Single Ended Line Tester
Widths range: 50um ~ 150um

lengths Range: 10mm and 20mm
The characteristic impedance of a simple trace can be calculated from its two-port S-parameters.
These parameters can be derived from either simulation or direct measurement.

Momentum Simulation Results
Eqn Zo = sqrt(Z11/Y11)
55
mag(Zo)
Characteristic impedance
2
Ref
Term
Term5
Num=5
Z=50 Ohm
S2P
SNP59
File=
Term
Term6
Num=6
Z=50 Ohm
50
45
0
freq, GHz
The characteristic impedance can be calculated from
Z 0 = Z11 / Y11
10
10
Single Ended Transmission Line (1cm)

Case1: Line width: 50um
m2
m1
100
m3
m4
freq= 1.000GHz freq=1.000GHz
Z_MoM=69.212 Z_Mea=72.139
150
Z_MoM
Z_Mea
150
Z_MoM
Z_Mea
200
200
100
50
m4
m3
freq, GHz
m1
m2
freq=1.000GHz freq=1.000GHz
Z_MoM=35.916 Z_Mea=35.780
150
100
m2
m1
50
100
m1
m2
50
freq, GHz
freq, GHz
Blue: Simulation / Red: Measurement

Reference Frequency: 1GHz
11
freq, GHz
200
Z_MoM
Z_Mea
Z_MoM
Z_Mea
m1
m2
Z_MoM=48.331 Z_Mea=49.343
150
freq, GHz

200
m2
m1
0
0
100
50
50
m1
m2
Z_MoM=54.444 Z_Mea=56.379
150
Z_MoM
Z_Mea
200
m2
m1
Z_MoM=73.138 Z_Mea=75.301
Single Ended Transmission Line (2cm)

200
m1
freq=1.000GHz
Z_MoM=79.999
m2
m1
100
200
m2
freq=1.000GHz
Z_Mea=67.213
m1
freq=1.000GHz
Z_MoM=66.352
150
Z_MoM
Z_Mea
Z_MoM
Z_Mea
150
m2
freq=1.000GHz
Z_Mea=80.853
100
m2
m1
50
50
0
1
freq, GHz
freq, GHz
200
100
m2
m1
50
m1
freq=1.000GHz
Z_MoM=35.413
150
Z_MoM
Z_Mea
150
m2
freq=1.000GHz
Z_Mea=42.896
m2
freq=1.000GHz
Z_Mea=35.397
100
m1
m2
50
freq, GHz
freq, GHz

12
freq, GHz

m1
freq=1.000GHz
Z_MoM=42.183
m2
m1
0
0
200
100
m2
freq=1.000GHz
Z_Mea=57.830
50
0
0
m1
freq=1.000GHz
Z_MoM=56.635
150
Z_MoM
Z_Mea
200
Z_MoM
Z_Mea
85
80
Simulation
Measurement
75.30
75
60
56.38
55
54.44
50
49.34
48.33
45
Simulation
Measurement
80.00
70
69.21
65
Impedance [Ohm]
75
73.14
Impedance [Ohm]
70
72.14
80.85
80
67.21
65
66.35
57.83
60
55
56.64
50
42.90
45
40
40
42.18
35.92
35.41
35
35
35.78
50
75
100
125
35.40
30
150
50
Width [um]
75
100
125
150
Width [um]
1cm transmission line
2cm transmission line
Max error rate is 4.06% (2.93 Ohm difference) for 1cm single ended transmission line
tester, and is 1.77% (1.19 Ohm difference) for 2cm single ended transmission line tester.
13
Differential Pair
9 Odd Mode
The capacitance increase and the inductance decrease of the odd-mode affect the
characteristic impedance as follows:
L Lm
Z odd =
C + Cm
Magnetic field of odd mode
Electrical field of odd mode
9 Even Mode
The inductance increase and the capacitance decrease of the even-mode affect
the characteristic impedance as follows:
L + Lm
Z even =
C Cm
Electrical field of even mode
magnetic field of even mode
14
Differential Pair
9 Differential Mode
Z odd =
Vodd
I odd
Vdifferential = 2 Vodd
Z differential =
Vdifferential
I differential
I differential = I odd
=
2 Vodd
= 2 Z odd
I odd
9 Common Mode
Z even =
Veven
I even
Vcommon = Veven I common = 2 I even

Z common =
15
Vcommon
V
Z
= even = even
I common 2 I even
2
Differential Pair
9 Extracting Self and Mutual Inductance
Ideal coupled line
Extracted Inductance [ADS Model]
Term
Term1
Num=1
Z=50 Ohm
Term
Term2
Num=2
Z=50 Ohm
MCLIN
CLin1
Subst="MSub1"
W=50.0 um
S=50.0 um
L=3000 um
Mutual_Inductance
Self_Inductance
3.0E-9
2.5E-9
2.0E-9
1.3nH@1GHz
1.5E-9
0.6nH@1GHz
1.0E-9
5.0E-10
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Frequency [GHz]
ADS model for inductance extraction
Inductance extracted from ADS Model
The low-frequency limit of this

expression gives the self (L11 and L22)
and mutual (L12) inductances.
Inductance matrix for differential lines

can be extracted from two-port
Z-parameters with the far ends grounded.
Lij = imag ( Z ij ) /
16
4.0
Differential Pair
9 Extracting Self and Mutual Capacitance
Ideal coupled line
Extracted Capacitance [ADS Model]
Term
Term1
Num=1
Z=50 Ohm
Term
Term2
Num=2
Z=50 Ohm
MCLIN
CLin1
Subst="MSub1"
W=50.0 um
S=50.0 um
L=3000 um
Mutual_Capacitance
Self_Capacitance
4E-13
3E-13
0.23pF@1GHz
2E-13
0.065pF@1GHz
1E-13
0
0
freq, GHz
ADS model for capacitance extraction
Capacitance extracted from ADS Model
The low-frequency limit of this

expression gives the self (C11 and C22)
and mutual (C12) inductances.
Capacitance matrix for coupled lines can be

extracted from two-port Z-parameters with the far
ends open-circuited.
Cij = imag (Yij ) /

Note that generally the off-diagonal elements of the capacitance matrix are
negative, so Cm=-C12
17
Differential Pair
9 Test Structures
Differential Pair
Dielectric
Ground Plane
Normal Coupled line

Co-planar Ground
Via
Dielectric
Dielectric
Ground Plane
Coupled line with Coplanar Ground

and Bottom Ground
Coupled line with Coplanar Ground
18
Differential Pair
Case2: w:50um / s:75um
Case1: w:50um / s:50um
Differential Impedance
200
200
150
150
m2
m1
Sim
Mea
Sim
Mea
m1
m2
100
m1
freq= 1.000GHz
Sim=110.667
50
m2
freq= 1.000GHz
Mea=107.889
100
m2
freq=1.000GHz
Sim=119.158
50
0
0
200
150
150
Sim
Mea
m2
m1
m2
freq=1.000GHz
Sim=95.548
200
50
Case4: w:75um / w:125um
Case3: w:75um / s: 75um
100
3
freq, GHz
freq, GHz
Sim
Mea
m1
freq=1.000GHz
Mea=117.196
m1
freq=1.000GHz
Mea=93.550
m2
m1
100
m2
freq=1.000GHz
Sim=101.976
50
m1
freq=1.000GHz
Mea=99.319
0
0
freq, GHz
3
freq, GHz

19
Differential Pair with Coplanar Ground

W: 75um / S: 125um / D: 70um
W: 75um / S: 125um / D: 50um

200
200
150
m1
m2
Sim
Mea
Sim
Mea
150
100
m1
freq= 1.000GHz
Sim=117.728
50
m2
freq= 1.000GHz
Mea=115.557
m1
m2
100
m1
freq= 1.000GHz
Sim=121.509
50
0
0
freq, GHz
freq, GHz
W: 75um / S: 125um / D: 90um
W: 75um / S: 125um / D: 50um

200
200
150
150
m1
m2
Sim
Mea
Sim
Mea
m2
freq= 1.000GHz
Mea=121.056
100
m1
freq= 1.000GHz
Sim=123.387
50
m2
freq= 1.000GHz
Mea=123.165
m1
m2
100
m1
freq= 1.000GHz
Sim=97.431
50
m2
freq= 1.000GHz
Mea=96.118
0
0
freq, GHz
3
freq, GHz

20
Differential Pair
200
Simulation
Measurement
Simulation_BOT_GND
Measurement_BOT_GND
200
Differential Impedance [Ohm]
Differential Impedance [Ohm]
Simulation
Measurement
150
110.67
100
107.89
119.16
117.20
95.55
93.55
101.98
99.32
50
150
117.73
100
115.56
97.43
96.14
121.51
123.39
121.06
123.17
50
0
50/50
50/75
75/75
75/125
75/125/50
Line Width / Space [um]
75/125/70
75/125/90
Line Width/ Space / Distance
Normal Coupled Line
Coupled Line with Coplanar Ground
Significant Parameters for Differential Pair Design

- Line Width
- Line to Line Space
- Signal Line to Coplanar Ground Distance
- Existence of Bottom Ground
21
Printed Spiral Inductor / Capacitor
Quad Band PAM
Inductor
SP4T
Printed Inductor Example
Capacitor
Printed Inductor is widely used for System in Package Products.

Additional assembly process and cost are not needed to implement a printed inductor.
Main Parameters: Conductivity / Surface Roughness / Dielectric Thickness
22
Printed Spiral Inductor

Turn: 2.5 Radius:250
1.0E-7
40
m2
freq= 100.0MHz
L_Sim=4.135E-9
m2
m1
0.0
m1
freq= 100.0MHz
L_Mea=4.152E-9
-5.0E-8
m4
m3
30
Q_Sim
Q_Mea
L_Sim
L_Mea
5.0E-8
m3
freq=1.000GHz
Q_Sim=21.784
20
10
m4
freq=1.000GHz
Q_Mea=23.070
0
-10
-20
-1.0E-7
0
freq, GHz
freq, GHz
Turn: 2.5 Radius:400

1.0E-7
40
m1
m2
0.0
m1
freq=100.0MHz
L_Mea=5.561E-9
-5.0E-8
m3
freq=1.000GHz
Q_Sim=20.341
20
-1.0E-7
Q_Sim
Q_Mea
5.0E-8
L_Sim
L_Mea
m4
m3
m2
freq=100.0MHz
L_Sim=5.287E-9
m4
freq=1.000GHz
Q_Mea=21.610
-20
-40
freq, GHz
freq, GHz

Reference Frequency: 100MHz
23
Printed Capacitor
CAP01: 1mm2
CAP02: 2mm2
5E-12
5E-12
m2
m1
freq=1.000GHz
freq=1.000GHz
C_Sim=9.350E-13 C_Mea=8.567E-13
3E-12
2E-12
m2
m1
freq=1.000GHz
freq=1.000GHz
C_Sim=1.716E-12 C_Mea=1.634E-12
m2
m1
4E-12
3E-12
C_Sim
C_Mea
C_Sim
C_Mea
4E-12
m2
m1
2E-12
1E-12
1E-12
0
-1E-12
-1E-12
0
freq, GHz
freq, GHz
For printed capacitors, it is not effective in the same size condition compare to SMT passives.
24
Wire Lengths Range: 600um / 800um / 1000um / 1200um

Single bonding / Double bonding /Triple Bonding
Wire to Wire distance: 100um
1mil gold wire
25
Wire bond Characterization

Wire Loop Parameter
ADS Bond Wire Setup
P06
BONDW_Shape
Shape1
Rw=12.5 um
Gap=1000 um
StartH=150 um
MaxH=270 um
Tilt=0 um
Stretch=380 um
StopH=0 um
FlipX=1
GAP
STRETCH
600
228
800
304
1000 380
1200 456
Term
Term1
Num=1
Z=50 Ohm
2
3
4
Ref
P03
S6P
SNP1
File=
Term
Term2
Num=2
Z=50 Ohm
26
P05
1
P05
P06
P04
2
P04
P03
BONDW2
WIRESET1
W2_Zoffset=0 um
Radw=12.5 um
W2_Angle=180
Cond=1.3e7 S
View=side
Layer="cond"
SepX=0 um
SepY=0 um
Zoffset=0 um
W1_Shape="Shape1"
W1_Xoffset=0 um
W1_Yoffset=0 um
W1_Zoffset=0 um
W1_Angle=0
W2_Shape="Shape1"
W2_Xoffset=-680 um
W2_Yoffset=0 um

WB600_Double bonding
5E-8
5E-8
Lmeas
Lsim
m2
m1
Lsim=9.850E-10 Lmeas=9.648E-10
3E-8
Lmeas
Lsim
m2
m1
1E-8
3E-8
m1
freq=1.000GHz
Lsim=1.150E-9
1E-8
m2
m1
-1E-8
-1E-8
-3E-8
-3E-8
0
3E-8
m1
freq=1.000GHz
Lsim=1.453E-9
1E-8
m2
m1
5E-8
m2
freq=1.000GHz
Lmeas=1.393E-9
Lmeas
Lsim
5E-8
freq, GHz
freq, GHz
Lmeas
Lsim
m2
freq=1.000GHz
Lmeas=1.079E-9
3E-8
m1
freq=1.000GHz
Lsim=1.648E-9
1E-8
m2
m1
m2
freq=1.000GHz
Lmeas=1.586E-9
-1E-8
-1E-8
-3E-8
-3E-8
0
freq, GHz
freq, GHz

27

Inductance
Q Value
Single Bonding
Double Bonding
Triple Bonding
2.2
2.0
30
2.17
Single Bonding
Double Bonding
Triple Bonding
28.9
27.6
25
24.7
23.8
22.8
22.7
1.83
1.6
1.4
1.23
1.13
1.0
0.92
0.8
0.76
18.3
17.0
1.34
1.2
20
1.56
1.49
16.9
Inductance [nH]
1.8
1.27
14.3
15
1.08
9.3
10
0.91
7.6
5
600
800
1000
600
1200
800
1000
Wire Length [um]
Wire Length [um]
Measured and simulated characteristics of the wire bonds show consistent trends
- More parallel wire bonds decreases inductance and raises Q
- Longer wire bonds increase inductance and lower Q
28
1200
9ADS Applications for STATSChipPAC Technology

Example 1: IPD Front End Module for WiMAX
Example 2: 5 Channels Balun Bank
Example 3: PA Module using eWLB+IPD Technology
Example 4: TSV+IPD Technology
Example 5: Embedded IPD
29
Example 1 IPD Front End Module for WiMAX
Product Application: Mobile Broadband Devices

Sawless Front End Module
IPD type: Wire Bond
IPD Application: Balanced BPF / LPF / Balun
Package Structure
RF
Switch
RF IC
RF IC
Existing LTCC Solution

IPD Solution
30
Example 2 5 Channels Balun Bank
Product Application: Mobile Broadband Devices

Package Solution: FcVFBGA-SD2+1, 7.0 x 7.0 sq.mm
WCDMA_HB
IPD type: Fc-IPD

IPD Application: Balun
WCDMA_IMT
WCDMA_LB
GSM_HB
RFIC
FC IPD
GSM_LB
IPD Baluns
Package Structure
31
Example 3 PA Module using eWLB+IPD Technology
Application G3 WCDMA application (CMOS-PA + IPD)

new package platform for PA+IPD multichip
eWLB had excellent high frequency electrical performance
6.1mm
5.6 mm
Package Structure
Actual Product
32
Example 4 TSV+IPD Technology
20% Size Reduction!!!!
Silicon TSV interposer with embedded passives

Integrated silicon batch process
Fine metal line width/spacing
High performance and miniaturized packaging solutions
33
IPD with TSV
Normal bumped IPD
Example 5 Embedded IPD
34

Sip Design and Verification Using Ads

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Sip Design and Verification Using Ads

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SiP Design and Verification using ADS

June 17, 2010

Advanced and Standard Laminate Packaging

Enabling Technology Focus

Emerging Enabling Technologies

TSV & bump

9 SiP Definition in Package Assembly Area

System in Package Definition

A Fully Integrated System or Sub-System

Surface mount discrete passives.

Embedded or patterned into substrate.

Integrated passive components/die.

Other subsystem components:

Shield, SAW filters, packaged ICs, connectors, antennas,

A fully integrated functional block bridging the gap between

Key Technologies for SiP Module

IPD tech. based on Si

Mold fill under

9 Test Board Design and Characterization

Overall Test Board Layout

Dimension: 40mm X 40mm

Single Ended Transmission Line

Single Ended Line Tester

Widths range: 50um ~ 150um

Single Ended Transmission Line

The characteristic impedance can be calculated from

Single Ended Transmission Line (1cm)

Blue: Simulation / Red: Measurement

Case5: Line width: 150um

Case4: Line width: 125um

Case3: Line width: 100um

Case2: Line width: 75um

Single Ended Transmission Line (2cm)

Blue: Simulation / Red: Measurement

Case5: Line width: 150um

Case4: Line width: 125um

Case3: Line width: 100um

Case2: Line width: 75um

Single Ended Transmission Line

1cm transmission line

2cm transmission line

Magnetic field of odd mode

Electrical field of odd mode

Electrical field of even mode

magnetic field of even mode

Vcommon = Veven I common = 2 I even

ADS model for inductance extraction

Inductance extracted from ADS Model

The low-frequency limit of this

Inductance matrix for differential lines

Extracted Capacitance [ADS Model]

ADS model for capacitance extraction

Capacitance extracted from ADS Model

The low-frequency limit of this

Capacitance matrix for coupled lines can be

Cij = imag (Yij ) /

Normal Coupled line

Coupled line with Coplanar Ground

Coupled line with Coplanar Ground

Case1: w:50um / s:50um

Case4: w:75um / w:125um

Case3: w:75um / s: 75um