ANALOG IC DESIGN

14MVD0117
Experiment-1
Study of DC Characteristics of MOS Transistor
Objective:To study the DC Characteristics of a MOSFET.
a.
b.
c.
d.

To plot Drain Characteristics (Id Vs VDS).

To plot Transfer Characteristics (Id Vs VGS).
To plot trans-conductance Vs input voltage (gm Vs VGS).
To plot output resistance Vs Drain-Source voltage (ROVs VDS).

Design Parameters:
a.
b.
c.
d.

Process Technology: gpdk90.

W = 120nm
L = 100nm
Voltage VDD = 1.5V.

Theory:
MOSFET has mainly three regions of operation namely, cutoff region, linear region and
saturation region.

CUTOFF Region:
In this region applied gate to source voltage is less than the threshold voltage i.e. V GS<
VT. Therefore, no inversion region is present in between the drain and source. No current flows
in the transistor in this region of operation even the V DS>0V because there is no channel between
the source and drain.

LINEAR Region:
In this region VGS> VT. A channel will be formed between the source and the drain. No
current flows through the channel if VDS = 0V. If VDS is increased greater than 0V and VDS< VGSVT then current starts flowing through the channel. The current equation is given as

SATURATION Region:
In this region VGS> VT. If VDS> VGS-VT the device enters saturation. The channel will be
pinched off. The value of VDS at pinchoff is called VDSAT. The Drain current in this region is given
as follows:

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ANALOG IC DESIGN
14MVD0117
Transconductance:
ID
Gm= gm= Vgs at VDS constant

Output resistance:

Since,

Procedure:

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Choose different components present in the gpdk90 library and connect them as shown in
the schematic diagram. Select the length of the MOSFET as 100nm and width to 120nm. Select
the DC voltage sources and set the gate to source voltage as 1.5V and also the drain to source
voltage as 1.5V. Check and save the schematic. Open the ADE tool and give the necessary
variables to plot the graph.
Set VGS as 0.8V. Open the ADE tool and got o analysis. Select DC and select the component
parameter as VDS, select DC component and set its limits from 0 to 1.5V. Go to outputs and select
the variables to be plotted, click on the drain terminal in the schematic and run the simulation to
obtain the plot.
Set VDS as 1.5V. Open the ADE tool and got o analysis. Select DC and select the component
parameter as VGS, select DC component and set its limits from 0 to 0.8V. Go to outputs and select
the variables to be plotted, click on the drain terminal in the schematic and run the simulation to
obtain the plot.
After plotting the transfer characteristics click on the curve, open calculator and select the
derivative function to get the plot of trans-conductance.
After plotting the drain characteristics, click on the plot, open calculator, select the derivative
function. Now select the obtained curve, open calculator and select the 1/x function to plot the
output resistance curve.

Result:
ID vs VDS Characteristics:
Draw the schematic as shown in the above figure using the above mentioned
technology parameters.
Check and save the schematic and simulate it using ADE L.
Plot the graph between ID and VDS by keeping the VGS=constant.

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ANALOG IC DESIGN
14MVD0117

ID vs VGS Characteristics:
Draw the schematic as shown in the above figure using the above mentioned
technology parameters.
Check and save the schematic and simulate it using ADE L.
Plot the graph between ID and VGS by keeping the VDS=constant.

TRANSCONDUCTANCE (gm) vs VGS:

Draw the schematic as shown in the above figure using the above mentioned
technology parameters.
Check and save the schematic and simulate it using ADE L.
Plot the graph between ID and VGS by keeping the VDS=constant.

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ANALOG IC DESIGN
14MVD0117
Click on the waveform and using the calculator derivate the transfer
characteristics. Now we got the Transconductance plot.

OUTPUT RESISTANCE (ROUT) vs VDS:

Draw the schematic as shown in the above figure using the above mentioned
technology parameters.
Check and save the schematic and simulate it using ADE L.
Plot the graph between ID and VDS by keeping the VGS=constant.
Click on the waveform and using the calculator derivate the drain characteristics
and by inverting it we get the output resistance plot.

Discussions:
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ANALOG IC DESIGN
14MVD0117
The variation between the ideal characteristics and the plot in the saturation region is due
to the channel length modulation.
Transconductance is obtained by derivation of the drain current equation with respect to
gate to source voltage. The transconductance is proportional to gate to source voltage. Therefore,
if VGS increases the gm also increases.
Output resistance is obtained by derivation of the drain current with respect to drain to
source voltage and then taking the inverse of it. As the output resistance is proportional to drain
to source voltage, increase in VDS increases the output resistance.

Conclusion:
Thus DC characteristics of the MOSFET are studied and the plots for Drain
characteristics, transfer characteristics, transconductance and the output resistance are obtained.

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