Ex.

no:1

APPLICATIONS OF OP-AMP.

A. Inverting amplifier
AIM:
To design Inverting Amplifier using operational amplifier IC741 and to test its
operation.
APPARATUS REQUIRED:
S.NO
1
2
3

APPARATUS
IC741
Function Generator
CRO

RANGE
3MHZ
30MHZ

QUANTITY
1
1
1

Dual Power supply

15V

5
6
7

Resistor
Bread Board
Wires

10k,100k
-

1,1
1
As Required

THEORY:
An inverting amplifier uses negative feedback to invert and amplify a voltage.
The Rf resistor allows some of the output signal to be returned to the input. Since the
output is 180 out of phase, this amount is effectively subtracted from the input, thereby
reducing the input into the operational amplifier. This reduces the overall gain of the
amplifier and is dubbed negative feedback..The gain of the inverting amplifier is
Gain (Av) = Vo / Vi = - Rf / R1
Negative Sign indicates a phase shift of 180 between Vi and Vo.
Therefore Vout is equal to
Vo =

- Rf / R1 (Vin)

PROCEDURE:
1. Connections are made as per circuit diagram.
2. Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V (p-p) and
1 KHz respectively.
3. Observe the input and output waveform simultaneously using Dual Trace CRO.
4. Tabulate the readings and verify it using theoretical calculations.
5. Draw the input and output waveforms in Graph sheet.

DESIGN:
We know that,
Vo/Vi= -Rf/Ri
Where,
Vi = Voltage applied at inverting terminal,
Vo = Output voltage.
Ri = Input Resistor.
Rf = Feedback Resistor.
Assume,
Gain= -10,
Ri = 10k,
-10=Rf/10k
Rf = 100K
CIRCUIT DIAGRAM:

INVERTING AMPLIFIER

Rf =100K

2
3

FG, 1KHz
1V (p-p)
Sine I/P

LM741

Output

+
-12V
4

Ri = 10K

+12V

CRO

MODEL READING:
Input:
Amplitude : 2 V
Time period : 4 ms
Output:
Amplitude : 2 V
Time period : 4 ms
MODEL GRAPH:
Input:

Output:

TABULATION: INVERTING AMPLIFIER

Amplitude

Timeperiod

INPUT

2v

1ms

OUTPUT

2v

1ms

RESULT:
Thus designed the inverting amplifier using IC 741 and testes its operation.

B. Non-Inverting amplifier
AIM:
To design Non- inverting Amplifier using operational amplifier IC741 and to test its
operation.
APPARATUS REQUIRED:

S.NO
1
2
3

APPARATUS
IC741
Function Generator
CRO

RANGE
3MHZ
30MHZ

QUANTITY
1
1
1

Dual Power supply

15V

5
6
7

Resistor
Bread Board
Wires

10k,100k
-

1,1
1
As Required

THEORY:
Here,the output is in the same as the input signal, i.e. when the input voltage
goes positive, so does the output. In this circuit the signal is applied to the non-inverting
input of the op-amp. However the feedback is taken from the output of the op-amp via a
resistor to the inverting input of the operational amplifier where another resistor is taken
to ground. It is the value of these two resistors that govern the gain of the operational
amplifier circuit. As the input to the op-amp draws no current this means that the current
flowing in the resistors R1 and R2 is the same.
The voltage at the inverting input is formed from a potential divider consisting of
R1 and R2, and as the voltage at both inputs is the same, the voltage at the inverting input
must be the same as that at the non-inverting input. This means that
Vin = Vout x R1 / (R1 + R2).
Hence the voltage gain of the circuit Av can be taken as:
Av

1 + R2 / R1

PROCEDURE:
1. Connections are made as per circuit diagram.
2. Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V (p-p) and
1 KHz respectively.
3. Observe the input and output waveform simultaneously using Dual Trace CRO.
4. Tabulate the readings and verify it using theoretical calculations.
5. Draw the input and output waveforms in Graph sheet.

DESIGN:
Vo/Vi =1+ (Rf/Ri)
where Gain = Vo/Vi
Assume Gain = 11, Let Ri = 10k,
11= 1+ (Rf/10k)
Rf = 100k
CIRCUIT DIAGRAM:

NON-INVERTING AMPLIFIER

Rf =100K

2
3

FG, 1KHz
1V (p-p)
Sine I/P

+12V

LM741

Output

+
-12V
4

Ri = 10K

CRO

MODEL READING:
Input:
Amplitude : 2 V
Time period : 4 ms
Output:
Amplitude : 2 V
Time period : 4 ms

MODEL GRAPH:
Input:

Output:

TABULATION: NON-INVERTING AMPLIFIER

Amplitude

Timeperiod

INPUT

4v

1ms

OUTPUT

4v

1ms

RESULT:
Thus designed the Non- Inverting amplifier using IC 741 and testes its operation.

C.Differential Amplifier:
AIM:
To design Differential Amplifier using operational amplifier IC741 and to test its
operation.
APPARATUS REQUIRED:
S.NO
1
2
3
4
5
6
7

APPARATUS
IC741
Function
Generator
CRO
Dual Power
supply
Resistor
Bread Board
Wires

RANGE
3MHZ

QUANTITY
1
1

30MHZ
15V

1
1

10k,100k
-

1,1
1
As Required

THEORY:
A differential amplifier amplifies the difference between two input signals. It has
the qualities like high impedance, high voltage gain, high frequency performance and
high immunity to noise signals.
The differential amplifier has a unique feature that many circuits dont have - two
inputs. This circuit amplifies the difference between its input terminals. But, in cases
where a signal source (like a sensor) has both of its terminals biased at several volts
above ground, you need to amplify the difference between the terminals. The differential
amp rejects the noise and rescues the signal.
Common mode rejection ratio is given by , CMRR = Ad / Ac
PROCEDURE:
1. Connections are made as per circuit diagram.
2. Set two sine wave input voltage at any fixed voltage (V1,V2)and at fixed frequency
say, 1V (p-p) and 1 KHz respectively.
3. Observe the input and output waveform simultaneously using Dual Trace CRO.
4. Tabulate the readings and verify it using theoretical calculations.
5. Draw the input and output waveforms in Graph sheet.
DESIGN:

a) In common mode
V1 = V2 = V
Vc =

=V

Ac =
Vd = V1-V2 =V-V =0
b) In difference mode
V1 = -V2 = V
Vd = V1-V2 = V+V =2V
Ad =
Vc =
CIRCUIT DIAGRAM:

MODEL READING:
Input 1
:
Amplitude : 4 V
Time period : 4 ms
Input 2
:
Amplitude : 2 V
Time period : 4 ms
Output:

=0

Amplitude : 2 V
Time period : 4 ms
MODEL GRAPH:
Input:

Output:

TABULATION: DIFFERENTIAL AMPLIFIER

Amplitude

Timeperiod

INPUT VOLTAGE

10mv

1ms

INPUT VOLTAGE

5mv

1.2ms

OUTPUT VOLTAGE

5mv

1.6ms

CALCULATION:
Input Amplitude=2*5mv=10mv
Time=1*1ms=1ms
Output Amplitude=1*5mv=5mv
Time=0.8*2ms=1.6ms
CMRR=Ad/Ac;
Ad=v2- v1/2=5-10/2=2.5db;
Ac=v2+v1/2=5+10/2=7.5db;
CMRR=2.5/7.5=0.33 db

RESULT:
Thus designed the Differential amplifier using IC 741 and tested its operation.
Viva questions and answers:
1. Mention some of the linear applications of op amps :
Adder, subtractor, voltage to- current converter, current to- voltage converters,
instrumentation amplifier, analog computation ,power amplifier, etc are some of the
linear op-amp circuits.
2. Mention some of the non linear applications of op-amps:
Rectifier, peak detector, clipper, clamper, sample and hold circuit, log amplifier,
anti log amplifier, multiplier are some of the non linear op-amp circuits.
3. What are the areas of application of non-linear op- amp circuits:

Industrial instrumentation

Signal processing

4. What does 74LS refers to:

74-refers to IC which can be used for commercial purpose.LS-Low Power
Schottky.
5. What is Linear IC?
IC which accepts, process and produce analog signal is called linear IC
.Eg:IC741,IC555.
6. Define CMRR
Common mode rejection ratio-it is defined as the ratio between the differential
mode gain to the common mode gain

Ex.no:2

INTEGRATOR AND DIFFERENTIATOR

A. Integrator
AIM:
To design Integrator and Differentiator using operational amplifier IC741 and to test
the operation.

1
2
3
4

APPARATUS

RANGE

QUANTITY

IC741
Function Generator
CRO

3MHZ
30MHZ

1
1
1

12V

1.6k,470 k
0.01f
-

2,1
1
1
As Required

Dual Power
supply
5
Resistor
6
Capacitor
7
Bread Board
8
Wires
APPARATUS REQUIRED:

THEORY:
Integrator produces a voltage output proportional to the product
(multiplication) of the input voltage and time. Here, the op-amp circuit would generate an
output voltage proportional to the magnitude and duration that an input voltage signal has
deviated from 0 volts. A simple low pass RC circuit can also work as an Integrator when
time constant is very large. This requires very large values of R and C.
The components R and C cannot be made infinitely large because of practical
limitations. However in the op-amp integrator by Millers theorem, the effective input
capacitance becomes Cf (1-Av), where Av is the gain of the Op-amp.

The Gain (Av) is the infinite for an ideal Op-amp, so the effective time constant
of the Op-amp Integrator becomes very large which results perfect integration.

PROCEDURE:
1. Construct the circuit as per Circuit diagram shown in figure.
2. Select the Square waveform in Function Generator and set fixed amplitude and
fixed frequency say 1V (p-p) and 1 KHz respectively.
3. The resistance Rcomp is also connected to the Non-inverting input terminal to
minimize the effect of the input bias current.
4. Note the corresponding input and output signals.
5. Note the gain of the integrator decreases with increasing frequency.
6. Tabulate the noted readings and draw the input and output waveforms in Graph
sheet.
DESIGN:
The Integrator output voltage can be expressed as,
VO = -1/Rf Vi dt
For Integration, T=2R1cf,
f=11 kHz, cf =0.1f
T = 1/f = 1mS

INTEGRATOR CIRCUIT
0.1F

10K

1K

3
FG, 1KHz
1V (p-p)
Square I/P

LM741

MODEL READING:
Input:
Amplitude : 2 V
Time period : 4 ms
Output:
Amplitude : 2 V
Time period : 4 ms
MODEL GRAPH:
Input Signal (1 KHz Freq.)

Output

+
-12V

1K

(Volts)

+12V

CRO

Time (ms)
Time (ms)

Output Signal (1 KHz Freq.)

Amplitude
(Volts)

Time (ms)

TABULATION: INTEGRATOR

Amplitude

Timeperiod

INPUT VOLTAGE

4mv

1.2ms

OUTPUT VOLTAGE

8mv

10ms

S.NO
1
2
3

APPARATUS
IC741
Function Generator
CRO

RANGE
3MHZ
30MHZ

QUANTITY
1
1
1

Dual Power supply

12V

5
6
7
8

Resistor
Capacitor
Bread Board
Wires

1.6k,470
0.1f
-

2,1
1
1
As Required

RESULT:
Thus designed the Integrator using IC 741 and tested its operation

B. Differentiator
AIM:
To design Differentiator using operational amplifier IC741 and to test its operation.
APPARATUS REQUIRED:

THEORY:
The name implies, is used to perform the mathematical operation of
differentiation. The output waveform is the derivative of input waveform.. The
differentiator (not to be confused with differential) produces a voltage output proportional
to the input voltage's rate of change.
At high frequencies differentiator may become unstable and break into oscillation. The
input impedance decreases with increase in frequency thereby making the circuit
sensitive to high frequency noise. The feedback network of the differentiator, R1C1, is an
RC low pass filter which contributes 90 phase shift to the loop and may cause stability
problem with an amplifier which is compensated for unity gain.
PROCEDURE:
1. Construct the circuit as per Circuit diagram shown in figure.
2. Select the Square waveform in Function Generator and set fixed amplitude and
fixed frequency say 1V (p-p) and 1 KHz respectively.
3. The resistance Rcomp is also connected to the Non-inverting input terminal to
minimize the effect of the input bias current.
4. Note the corresponding input and output signals.
5. Tabulate the noted readings and draw the input and output waveforms in Graph
sheet.
DESIGN:
The Differentiator output voltage can be expressed as,
Vo = Rf*c (dVin/dt)
For Differentiation T =2Rfc1,
F=1 kHz, c1 = 0.1f
T = 1/f = 1mS
Rf = T/2c1

CIRCUIT DIAGRAM:

D IFFE R E N T IA T O R C IR C U IT
10K

0 .1 F
2
3
FG , 1 K H z
1 V (p -p )
S q u a r e I /P

L M 741

MODEL READING:
Input 1:
Amplitude : 5 V
Time period : 4 ms
Input 2:
Amplitude : 3 V
Time period : 4 ms
Output:
Amplitude : 2 V
Time period : 4 ms
MODEL GRAPH:
Input Signal (1 KHz Freq.)

O u tp u t

+
-1 2 V

1K

(Volts)

+12V

C R O

Time (ms)
Time (ms)

Output Signal (1 KHz Freq.)

Amp
(Volts)

Time(ms)

TABULATION: DIFFERENTIATOR

INPUT VOLTAGE

Amplitude

Timeperiod

4mv

1.2ms

OUTPUT VOLTAGE

8mv

1ms

RESULT:
Thus designed the Differentiator using IC 741 and tested its operation.
Applications:
1.The DC voltage produced by the differentiator circuit could be used to drive a
comparator which would signal as alarm or active a control if the rate of change exceeded
a pre-set level.
2.Waveform Generators
Viva questions and answer
1.What are the limitations of the basic differentiator circuit:
At high frequency, a differentiator may become unstable and break into
oscillations. The input impedance decreases with increase in frequency , thereby making
the circuit sensitive to high frequency noise.
2.Write down the condition for good differentiation :For good differentiation, the time period of the input signal must be
greater than or equal to Rf C1 ,T > R f C1 Where, Rf is the feedback resistance
3.What is an IC:
The term IC refers to complex Electronic circuits consisting of a large number of
components on a single substrate.
4.What are the advantage of IC:
Cost reduction,Increased operating speed,Reduced power consumption and
Improved functional performance.
5.What are the different IC technologies:
Monolithic technology and Hybrid technology

Ex.no:3

S.NO
1
2
3

APPARATUS
IC741
Function Generator
CRO

RANGE
2MHZ
30MHZ

QUANTITY
1
2
1

Dual Power supply

15V

Potentiometer

10 k

6
7
8

Resistor
Bread Board
Wires

1k
-

6
1
As Required

INSTRUMENTATION AMPLIFIER

AIM:
To design Instrumentation Amplifier using IC741 and to test the operation.
APPARATUS REQUIRED:

THEORY:
The special amplifier, which is used for low level amplification with high CMRR, high
input impedance to avoid loading , low power conception. Instrumentation amplifier
circuit provides high input resistance for accurate measurement of signals from
transducers. In this circuit a non-inverting amplifier is added to each of the basic
difference amplifier inputs.
The Op-amp A1 and A2 are the non-inverting amplifiers forming the input or first stage
of the instrumentation amplifier and Op-amp A3 is normal difference forming an output
stage of the amplifier.
Features of an Instrumentation Amplifier:
High gain and accuracy
High CMRR
High gain stability with low temperature co-efficient
Low DC offset
Low output impedance
PROCEDURE:
1. Construct the circuit as per Circuit diagram shown in figure.
2. Switch ON the Power Supplies and apply the Input Voltages .
3. Observe the Output Voltage for different input voltages.
4. Note the readings and verify its values with theoretical calculation.
DESIGN:
For instrumentation amplifier,

Let R1= R2 = R3 = Rgain = 10 K then

Vout = (1+2) (V2-V1)
Vout = 3 (V2-V1)

CIRCUIT DIAGRAM:

INSTRUMENTATION AMPLIFIER USING 741 IC.

10K

+12V
10K

7
2

LM741

10K

+12V

2
2
2
10K2
2
V
1

LM741

-12V

10K

Output

+
4

10K

-12V
10K

+12V
2

LM741

+
4

-12V

MODEL READING:
Input V1:
Amplitude : 4 V
Time period : 4 ms
Input V2:
Amplitude : 1 V
Time period : 4 ms

DMM

Output V0:
Amplitude : 3V
Time period : 4 ms
MODEL CALCULATION:
VC = (V1+V2)/ 2
= (4+2.4) /2
= 3.2V
Vd = (V1-V2)
= (4 2.4)
= 1.6
We know that,
V0 = Ad Vd+ Ac Vc
So Ad = V0 / Vd
= 2 / 1.6
= 1.25
Ac = V0 / Vc
= 2 / 3.2=0.625
CMRR = 20 log (Ad / Ac )
= 20 log ( 1.25 / 0.625
=

MODEL GRAPH:
Input 1:

Input 2:

Output:

TABULATION:

S.NO

INPUT
VOLTAGE
IN
VOLTS(V1)

INPUT
VOLTAGE
IN
VOLTS(V2)

COMMON
MODE
GAIN(AC)

DIFFERENTIAL
MODE
GAIN(Ad)

CMRR
IN db=20
log( Ad/
AC)

20mv

8v

4.001

3.999

-0.043db

RESULT:
Thus designed the Instumentation Amplifier using IC 741 and tested its operation.

Ex.no:4

Active Filter LPF, HPF,BPF

AIM:
To design and obtain the frequency response of
i)

First order Low Pass Filter (LPF)

ii)

First order High Pass Filter (HPF)

iii)

Band pass filter

APPARATUS REQUIRED:

S.NO
DESCRIPTION
1
IC 741
2
Resistors

RANGE
10k ohm

QUANTITY
1
3

Variable Resistor

20k pot

Capacitors

0.01f

Cathode Ray Oscilloscope

(0 20MHz)

Regulated Power supply

(0 30V),1A

Function Generator

(1Hz 1MHz)

THEORY:

a) LPF:
A LPF allows frequencies from 0 to higher cut of frequency, f H. At fH the gain is
0.707 Amax, and after fH gain decreases at a constant rate with an increase in frequency.
The gain decreases 20dB each time the frequency is increased by 10. Hence the rate at
which the gain rolls off after fH is 20dB/decade or 6 dB/ octave, where octave signifies a
two fold increase in frequency. The frequency f=fH is called the cut off frequency
because the gain of the filter at this frequency is down by 3 dB from 0 Hz. Other
equivalent terms for cut-off frequency are -3dB frequency, break frequency, or corner
frequency.
b) HPF:
The frequency at which the magnitude of the gain is 0.707 times the maximum value
of gain is called low cut off frequency. Obviously, all frequencies higher than fL are pass
band frequencies with the highest frequency determined by the closed loop band width
all of the op-amp.

c) BAND PASS FILTER:

A band pass filter has a pass band between two cutoff frequencies fH and fL such
that fH > fL. Any input frequency outside this pass band is attenuated. There are two
types of band-pass filters. Wide band pass and Narrow band pass filters.
We can define a filter as wide band pass if its quality factor Q <10. If Q>10, then
we call the filter a narrow band pass filter. A wide band pass filter can be formed by
simply cascading high-pass and low-pass sections.

The order of band pass filter depends on the order of high pass and low pass
sections.
CIRCUIT DIAGRAM:

Fig 1: Low pass filter

Fig 2: High pass filter

Fig 3:Wide band pass filter

DESIGN:
First Order LPF:
To design a Low Pass Filter for higher cut off frequency f H = 4 KHz and pass band gain
of 2
fH = 1/( 2RC )
Assuming C=0.01 F, the value of R is found from
R= 1/(2fHC) =3.97K
The pass band gain of LPF is given by AF = 1+ (RF/R1)= 2
Assuming R1=10 K, the value of RF is found from
RF=( AF-1) R1=10K
First Order HPF:
To design a High Pass Filter for lower cut off frequency fL = 4 KHz and pass band gain of
2
fL = 1/( 2RC )
Assuming C=0.01 F,the value of R is found from
R= 1/(2fLC) =3.97K

The pass band gain of HPF is given by AF = 1+ (RF/R1)= 2

Assuming R1=10 K, the value of RF is found from
RF=( AF-1) R1=10K
Band pass filter:
To design a band pass filter having fH = 4KHz and fL = 400Hz and pass band gain of 2
As shown in Fig ,the first section consisting of Op Amp,RF,R1,R and C is the high pass
filter and second consisting of low pass filter. The design of low pass and high pass
filters.
Low Pass Filter Design:
Assuming C=0.01f, the value of R is found from
R = 1/(2fH C) =3.97K
The pass band gain of LPF is given by
ALPF = 1+ (R F / R1 )=2
Assuming R1=5.6 K,
the value of RF is found from
RF =( AF-1) R1=5.6K
High Pass Filter Design:
Assuming C=0.01f, the value of R is found from
R = 1/(2fLC) =39.7K
The pass band gain of HPF is given by
AHPF = 1+ (RF / R1 )=2
Assuming R1=5.6 K, the value of RF is found from
RF = ( AF-1) R1=5.6K

Model graphs :
Frequency

response

characteristics

of

LPF

Frequency response characteristics of HPF

Band pass filter

TABULATION: LOW PASS FILTER

INPUT VOLTAGE:5v
S.NO

OUTPUT

FREQUENCY

VOLTAGE

GAIN

GAIN IN

1.

20Hz

A=VO/ VIN
0.2

db
-13.97

2.

200Hz

0.2

-13.97

3.

2KHz

0.2

-13.97

4.

200KHz

0.2

-13.97

5.

0.2KHz

0.5

0.1

-20

TABULATION: HIGH PASS FILTER

INPUT VOLTAGE:1v
S.NO

FREQUENCY

OUTPUT

GAIN

GAIN IN

1.

20KHz

VOLTAGE
A=VO/ VIN
3.2v
3.2

2.

40KHz

3.6v

3.6

1.58

3.

60KHz

4v

4v

2.49

4.

100KHz

4.8v

4.8v

4.08

5.

120KHz

5v

5v

4.43

6.

130KHz

5v

5v

4.43

7.

150KHz

5v

5v

4.43

TABULATION: BAND PASS FILTER

db
0.56

INPUT VOTAGE=1V
S.NO FREQUENCY

OUTPUT

GAIN

GAIN IN

1.

500Hz

VOLTAGE
A=VO/ VIN
1.2v
1.2v

db
-7.95

2.

800Hz

1.4v

1.4v

-6.61

3.

10KHz

1.6v

1.6v

-5.46

4.

20KHz

1.6v

1.6v

-5.46

5.

50KHz

1.6v

1.6v

-5.46

6.

100KHz

1.4v

1.4v

-6.61

PROCEDURE:
First Order LPF
1. Connections are made as per the circuit diagram
2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not
go into saturation.
3. Vary the input frequency and note down the output amplitude at each step as shown in
Table
4. Plot the frequency response

First Order HPF

1.

Connections are made as per the circuit diagrams

2.

Apply sinusoidal wave of constant amplitude as the input such that op-amp does not
go into saturation.

3.

Vary the input frequency and note down the output amplitude at each step as shown
in Table

4. Plot the frequency response

Band pass filter:

1. Connect the circuit as per the circuit diagram shown in Fig
2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp does not go into
saturation (depending on gain).
3. Vary the input frequency from 100 Hz to 100 KHz and note down the output
amplitude at each step as shown in Table.
4. Plot the frequency response

RESULT:
Thus designed the LPF,HPF&BPF using IC 741 and tested its operation.
Viva questions and answers:
1. What is the relation between fC & fH, fL?
fC

fH fL

2. How do you increase the gain of the wideband pass filter?

By increasing the gain of either LPF or HPF
3. What is the difference between active and passive filters?
Active filters use Op Amp as active element, and resistors and capacitors as the
passive elements.
4. What is the effect of order of the filter on frequency response characteristics?

Each increase in order will produce -20 dB/decade additional increases in roll off
rate.
5 .What modifications in circuit diagrams require to change the order of the filter?
Order of the filter is changed by RC network.

Ex.no:5 (a)

MULTIVIBRATORS USING OP-AMP

A. Monostable Multivibrator
AIM:
To design and test the Monostable Multivibrator using IC741 and to test its
operation.
APPARATUS REQUIRED:
S.NO
DESCRIPTION
1
Regulated variable Power Supply

RANGE
(0-30)V

QUANTITY
2

Function generator

1MHz

CRO

30MHz

Resistors

15K,10K

Each two

Capacitor

0.1F

Op-amp

IC 741

Diode

BY 127

Bread board

Connecting wires

1
As required

THEORY:
A multivibrator is an electronic circuit used to implement a variety of simple twostate systems such as oscillators, timers and flip-flops. It is characterized by two
amplifying devices (transistors, electron tubes or other devices) cross-coupled by
resistors and capacitors.
Monostable, in which one of the states is stable, but the other is notthe circuit will
flip into the unstable state for a determined period, but will eventually return to the stable
state. Such a circuit is useful for creating a timing period of fixed duration in response to
some external event. This circuit is also known as a one shot. A common application is in
eliminating switch bounce. Multivibrators find applications in a variety of systems where
square waves or timed intervals are required.
It is also known as one shot multivibrator. It generates a single pulse of specified duration
in response to each external trigger signal.
A monostable multivibrator exits only one stable state. Application of a trigger causes a
change to the quasistable state.
The circuit remains in a quasistable state for a fixed interval of time and then reverts to its
original stable state.
An internal trigger signal is generated which produces the transition to the stable state.
Usually, the charging and discharging of a capacitor provides this internal trigger signal.

DESIGN CALCULATION
Vcc = 10V,Vsat = 10V,pulse width T= 1ms
1. To find R1 and R2

= 0.86 choose R1 = 10K

=

Assume R1= R2,

= 0.5

2. To find charging period of capacitor

T=R*C
We know that
Vt

= Vsat*

where Vsat = 12V and substitute Vt in

T,
we get,
T=R*C

take R2 = R1

T = 0.69 R * C
Choose T = 1 ms,C = 0.1F
Find out the value of R

CIRCUIT DIAGRAM:
D3

R5
10k

D 1N 4007
D2

R2
12k

D 1N 4007
C1
0 .1 u

V1
12v

0
4

U1
-

V-

OS1

OUT
V+

OS2

AD 741

6
5

V2
12v

R3
10k

D1

C2
0 .1 u

D 1N 4007

R4

CLK

3 .3 k

R1

D STM 1

1k

PROCEDURE:
1. Construct the circuit as per Circuit diagram shown in figure.
2. Switch ON the RPS and CRO.
3. Observe the Square waveform at output pin of the IC.
4. Note the readings and draw the waveforms in Graph Sheet.
5. Verify the observed frequency with our calculated frequency.

TABULATION: MONOSTABLE MULTIVIBRATOR

Amplitude

Timeperiod

INPUT

11v

20ms

OUTPUT

10v

10ms

RESULT:
Thus designed the monostable multivibrator using IC 741 and tested its operation.
Exp.No: 5(b)

Astable Multivibrator(SQUARE WAVE GENERATORASTABLE MULTIVIBRATOR)

AIM:
To design and test the Astable Multivibrator using IC741 and to test its operation.
APPARATUS REQUIRED:
S.NO

DESCRIPTION

RANGE

QUANTITY

OP-AMP

IC741

Resistor

4.7K,
1K
1.16K

1
1
1

Capacitor

0.1F

DUAL(0-30) V

4
5

CRO
RPS

THEORY:
An astable multivibrator is also known as a free-running multivibrator. It is called freerunning because it alternates between two different output voltage levels during the time
it is on. The output remains at each voltage level for a definite period of time.
It can be used any where, where we need the clock pulse train of low
frequency,like a function generator contains.
A simple op-Amp square wave generator is also called as free running
oscillator, the principle of generation of square wave output is to force an op-amp to
operate in the saturation region . A fraction =R2/(R1+R2) of the output is fed back to the
(+) input terminal.
The output is also fed to the (-) terminal after integrating by means of a low
pass Rc combination in astable multivibrator both the states are quasistables.
The frequency is determined by the time taken by the capacitor to charge from- Vsat
to+Vsat.

CIRCUIT DIAGRAM:

MODEL GRAPH
+ Vcc
+Vsat
Vsat
- Vsat
-Vsat
- Vee

PROCEDURE:
1. Construct the circuit as per Circuit diagram shown in figure.

2. Switch ON the RPS and CRO.

3. Observe the Square waveform at output pin of the IC.
4. Note the readings and draw the waveforms in Graph Sheet.
5. Verify the observed frequency with our calculated frequency.
DESIGN:
Let R1=R2=1K then,

= R2 / (R1+R2)
= 1K / (1K+1K)
= 0.5
Given, Frequency say 1KHz then T = 1ms.
Let C = 0.1F.
T = 2RC ln[(1+) / (1-)]
1ms = 2*R*0.1* ln[(1+0.5) / (1-0.5)]
R = 4.7 K
F=1KHZ =T=1ms
R2=1K,C=0.1F
R1=1.16R2=1.16K1K+100
T=2RC
R=T/2C =5K
4.7K

TABULATION: ASTABLE MULTIVIBRATOR

Amplitude

Timeperiod

INPUT

11v

20ms

OUTPUT

16v

20ms

RESULT
Thus designed the Astable multivibrator using IC 741 and tested its operation.

EX.NO: 5(c)

SCHMITT TRIGGER CIRCUITS- USING IC 741

AIM:
To design the Schmitt trigger circuit using IC 741 and IC 555

APPARATUS REQUIRED:
S.NO
1
2
3
4
5

DESCRIPTION
IC 741
555IC
Cathode Ray Oscilloscope
Multimeter
Resistors

6
7

Capacitors
Regulated power supply

RANGE

100

QUANTITY
1
1
1
1
2

56 K
0.1 f, 0.01 f
(0 -30V),1A

1
Each one
1

(0 20MHz)

THEORY:
The circuit shows an inverting comparator with positive feed back. This circuit
converts orbitrary wave forms to a square wave or pulse. The circuit is known as the
Schmitt trigger (or) squaring circuit. The input voltage Vin changes the state of the output
Vo every time it exceeds certain voltage levels called the upper threshold voltage V ut and
lower threshold voltage Vlt.
When Vo= - Vsat, the voltage across R1 is referred to as lower threshold voltage,
Vlt. When Vo=+Vsat, the voltage across R1 is referred to as upper threshold voltage
Vut.The comparator with positive feed back is said to exhibit hysterisis, a dead band
condition.

CIRCUIT DIAGRAM:

Fig 1: Schmitt trigger circuit using IC 741

Fig 2: Schmitt trigger circuit using IC 555

DESIGN:
Vutp = [R1/(R1+R2 )](+Vsat)
Vltp = [R1/(R1+R2 )](-Vsat)
Vhy = Vutp Vltp
=[R1/(R1+R2)] [+Vsat (-Vsat)]

DESIGN & CALCULATIONS IF ANY:

VUT = R1 / (R1+R2) * (+Vsat)

VLT = R1 / (R1+R2) * (-Vsat)
+Vsat = +Vcc = +15V and -Vsat = -Vcc = -15V
Let R1 = 2.2 K and R2=220 then
VUT = 2.2K / (2.2K+220) * (+15)
VLT = 2.2K / (2.2K+220) * (-15)
WAVE FORMS:

Fig1 : (a) Schmitt trigger input wave form

(b) Schmitt trigger output wave form

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Apply an orbitrary waveform (sine/triangular) of peak voltage greater than UTP to the
input of a Schmitt trigger.
3. Observe the output at pin6 of the IC 741 and at pin3 of IC 555 Schmitt trigger circuit by
varying the input and note down the readings as shown in Table
4. Find the upper and lower threshold voltages (Vutp, VLtp) from the output wave form.

TABULATION: SCHMITT TRIGGER

Amplitude

Timeperiod

INPUT

30v

3ms

OUTPUT

1.2v

ON Time:5.2s
OFF Time: 5.2s

RESULT:
Thus designed the Schmitt trigger circuit using IC 741 Timer and tested its operation.

Viva Questions & Answers:

1. What is the other name for Schmitt trigger circuit?

Regenerative comparator
2. In Schmitt trigger which type of feedback is used?
Positive feedback.
3. What is meant by hysteresis?
The comparator with positive feedback is said to be exhibit hysteresis, a deadband
condition. When the input of the comparator is exceeds Vutp, its
+ Vsat to - Vsat and reverts back to its original state,+

output switches from

Vsat ,when the input goes

below Vltp
4. What are effects of input signal amplitude and frequency on output?
The input voltage triggers the output every time it exceeds certain voltage levels
(UTP and LTP). Output signal frequency is same as input signal frequency.

Exp. No : 6

RC PHASE SHIFT OSCILLATOR USING OP-AMP 741 IC.

AIM:
To Design and construct RC Phase Shift Oscillator Circuit using IC 741 and
observe its output waveform.

APPARATUS REQUIRED:
DESCRIPTION
S.NO
1
OP-AMP
2
Resistor

RANGE

Capacitor

IC-741
16K, 32K,
1.59K,
0.1f

4
5

CRO
RPS

DUAL(0-30) V

QUANTITY
1
1
2
2
1
1

THEORY:
1. A phase shift oscillator is a simple sine wave electronic oscillator. It contains an
inverting amplifier, and a feedback filter, which 'shifts' the phase by 180 degrees
at the oscillation frequency.
2. The filter must be designed so that at frequencies above and below the oscillation
frequency, either more or less than 180 degrees shifts the signal. This results in
constructive superposition for signals at the oscillation frequencies, and
destructive superposition for all other frequencies.
3. The mathematics for calculating the oscillation frequency and oscillation criteria
for this circuit are surprisingly complex, due to each R-C stage loading the
previous ones. The calculations are greatly simplified by setting all the resistors
(except the negative feedback resistor) and all the capacitors to

RC PHASE SHIFT OSCILLATOR

Rf =470k
R1=150k

741

3
CR
O

R = 1.5 k
C =0.01F
DESIGN:
fo = 1 / 6 (2 R C )
Rf 29 R1
C = 0.01F, fo = 500 Hz.
R = 1 / 6 (2 f C ) = 13 k
Therefore, Choose R = 15k
To prevent loading,
R1 10 R
R1 =10 R = 150 k.
Rf = 4.35 M
MODEL GRAPH:

t
T

PROCEDURE:
1. Connect the circuit as shown in fig. With the design values.
2. Observe the output waveforms using a CRO.For obtaining sine wave adjust Rf.
3. Measure the output wave frequency and amplitude.

TABULATION: SCHMITT TRIGGER

Amplitude
OUTPUT

40mv

Timeperiod
60ms

RESULT:
Thus designed the RC Phase Shift Oscillator Circuit using IC 741 and tested its
operation.

Viva questions and answers:

1. What happens when the common terminal of V+ and V- sources is not grounded?
If the common point of the two supplies is not grounded, twice the supply voltage
will get applied and it may damage the op-amp.
2. Define CMRR of an op-amp.
The relative sensitivity of an op-amp to a difference signal as compared to a
Common mode signal is called the common mode rejection ratio. It is expressed in
decibels.
CMRR= Ad/Ac
3. What are the requirements for producing sustained oscillations in feedback circuits?
For sustained oscillations,. The total phase shift around the loop must be zero at
the desired frequency of oscillation, . At fo, the magnitude of the loop gain should be
equal to unity
4. Mention any two audio frequency oscillators:
RC phase shift oscillator
Wein bridge oscillator
5. Define analog signal
When the amplitude of a signal varies continuously with respect to time,the signal
is called analog.
6. Define discrete signal.
When a signal is defined only at discrete instants of time,the signal is called
discrete signal..

Exp. No: 6(b)

WIEN BRIDGE OSCILLATOR USING OP-AMP 741 IC.

AIM:
To Design and construct Wien Bridge Oscillator Circuit using IC 741 and observe
its output waveform.
APPARATUS REQUIRED:

S.NO
DESCRIPTION
1
OP-AMP
2
Resistor

RANGE

Capacitor

IC-741
16K, 32K,
1.59K,
0.1f

4
5

CRO
RPS

DUAL(0-30) V

QUANTITY
1
1
2
2
1
1

THEORY:
A Wien bridge oscillator is a type of electronic oscillator that generates sine waves
without having any input source. It can output a large range of frequencies. The bridge
comprises four resistors and two capacitors. The circuit is based on a network originally
developed by Max Wien in 1891.
In Wien bridge oscillator, wein bridge circuit is connected between the amplifier
input terminals and output terminals. The bridge has a series RC network in one arm and
parallel network in the adjoining arm. In the remaining 2 arms of the bridge resistors
R1and Rf are connected. To maintain oscillations total phase shift around the circuit must
be zero and loop gain unity. First condition occurs only when the bridge is balanced.
Assuming that the resistors and capacitors are equal in value, the resonant frequency of
balanced bridge is given by / the frequency of oscillation is given by:

DESIGN:
At the frequency the gain required for sustained oscillations is given by
1+Rf /R1 = 3 or Rf = 2R1
Fo = 0.65/RC and Rf = 2R1
CALCULATION:
Theoretical

Fr = 1/(2*3.14*R*C)
Practical:
F = 1/T
CIRCUIT
DIAGRAM

PROCEDURE:
1. Connections are made as per the diagram.
2. R,C,R1,Rf are calculated for the given value of fo using the design .
3. Output waveform is traced in the CRO.

Amplitude

Timeperiod

OUTPUT

80mv

25ms

RESULT:
Thus designed the Wien Bridge Oscillator Circuit using IC 741 and tested its operation.

Viva questions and answers

1. Define slew rate.
It is defined as the maximum rate of change of output voltage caused by a step
input voltage and is specified in volt per micro second. For IC 741 it is 0.5V/micro sec.
2. In what way is IC 741S better than IC 741?
IC741S is a military grade of amplifier and has higher slew rate and lower
temperature than IC 741.
3. What is an isolation amplifier?
An isolation amplifier is an amplifier that offers electrical isolation between its
input and output terminals.
4. What is the need for a tuned amplifier?
In radio or TV receivers, it is necessary to select a particular channel among all
other available channels. Hence some sort of frequency selective circuit is needed that
will allow us to amplify the frequency band required and reject all the other unwanted
signals and this function is provided by a tuned amplifier.
EX.NO: 7(a)

IC 555 TIMER-MONOSTABLE OPERATION CIRCUIT

AIM:
To generate a pulse using Monostable Multivibrator by using IC555
APPARATUS REQUIRED:

S.NO

DESCRIPTION
555 IC
Capacitors
Resistor
Regulated Power supply
Function Generator
Cathode ray oscilloscope

1
2
3
4
5
6

RANGE
0.1f,0.01f
10k
(0 30V),1A
(1HZ 1MHz)
(0 20MHz)

QUANTITY
1
Each one
1
1
1
1

THEORY:
A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulsegenerating circuit in which the duration of the pulse is determined by the RC network
connected externally to the 555 timer. In a stable or stand by mode the output of the
circuit is approximately Zero or at logic-low level. When an external trigger pulse is
obtained, the output is forced to go high ( VCC). The time for which the output remains
high is determined by the external RC network connected to the timer. At the end of the
timing interval, the output automatically reverts back to its logic-low stable state. The
output stays low until the trigger pulse is again applied. Then the cycle repeats. The
Monostable circuit has only one stable state (output low), hence the name monostable.
Normally the output of the Monostable Multivibrator is low.

CIRCUIT DIAGRAM:

Fig 1: Monostable Circuit using IC555

DESIGN:
Consider VCC = 5V, for given tp
Output pulse width tp = 1.1 RA C
Assume C in the order of microfarads & Find RA

Typical values:
If C=0.1 F , RA = 10k then
tp = 1.1 mSec
Trigger Voltage =4 V

WAVEFORMS:

Fig (a): Trigger signal

(b): Output Voltage
(c): Capacitor Voltage
TABULATION: MONOSTABLE MULTIVIBRATOR
Amplitude

Timeperiod

INPUT

50mv

36ms

OUTPUT

0.2mv

2.4ms

PROCEDURE:
1.
2.
3.
4.
5.

Connect the circuit as shown in the circuit diagram.

Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
Observe the output waveform and measure the pulse duration.
Theoretically calculate the pulse duration as Thigh=1.1. RAC
Compare it with experimental values.

RESULT:
Thus designed the Monostable multivibrator using IC 555 Timer and tested its operation.

Viva Questions & Answers:

1. Is the triggering given is edge type or level type? If it is edge type, trailing or raising
edge?
Edge type and it is trailing edge
2. What is the effect of amplitude and frequency of trigger on the output?
Output varies proportionally.
3. How to achieve variation of output pulse width over fine and course ranges?
One can achieve variation of output pulse width over fine and course ranges
by varying capacitor and resistor values respectively

4. What is the effect of Vcc on output?

The amplitude of the output signal is directly proportional to Vcc
5. What are the ideal charging and discharging time constants (in terms of R and C) of
capacitor voltage?
Charging time constant T=1.1RC Sec
Discharging time constant=0 Sec
6. What is the other name of monostable Multivibrator? Why?
i) Gating circuit .It generates rectangular waveform at a definite time and thus
could be used in gate parts of the system.
ii) One shot circuit. The circuit will remain in the stable state until a trigger pulse
is received. The circuit then changes states for a specified period, but then it returns to
the original state.
7. What are the applications of monostable Multivibrator?
Missing Pulse Detector, Frequency Divider, PWM, Linear Ramp Generator

EX.NO: 7(b)

IC 555 TIMER - ASTABLE OPERATION CIRCUIT

AIM:
To generate unsymmetrical square and symmetrical square waveforms using
IC555.
APPARATUS REQUIRED:
S.NO
1
2
3
4
5
6

DESCRIPTION
IC 555
Resistors
Capacitors
Diode
Regulated Power supply
Cathode Ray Oscilloscope

RANGE
3.6k,7.2K
0.1f,0.01f
OA79
(0 30V),1A
(0 20MHz)

QUANTITY
1
Each one
Each one
1
1
1

THEORY:
When the power supply V CC is connected, the external timing capacitor C
charges towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high
(VCC) as Reset R=0, Set S=1 and this combination makes

=0 which has unclamped

the timing capacitor C.

When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the
control flip flop on that

=1. It makes Q1 ON and capacitor C starts discharging

towards ground through RB and transistor Q1 with a time constant RBC. Current also
flows into Q1 through RA. Resistors RA and RB must be large enough to limit this current
and prevent damage to the discharge transistor Q1.

The minimum value of R A is

approximately equal to VCC/0.2 where 0.2A is the maximum current through the ON
transistor Q1.

During the discharge of the timing capacitor C, as it reaches V CC/3, the lower
comparator is triggered and at this stage S=1, R=0 which turns

=0. Now

=0

unclamps the external timing capacitor C. The capacitor C is thus periodically charged
and discharged between 2/3 VCC and 1/3 VCC respectively. The length of time that the
output remains HIGH is the time for the capacitor to charge from 1/3 VCC to 2/3 VCC.
The capacitor voltage for a low pass RC circuit subjected to a step input of V CC
volts is given by VC = VCC [1- exp (-t/RC)]
Total time period T = 0.69 (RA + 2 RB) C
f= 1/T = 1.44/ (RA + 2RB) C
CIRCUIT DIAGRAM:

Fig. 555 Astable Circuit

DESIGN:
Formulae: f= 1/T = 1.44/ (RA+2RB) C
Duty cycle (D) = tc/T = RA + RB/(RA+2RB)
MODEL CALCULATIONS:
Given f=1 KHz. Assuming c=0.1F and D=0.25
1 KHz = 1.44/ (RA+2RB) x 0.1x10-6 and 0.25 =( RA+RB)/ (RA+2RB)
Solving both the above equations, we obtain RA & RB as
RA = 7.2K

RB = 3.6K

WAVEFORMS:

Fig (a): Unsymmetrical square wave output

(b): Capacitor voltage of Unsymmetrical square wave output
(c): Symmetrical square wave output

PROCEDURE:

I) Unsymmetrical Square wave

1. Connect the circuit as per the circuit diagram shown without connecting the
diode OA 79.
2. Observe and note down the waveform at pin 6 and across timing capacitor.
3.

Measure the frequency of oscillations and duty cycle and then compare with the
given values.

4. Sketch both the waveforms to the same time scale.

II) Symmetrical square waveform generator:

1. Connect the diode OA79 as shown in Figure to get D=0.5 or 50%.
2. Choose Ra=Rb = 10K and C=0.1f
3. Observe the output waveform, measure frequency of oscillations and the duty
cycle and then sketch the o/p waveform.

TABULATION: ASTABLE MULTIVIBRATOR

Amplitude

Timeperiod

INPUT

50mv

36ms

OUTPUT

2.4v

4.8

RESULT:
Thus designed the Astable multivibrator using IC 555 Timer and tested its operation.

Viva Questions & Answers:

1. What is the effect of C on the output?
Time period of the output depends on C
2. How do you vary the duty cycle?
By varying R A or RB.
3. What are the applications of 555 in astable mode?
FSK Generator, Pulse Position Modulator, Square wave generator
4. What is the function of diode in the circuit?
To get symmetrical square wave.
5. On what parameters Tc and Td designed?
R A ,RB and C
6. What are charging and discharging times?s
The time during which the capacitor charges from (1/3) Vcc to (2/3) Vcc
is equal to the time the output is high is known as charging time and is given by
Tc=0.69(RA+RB) C
The time during which the capacitor discharges from (2/3) Vcc to (1/3)
Vcc is equal to the time the output is low is known as discharging time and is given
by

Td=0.69(RB) C.

Exp. No : 8(a)

CHARACTERISTICS OF PLL.

AIM:
To construct and study the operation of PLL IC 565 and determine its Characteristics.
Apparatus Required:

S.No

Components

1
2
3

IC 565
Resistors
Capacitors

4
5
6

Function Generator

Range
6.8 K
0.001 F
0.1 F, 1 F

Quantity
1
1
1 each

(1Hz 1MHz.)

0- 30 V

1
1

C.R.O
Dual Power Supply

Circuit Diagram:
+6V

R1

10

Function
Generator
(Square
Wave)
Vi Input

6.8 K
C1 =

7
2
6
3 IC 565 4
9
1 5

CT

= 0.001 F
-6V

C = 1 F
0.01 F
Demodulated O/p
Reference O/p
VCO O/p (fO)

Pin Diagram (IC 565 - PLL)

- VCC 1
Input

14 NC

13 NC

Output 3

12 NC
IC 565

VCO I/P 4
VCO O/P 5
Output
Demodulated
Output

11 NC
10 + VCC

9 VCO CT

8 VCO RT

Procedure:

The connections are given as per the circuit diagram.

Measure the free running frequency of VCO at pin 4, with the input signal Vi
set equal to zero. Compare it with the calculated value = 0.25 / (RT CT).
Now apply the input signal of 1 VPP square wave at a 1 KHz to pin 2.
Connect one channel of the scope to pin 2 and display this signal on the scope.

Gradually increase the input frequency till the PLL is locked to the input
frequency. This frequency f1 gives the lower end of the capture range. Go on
increasing the input frequency, till PLL tracks the input signal, say, to a
frequency f2.This frequency f2 gives the upper end of the lock range. If input
frequency is increased further, the loop will get unlocked.

Now gradually decrease the input frequency till the PLL is again locked. This
is the frequency f3, the upper end of the capture range. Keep on decreasing the
input frequency until the loop is unlocked. This frequency f4 gives the lower
end of the lock range.

The lock range fL = (f2 f4).Compare it with the calculated value

of 7.8 fo / 12 .Also the capture range is fc = (f3 f1).Compare it with the

calculated value of capture range.
o fc = (fL / (2)(3.6)(103) C)1/2

TABULATION: PLL
Amplitude

Timeperiod

INPUT

50mv

90ms

OUTPUT

16mv

3.6ms

Result :
Thus the PLL circuit is constructed and its Characteristics are determined.

Exp. No : 8 (b)

FREQUENCY MULTIPLIER USING PLL.

AIM:
To construct and study the operation of frequency multiplier using IC 565.
Apparatus Required:
S.No

Components

1
2

IC 565,IC 7490,2N2222
Resistors

Capacitors

4
5
6
7.

FunctionGenerator (Digital)
C.R.O
Dual Power Supply

Range
20 K, 2k,
4.7k,10k
0.001 F
10 F
1 Hz 2 MHz
0- 30 V

Quantity
1
1
1 each
1
1
1

Procedure:
1. The connections are given as per the circuit diagram.
2. The circuit uses a 4- bit binary counter 7490 used as a divide-by-5 circuit.
3. Measure the free running frequency of VCO at pin 4, with the input signal Vi set
equal to zero. Compare it with the calculated value = 0.25 / (RT CT).
4. Now apply the input signal of 1 VPP square wave at 500 Hz to pin 2.
5. Vary the VCO frequency by adjusting the 20k potentiometer till the PLL is
locked. Measure the output frequency. It should be 5 times the input frequency.
6. Repeat steps 4, 5 for input frequency of 1 kHz and 1.5 kHz.

Circuit Diagram:
+6v

20kohm

RT

2kohm

C
10Mf

0.001Mf
C1
10

Fo=5fin
VCO Output

4
565
3

+6v
5
1

RT
4.7kohm

11
0.01Mf

7490
(%5)
2 3 6

1
10

vin

2N2222
-6v

TABULATION:FREQUENCY MULTIPLIER

10kohm
RT

Amplitude

Timeperiod

INPUT

50mv

90ms

OUTPUT

16mv

3.6ms

Result :
Thus the frequency multiplier circuit using PLL is constructed and studied.

Viva questions and answers

1. Mention the applications of PLL
Frequency multiplier
Frequency synthesizer
Frequency translation
Clock and data recovery
2. What is a voltage controlled oscillator?
Voltage controlled oscillator is a free running multivibrator operating at a set
frequency called the free running frequency. This frequency can be shifted to either side
by applying a dc control voltage and the frequency deviation is proportional to the dc
control voltage.
3. What are the applications of VCO?
VCO is used in FM, FSK, and tone generators, where the frequency needs to be
controlled by means of an input voltage called control voltage.
4. What is PLL?
PLL is a control system that generates an output signal whose phase is related to
the phase of input Reference signal.

Ex.No: 9

DC POWER SUPLY USING LM317 AND LM723

AIM:
To design and test the dc power supply using LM317and LM723

.
APPARATUS REQUIRED:

S.NO
1
2
3
4
5
6
7
8
9
8
9
10

APPARATUS
IN5401
LM317
Power supply
CRO
Transformer
Capacitor
Resistor
Potentiometer
LED
Function
Generator
Resistor
Wires

RANGE
12V
30MHZ
0.01f
330,1k,47k,
10k,15k
10k

QUANTITY
6
1
1
1
1
5
Each 1,3,1
1

10K
Single stand

2
As Required

THEORY:
This is a positive variable power supply that is compact and easy to build. It is
ideal for powering any application requiring a DC supply at current levels up to 1.5A.
This power supply project should be among the first project that all electronic hobbyist
should embark on. With this power supply, one can use it to power up many electronic
kits and projects instead of using batteries.
The features of LM317 circuit are:
Output reverse polarity and back-voltage protection
LED power on indication
Variable output voltage
AC or DC input voltage
Low noise
The features of LM723 circuit are:
150 mA output current without external pass transistor
Output currents in excess of 10A possible by adding external transistors
Input voltage 40V max
Output voltage adjustable from 2V to 37V
Can be used as either a linear or a switching regulator

DESIGN:
The output voltage is calculated by:
V(out) = 1.25(1 + VR1/R1)
The design formula are:
VOUT = 1.25 (1 + R2/R1) volts, or alternatively
R2/R1 = (VOUT/1.25) - 1
PIN CONFIGURATION:

DC POWER SUPPLY USING LM317

DC POWER SUPPLY USING LM723:

PROCEDURE:
1. Set up the circuit.

2. Switch on the input supply and input voltage source.

3. Vary the input from 6V to 15V and observe the output voltage.
4 Vary the rheostat and note the change in the output.
5. Draw the regulation characteristics with input along X-axis and
output along Y-axis.
Viva Questions & Answers:
1. What is the effect of R1 on the output voltage?
R1 decreases for an increase in the output voltage.
2. What are the applications of voltage regulators?
Voltage regulators are used as control circuits in PWM, series type switch
mode supplies, regulated power supplies, voltage stabilizers.
3. What is the effect of Vi on output?
Output varies linearly with input voltage up to some value (o/p
voltage+dropout voltage) and remains constant.
1. What is a linear voltage regulator?
Series or linear regulator uses a power transistor connected in series
between the Unregulated dc input and the load and it conducts in the linear region
.The output voltageis controlled by the continous voltage drop taking place across
the series pass transistor.
2. What is a switching regulator?
Switching regulators are those which operate the power transistor
as a high frequency on/off switch, so that the power transistor does not conduct
current continously.This gives improved efficiency over series regulators.
3. What is the input voltage of LM 317, LM 723?
40 V
4. What is the output voltage of LM317, LM 723?
1.2V to 54V, 2V to 57V
RESULT:
Thus the dc power supply using LM317and LM723 is constructed and studied.

Ex.No:10

STUDY OF SMPS

AIM:
To Study the SMPS Control circuits using SG3524/SG3525.
SMPS control circuit SG3524
DESCRIPTION
This monolithic integrated circuit contains all the control circuitry fora regulating power
supply inverter or switching regulator. Included Ina 16-pin dual-in-line package is the
voltage reference, error amplifier, oscillator, pulse-width modulator, pulse steering flipflop, dual alternating output switches and current-limiting and shut down circuitry. This
device can be used for switching regulators of either polarity, transformer-coupled DC-toDC converters, transformer less voltage doublers and polarity converters, as well as other
power control applications.
PIN CONFIGURATION
D, F, N
Packages

TOP VIEW

INVERT INPUT
NON-INV INPUT

2
OSC OUTPUT
3
4

(+)CL SENSE
()CL SENSE

5
GROUND
6
RT
7
CT
8
VREF
9
VIN
10
EMITTER B
11
12
13
14
16
15

COLLECTOR B
COLLECTOR A
EMITTER A
SHUTDOWN
SHUTDOWN
COMPENSATION

THEORY OF OPERATION
Voltage Reference

An internal series regulator provides a nominal 5V output which is used both to

generate a reference voltage and is the regulated source for all the internal timing and
controlling circuitry. This regulator may be bypassed for operation from a fixed 5V
supply by connecting Pins 15 and 16 together to the input voltage. In this configuration,
the maximum input voltage is 6.0V.
Oscillator
The oscillator in the SG3524 uses an external resistor (RT) to establish a constant
charging current into an external capacitor (CT). While this uses more current than a
series-connected RC, it provides a linear ramp voltage on the capacitor which is also used
as a reference for the comparator. The charging current is equal to 3.6 V and should be
kept within the approximate range of 30A to 2mA; i.e., 1.8k<RT<100k. The range of
values for CT also has limits as the discharge time of CT determines the pulse-width of
the oscillator output pulse. This pulse is used (among other things) as a blanking pulse to
both outputs to insure that there is no possibility of having both outputs on
Simultaneously during transitions. This output dead time relationship is shown in Figure
5. A pulse width below approximately 0.5s may allow false triggering of one output by
removing the blanking pulse prior to the flip-flops reaching a stable state. If small values
of CT must be used, the pulse-width may still be expanded by adding a shunt capacitance
to ground at the oscillator output. [(Note: Although the oscillator output is a convenient
oscilloscope sync input, the cable and input capacitance may increase the blanking pulsewidth slightly.)] Obviously, the upper limit to the pulse width is determined by the
maximum duty cycle acceptable. Practical values of CT fall between 0.001 and 0.1F.
The oscillator period is approximately t=RTCT where t is in microseconds. The use of
Figure 6 will allow selection of RT and CT for a wide range of operating frequencies.
Note that for series regulator applications, the two outputs can be Connected in parallel
for an effective 0-90% duty cycle and the frequency of the oscillator is the frequency of
the output. For push-pull applications, the outputs are separated and the flip-flop
divides the frequency such that each outputs duty cycle is 0-45% and the overall
frequency is one-half that of the oscillator.
External Synchronization
If it is desired to synchronize the SG3524 to an external clock, a pulse of +3V
may be applied to the oscillator output terminal with RTCT set slightly greater than the
clock period. The same considerations of pulse-width apply. The impedance to ground at
this point is approximately 2k. If two or more SG3524s must be synchronized together,
one must be designated as master with its RTCT set for the correct period. The slaves
should each have an RTCT set for approximately 10% longer period than the master with
the added requirement that CT(slave)=one-half CT (master). Then connecting Pin 3 on all
units together will insure that the master output pulsewhich occurs first and has a wider
pulse widthwill reset the slave units.
Error Amplifier
This circuit is a simple differential input transconductance amplifier. The output is
the compensation terminal, Pin 9, which is a high-impedance node .The gain is AV _
gMRL _ 8 IC RL 2kT _ 0.002RL and can easily be reduced from a nominal of 10,000 by
an external shunt resistance from Pin 9 to ground. In addition to DC gain control, the
compensation terminal is also the place for AC phase compensation. Therefore, the best

stabilizing network is a series RC combination between Pin 9 and ground which

introduces a zero to cancel one of the output filter poles. A good starting point is 50k
plus 0.001F.
Philips Semiconductors Product specification
SMPS control circuit SG3524
One final point on the compensation terminal is that this is also a convenient place
to insert any programming signal which is to override the error amplifier. Internal
shutdown and current limit circuits are connected here, but any other circuit which can
sink 200A can pull this point to ground, thus shutting off both outputs. While feedback
is normally applied around the entire regulator, the error amplifier can be used with
conventional operational amplifier feedback and is stable in either the inverting or noninverting mode. Regardless of the connections, however, input common-mode limits
must be observed or output signal inversions may result. For
conventional regulator applications, the 5V reference voltage must be divided down as
shown in Figure 8. The error amplifier may also be used in fixed duty cycle applications
by using the unity gain configuration shown in the open-loop test circuit.
Current Limiting
The current limiting circuitry of the SG3524 is shown in Figure 9. By matching
the base-emitter voltages of Q1 and Q2, and assuming a negligible voltage drop across
R1: Threshold=VBE(Q1)+I1R2-VBE(Q2) =I1R2 200mV Although this circuit
provides a relatively small threshold with a negligible temperature coefficient, there are
some limitations to its use, the most important of which is the 1V common-mode range
which requires sensing in the ground line. Another factor to consider is that the frequency
compensation provided by R1C1 and Q1 provides a roll-off pole at approximately
300Hz. Since the gain of this circuit is relatively low, there is a transition region as the
current limit amplifier takes over pulse width control from the error amplifier. For testing
purposes, threshold is defined as the input voltage required to get 25% duty cycle with
the error amplifier signaling maximum duty cycle. In addition to constant current
limiting, Pins 4 and 5 may also be used in transformer-coupled circuits to sense primary
current and to shorten an output pulse, should transformer saturation occur. Another
application is to ground Pin 5 and use Pin 4 as an additional shutdown terminal: i.e., the
output will be off with Pin 4 open and on when it is grounded.
FEATURES
Complete PWM power control circuitry
Single ended or push-pull outputs
Line and load regulation of 0.2%
1% maximum temperature variation
Total supply current is less than 10mA
Operation beyond 100kHz
SMPS using SG3525:

There are three main blocks described below ...

A - Switching MOSFETs and transformer
B - Rectification and filtering
C - Control circuitry
A - Switching MOSFETs and Transformer
The selected switching topology is called a "push-pull" converter, because the
transformer has a double primary (or a "centre-tapped" one, if your prefer). The centre
tap is permanently connected to the car battery (via an LC filter to avoid creating peaks in
the battery lines, which could affect other electronic equipment in the car). The two ends
of the primary are connected to a pair of paralleled MOSFETs each that tie them to
ground in each conduction cycle (Vgs of the corresponding MOSFET high).
These MOSFETs should be fast, able to withstand high currents (in excess of 30A each if
possible) and have the lowest possible Rds(on). The proposed On-Semiconductors
MTP75N06 can withstand 75Amp and has a Rds(on) below 10 milliohm. This is
important, because the lower this resistance is, the less power they are going to dissipate
when switching with a square waveform. Another alternatives are MTP60N06, or the
more popular BUZ11 and IRF540.

Although the schematics show a previous bipolar push-pull stage, you can also connect
the gate resistor directly to the output of the controlling IC, leaving out the transistors, as
the SG3525 is capable to drive up to 500 mA (theoretically), more than enough to switch
the MOSFETs fast.
B - Rectification and Filtering
If one looks to the secondary side of the SMPS, it resembles exactly the scheme
of a typical mains PSU, with one fundamental difference - the switching diodes have to
be FAST or ULTRAFAST, if you use a standard diode bridge the system will simply blow
up (and this can be very impressive, believe me!) Although a diode bridge is represented,
it can be made with discrete diodes as well. Use high current (10 A minimum and a
suitable voltage rating) diodes. I recommend using 4 x TO220 double diodes that can be
paralleled to form a single one in each package.
You may be surprised that the capacitors aren't too big. This is due to the high switching
frequency. It is important that they are good quality ones and must be rated for 105
degrees operation. Ripple current rating and low ESR (equivalent series resistance) is
very important for any switching supply. In my opinion, 5000uF per rail is enough.
C - Control Circuitry
The controller IC is an SG3525. It comprises all the necessary subsystems to
generate a fixed frequency, compare with a reference to modulate its pulse width and
drive two outputs without overlapping. It works from 8 to 35V and filtering in the supply
is recommended, as shown. As stated above, you can connect the outputs directly to the
gate resistors of the MOSFETs if you don't want to include the bipolar stages.
The resistor RT and capacitor CT fix the oscillation frequency. Experimentation showed
me that about 35kHz produces good results with my transformer. Another capacitor, Css
fixes the "slow start" time - when you turn on the system, the pulse width increases from
0 up to the steady value, thus limiting the "inrush" current, a very good feature to avoid
"thumps" in the speaker and protect the electrical installation. It has also a shutdown pin
that allows control of the SMPS from an external signal (REMOTE from the head unit,
for example).
In this project, layout is critical, incorrect track widths or excessively long traces can
have high inductances and produce peaks that can make the MOSFETs blow up. ESP will
probably offer a suitable PCB layout if there is enough interest in it.

RESULT:
Thus the SMPS using SG3524 and SG3525 were studied.