ELECTRONICS I

Major Exam III

EE 203 Winter 2004 (032)

Thursday, May 06th, 2004

17H00 18H30 (1 hour & 30 minutes)

NAME

____________________

Student ID ____________________
Section

____________________

Examiner Dr. Alaa El-Din Hussein

This examination contains six questions and is composed of 8 pages including this cover page.
Partial point distribution is indicated between brackets. Please pace yourself accordingly.
Do not forget to write your name and I.D. number on this sheet and on top of every sheet on the
exam.
This is a CLOSED book examination.
Make sure to state all assumptions you find necessary to complete your answer.
Show all your work. Partial credit will be given. If you think you need something that you cant
remember, write down what you need and what youd do if you remembered it.
Question #
Mark

Question 1

Question 2

Question 3

Question 4

Question 5

Question 6

Total

Total Mark

10

10

10

20

10

20

80

KFUPM

EE 203 Third Major Exam

Winter 2004(032)

Name:

Page 2 of 9

Question 1: Choose the correct answer only:

[10 Marks]

1. The current in the MOSFET at normal operation is carried by:

a) electrons only
b) holes only for N-substrate and electrons only for P-substrate
c) both electrons and holes at the same time d) electrons only for N-substrate and holes only for P-substrate

2. The MOSFET may be used as a voltage controlled resistor in:

a) pinch-off region
c) triode region

b) saturation region
d) active region

3. Which of the following is a JFET amplifier configuration?

a) common-body
c) common-collector

b) common-gate
d) CMOS inverter

4. The Junction Field Effect Transistor is

a) an enhancement device
c) a depletion device

b) a depletion device for N-channel and an enhancement device for P-channel

d) a depletion device for P-channel and an enhancement device for N-channel

5. The phase shift between the input and output signals in common-drain amplifier is
a) 0
c) 180

b) 90
d) 270

6. The phase shift between the input and output signals in common-source amplifier is
a) 0
c) 180

b) 90
d) 270

7. The JFET may be used as a constant current source in:

a) pinch-off region
c) triode region

b) linear region
d) cut-off region

8. The threshold voltage for P-channel enhancement MOSFET is

a) less than zero
c) exactly zero

b) more than zero

d) slightly more than zero

9. The ideal differential amplifier output is

a) proportional to the sum of the two inputs
b) proportional to the difference between the two inputs
c) proportional to the average of the two inputs
d) proportional to the derivative of the first input with respect to the second input (dvi1/dvi2)

10. The ideal differential amplifier has CMRR equal to

a) zero
c) infinity

Question 1
Answer

b) unity
d) 0.1

10

KFUPM

EE 203 Third Major Exam

Name:

Question 2:

Winter 2004(032)
Page 3 of 9

[10 Marks]

For the shown current mirror circuit assuming identical

transistors, with nCox= 100 A/V2, and VTN=1V. Calculate ID
in M2 for the following two cases?
a) = 0.02 V-1, and (W/L)M1 = (W/L)M2 = 1 [6 Marks]
b) = 0.0 , and (W/L)M1 = 0.1(W/L)M2 = 1
[4 Marks]

KFUPM

EE 203 Third Major Exam

Name:

Question 3:

Winter 2004(032)
Page 4 of 9

[10 Marks]

For the shown circuit, assume that the transistor M1 has the following
parameters: Kn=25 A/V2, VTO=1V, =0.5 V0.5, 2*f=0.6 V.
a) Calculate the operating point (ID, VDS) [3 Marks]
b) Determine the transistor region of operation [1 Mark]
c) If the substrate is connected to the ground (instead of the
source). Calculate the new operating point. [6 Marks]

KFUPM

EE 203 Third Major Exam

Name:

Question 4:

Winter 2004(032)
Page 5 of 9

[20 Marks]

For the shown MOSFET amplifier circuit assume that

nCox=500 A/V2, VTN=1V, W=10m, L=1m, and
=0.015 V.
a) What is the amplifier type? [2 Marks]
b) Draw the equivalent D.C circuit and find the QPoint (ID,VDS) [4 Marks]
c) Draw the small signal model and calculate its
parameters [3 Marks]
For the following assume = 0 (i.e neglect ro)
d) Draw the A.C circuit and calculate Ri, Ro, and
voltage gain (vo/vs) (with RL disconnected) [8
Marks]
e) Repeat (d) with RL connected [3 Marks]

KFUPM

EE 203 Third Major Exam

Name:

Question 5:

Winter 2004(032)
Page 6 of 9

[10 Marks]

Consider the same amplifier circuit in Question (4). If the output is taken from the source terminal and
assuming that =0 (i.e. neglect ro):
a) What is the new amplifier type? [2 Marks]
b) Draw the A.C circuit and calculate Ro1, and voltage gain (vo1/vs) [8 Marks]

KFUPM

EE 203 Third Major Exam

Name:

Question 6:

Winter 2004(032)
Page 7 of 9

[20 Marks]

For the shown differential amplifier assuming identical

transistors with = 100, and VBE=0.7V for conducting transistor.
a) Calculate the D.C operating point of each transistor (Ic,
Vce) [4 Marks]
b) What is the relation between vi1 and vi2 for pure
differential mode inputs [1 Mark]
c) Calculate the differential mode gain if the output is taken
from vc1, vc2, or the differential output (vc1-vc2) [5
Marks]
d) What is the relation between vi1 and vi2 for pure common
mode inputs [1 Mark]
e) Calculate the common mode gain if the output is taken
from vc1, vc2, or the differential output (vc1-vc2) [5
Marks]
f) What is the CMRR [2 Marks]
g) If vi1=5 mV, and vi2 =1mV. Calculate the output small
signals vc1, and vc2 [2 Marks]

KFUPM

EE 203 Third Major Exam

Winter 2004(032)

Name:

Page 8 of 9

FOURMULA SHEET
NMOS Transistors

iG = i B = 0

i D = i S = i DS
VTN = VT 0 +
K n = n COX

2 * f + v SB 2 * f

W
L

vGS VTN

i DS = 0

Cutoff

vGS VTN

v2
i DS = K n (vGS VT N )v SD SD
2

K
2
i DS = (vGS VTN ) (1 + v DS )
2

Linear

v DS (vGS VTN )
vGS VTN

v DS (vGS VTN )

Saturation

PMOS Transistors

iG = i B = 0

i D = i S = i SD
VTP = VT 0

K p = p C OX

W
L

2 * f + v BS 2 * f

v SG VTP

i SD = 0

v SG VTP

v 2 Linear
iSD = K p (vSG VTP )vSD SD
2

Saturation
Kp
(vSG VTP )2 (1 + vSD )
iSD =
2

v SD (v SG VTP
vGS VTP

v DS (v SG VTP

)
)

Cutoff

Small Signal Model

g m = 2K n I D =

2I D
VGS VTN

ro =

V A + VDS V A
1

=
ID
I D I D

Valid for

v gs 0.2(V GS VT )

KFUPM
Name:

EE 203 Third Major Exam

Winter 2004(032)
Page 9 of 9

Bipolar Junction Transistors

i C = I S e v BE / VT
=

+1

Small Signal Model

gm = VICT
r = gm = VITB = (1+ )re
re = g1m = gm
ro = VICA
The equation: x2+48x-99=0 has two solution at x=1.98 and x=-49.98
The equation: x2+1.64x-20.82=0 has two solution at x=3.82 and x=-5.46
The equation: ( x 1 0.5( 6.6 x 0.6) ) 2 + 3.64 x 21.82 = 0 has a solution at x=4.06
The equation: x3-15x2+41.3x-30.8=0 has three solution at x=1.34, 1.97 and 11.69