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MIC5800/5801

Micrel

MIC5800/5801
4/8-Bit Parallel-Input Latched Drivers

General Description

Features

The MIC5800/5801 latched drivers are high-voltage, highcurrent integrated circuits comprised of four or eight CMOS
data latches, a bipolar Darlington transistor driver for each
latch, and CMOS control circuitry for the common CLEAR,
STROBE, and OUTPUT ENABLE functions.
The bipolar/MOS combination provides an extremely lowpower latch with maximum interface flexibility. MIC5800
contains four latched drivers; MIC5801 contains eight latched
drivers.
Data input rates are greatly improved in these devices. With
a 5V supply, they will typically operate at better than 5MHz.
With a 12V supply, significantly higher speeds are
obtained.The CMOS inputs are compatible with standard
CMOS, PMOS, and NMOS circuits. TTL or DTL circuits may
require the use of appropriate pull-up resistors. The bipolar
outputs are suitable for use with relays, solenoids, stepping
motors, LED or incandescent displays, and other high-power
loads.Both units have open-collector outputs and integral
diodes for inductive load transient suppression. The output
transistors are capable of sinking 500mA and will sustain at
least 50V in the OFF state. Because of limitations on package
power dissipation, the simultaneous operation of all drivers at
maximum rated current can only be accomplished by a
reduction in duty cycle. Outputs may be paralleled for higher
load current capability.

4.4MHz Minimum Data Input Rate


High-Voltage, Current Sink Outputs
Output Transient Protection
CMOS, PMOS, NMOS, and TTL Compatible Inputs
Internal Pull-Down Resistors
Low-Power CMOS Latches

Ordering Information
Part Number
MIC5800BN
MIC5800BM
MIC5801BN
5962-8764001WA1
MIC5801BV
MIC5801BWM
1

Temperature Range

Package

40C to + 85C
40C to + 85C
40C to +85C
55C to +125C
40C to + 85C
40C to +85C

14Pin Plastic DIP


14Pin SOIC
22Pin Plastic DIP
22Pin CERDIP
28Pin PLCC
24Pin SOIC

Standard Military Drawing number for MIC5801AJBQ

Functional Diagram
VDD

INn

COMMON

OUTn

STROBE

GND
CLEAR

OUTPUT
ENABLE

October 1998

COMMON MOS
CONTROL

TYPICAL MOS
LATCH

7-11

TYPICAL BIPOLAR
DRIVER

MIC5800/5801

Micrel

Typical Input

Absolute Maximum Ratings: (Notes 16)


at +25C Free-Air Temperature

V DD

IN

Output Voltage, VCE


Supply Voltage, VDD
Input Voltage Range, VIN
Continuous Collector Current, IC
Package Power Dissipation:
MIC5800 Plastic DIP (Note 1)
MIC5801 Plastic DIP (Note 2)
MIC5800 SOIC (Note 3)
MIC5801 PLCC (Note 4)
MIC5801 CERDIP (Note 5)
Operating Temperature Range, TA
Storage Temperature Range, TS
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:

50V
15V
0.3V to VDD + 0.3V
500mA
2.1W
2.5W
1.0W
2.25W
3.1W
40C to +85C
65C to +125C

Derate at 16.7 mW/C above TA = +25C


Derate at 20 mW/C above TA = +25C
Derate at 8.5 mW/C above TA = +25C
Derate at 18.2 mW/C above TA = +25C
Derate at 25 mW/C above TA = +25C
Micrel CMOS devices have input-static protection but are
susceptible to damage when exposed to extremely high static
electrical charges.

Pin Configuration

14 OE

STROBE

13 VDD

IN1

12 OUT1

IN2

IN3

IN4

GND

LATCHES

CLEAR

11 OUT2
10 OUT3
9 OUT4
8 COM

MIC5800BN, BM

CLEAR

22 OE

STROBE

21 VDD

IN1

20 OUT1

19 OUT2

IN3

18 OUT3

IN4

IN5

IN6

15 OUT6

IN7

14 OUT7

IN8 10

13 OUT8

GND 11

LATCHES

IN2

OE

24 VDD

CLEAR

23 NC

STROBE

22 OUT1

IN1

21 OUT2

IN2

20 OUT3

IN3

19 OUT4

IN4

18 OUT5

IN5

17 OUT6

IN6

16 OUT7

IN7 10

15 OUT8

IN8 11

14 NC

GND 12

13 COM

MIC5801BWM

17 OUT4
16 OUT5

12 COM

MIC5801BN, AJBQ

7-12

October 1998

MIC5800/5801

Micrel

NC

CLEAR

OE

28 27 26

NC

STROBE

VDD

NC

Pin Configurations (continued)

IN1 5

25 OUT1
24 OUT2
23 OUT3

LATCHES

IN2 6
IN3 7
IN4 8
IN5 9

22 OUT4
21 OUT5

IN6 10

20 OUT6

IN7 11

19 OUT7

OUT8

NC

COM

NC

GND

NC

IN8

12 13 14 15 16 17 18

MIC5801BV

Allowable Output Current As A Function of Duty Cycle

450
400

1
2

350

300
4

250
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

200
150
100

10

20

30

40

50

60

70

80

90

100

PERCENT DUTY CYCLE

October 1998

MIC5801BN, AJBQ
ALLOWABLE COLLECTOR CURRENT IN mA AT 50C

ALLOWABLE COLLECTOR CURRENT IN mA AT 50C

MIC5800BN, BM
450
400

1 or 2

350

3
4

300

5
6

250

7
8

200
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

150
100

10

20

30

40

50

60

70

PERCENT DUTY CYCLE

7-13

80

90

100

MIC5800/5801

Micrel

Electrical Characteristics: at TA = +25C, VDD = 5V (unless otherwise noted)


Limits
Characteristic

Symbol

Test Conditions

Output Leakage Current

ICEX

VCE = 50 V, TA = +25C

50

VCE = 50 V, TA = +70C

100

Collector-Emitter

VCE(SAT)

Max. Units

0.9

Input Resistance

IC = 200 mA

1.1

1.3

IC = 350 mA, VDD = 7.0 V

1.3

1.6

Clamp Diode

VDD = 12 V

10.5

VDD = 10 V

8.5

VDD = 5.0 V (See Note)

3.5

VDD = 12 V

50

200

VDD = 10 V

50

300

VDD = 5.0 V

50

600

VDD = 12 V, Outputs Open

1.0

2.0

(Each

VDD = 10 V, Outputs Open

0.9

1.7

Stage)

VDD = 5.0 V, Outputs Open

0.7

1.0

IDD(OFF)

VDD = 12 V, Outputs Open, Inputs = 0 V

(Total)

VDD = 5.0 V, Outputs Open, Inputs = 0 V

IR

VR = 50 V, TA = +25C

50

VR = 50 V, TA = +70C

100

VF

200
50

IF = 350 mA

IDD(ON)

Leakage Current
Clamp Diode Forward Voltage

1.0

RIN

Supply Current

1.1

VIN(0)
VIN(1)

NOTE :

Typ.

IC = 100 mA

Saturation Voltage
Input Voltage

Min.

mA

100

1.7

2.0

Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic 1.

CLEAR
F
STROBE

OUTPUT
ENABLE

INN
D

OUT N

Timing Conditions
(Logic Levels are VDD and Ground)
A. Minimum data active time before strobe enabled (data set-up time) ....................................................................... 50ns
B. Minimum data active time after strobe disabled (data hold time) ............................................................................. 50ns
C. Minimum strobe pulse width ................................................................................................................................... 125ns
D. Typical time between strobe activation and output on to off transition ................................................................... 500ns
E. Typical time between strobe activation and output off to on transition ................................................................... 500ns
F. Minimum clear pulse width ..................................................................................................................................... 300ns
G. Minimum data pulse width ...................................................................................................................................... 225ns

7-14

October 1998

MIC5800/5801

Micrel

Truth Table

Information present at an input is transferred to its latch when


the STROBE is high. A high CLEAR input will set all latches
to the output OFF condition regardless of the data or
STROBE input levels. A high OUTPUT ENABLE will set all
outputs to the off condition, regardless of any other input
conditions. When the OUTPUT ENABLE is low, the outputs
depend on the state of their respective latches.

Output

OUTN

INN

Strobe

Clear

Enable

t-1

OFF

ON

OFF

OFF

ON

ON

OFF

OFF

X = Irrelevant
t-1 = previous output state
t = present output state

Typical Application
Unipolar Stepper-Motor Drive
+30V

OUTPUT ENABLE
0.1F

STROBE
IN1

IN2
IN3
IN4

14

13

12

VDD

4
5

LATCHES

CLEAR

OUT1
OUT2

11

OUT3

10

STEPPER
MOTOR

OUT4
0.1F

+30V

MIC5800

UNIPOLAR WAVE DRIVE

UNIPOLAR 2-PHASE DRIVE

STROBE

STROBE

IN 1

IN 1

IN 2

IN 2

IN 3

IN 3

IN 4

IN 4

OUT 1

OUT 1

OUT 2

OUT 2

OUT 3

OUT 3

OUT 4

OUT 4

October 1998

7-15

MIC5800/5801

Micrel

Typical Applications, Continued

+12V

+5V

0.1

22
+

22

STROBE

21

INPUT 1

20

INPUT 2

19

INPUT 3

18

INPUT 4

INPUT 5

INPUT 6

15

INPUT 7

14

INPUT 8

10

13

11

12

K1
K2

LATCHES

K3
K4
17
K5
16
K6
K7
K8

Relays: Guardian Electric 1725-1C-12D

MIC5801 Relay Driver

+5V

0.1

14

13

INPUT 1

12

INPUT 2

INPUT 3

INPUT 4

LATCHES

+24V

+
22

Note:
11
10

Lamp inrush current


is approximately 10
lamp operating current.

MIC5800 Incandescent/Halogen Lamp Driver

7-16

October 1998

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