VND830SP

DOUBLE CHANNEL HIGH SIDE DRIVER

TYPE
VND830SP

RDS(on)
60 m (*)

IOUT
6 A (*)

VCC
36 V

(*) Per each channel

CMOS COMPATIBLE INPUTS

OPEN DRAIN STATUS OUTPUTS
ON STATE OPEN LOAD DETECTION
OFF STATE OPEN LOAD DETECTION
SHORTED LOAD PROTECTION
UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
LOSS OF GROUND PROTECTION
VERY LOW STAND-BY CURRENT

REVERSE BATTERY PROTECTION (**)

n
n
n
n
n
n

10

PowerSO-10

DESCRIPTION
The VND830SP is a monolithic device made by
using
STMicroelectronics
VIPower
M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient

compatibility table). Active current limitation

combined with thermal shutdown and automatic
restart protects the device against overload. The
device detects open load condition both in on and
off state. Output shorted to VCC is detected in the
off state. Device automatically turns off in case of
ground pin disconnection.

BLOCK DIAGRAM
VCC

VCC
CLAMP

OVERVOLTAGE
UNDERVOLTAGE

GND

CLAMP 1
OUTPUT1

INPUT1

DRIVER 1
CLAMP 2

STATUS1
CURRENT LIMITER 1
LOGIC

DRIVER 2
OUTPUT2

OVERTEMP. 1
OPENLOAD ON 1
CURRENT LIMITER 2
INPUT2
OPENLOAD OFF 1

OPENLOAD ON 2

STATUS2
OPENLOAD OFF 2
OVERTEMP. 2

(**) See application schematic at page 8

May 2002

1/18

VND830SP
ABSOLUTE MAXIMUM RATING
Symbol
VCC
- V CC
- IGND
IOUT
- IOUT
IIN
ISTAT

VESD

EMAX
Ptot
Tj
Tc
Tstg

Parameter
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
DC Status Current
Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF)

Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
+/- 10

Unit
V
V
mA
A
A
mA
mA

- INPUT
- STATUS
- OUTPUT

4000
4000
5000

V
V
V

- VCC
Maximum Switching Energy
(L=1.8mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A)
Power Dissipation TC=25C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature

5000

100

mJ

74
Internally Limited
- 40 to 150
- 55 to 150

W
C
C
C

CONNECTION DIAGRAM (TOP VIEW)

OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2

5
4
3

6
7
8
9
10

GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2

2
1
11

VCC

CURRENT AND VOLTAGE CONVENTIONS

ICC
IIN1

V CC

V CC

INPUT 1
ISTAT1

V IN1

STATUS 1
V STAT1

IOUT1

IIN2
OUTPUT 1

INPUT 2
V IN2 ISTAT2

IOUT2
STATUS 2

VSTAT2

GND

OUTPUT 2
V OUT2
IGND

2/18

V OUT1

VND830SP
THERMAL DATA
Symbol
Rthj-case

Parameter
Thermal Resistance Junction-case

Value
1.7

Unit
C/W

Rthj-amb

Thermal Resistance Junction-ambient

52 (*)

C/W

(*) When mounted on a standard single-sided FR-4 board with 50mm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air
flow.

ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40C< Tj <150C, unless otherwise specified)

(Per each channel)
POWER OUTPUT
Symbol
VCC (**)
VUSD (**)
VOV (**)
RON

Parameter
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
On State Resistance

IS (**)

Supply Current

IL(off1)
IL(off2)
IL(off3)
IL(off4)

Off State Output Current

Off State Output Current
Off State Output Current
Off State Output Current

Test Conditions

Min
5.5
3
36

Typ
13
4

Max
36
5.5

Off State; VCC=13V; VIN=VOUT =0V

12

60
120
40

Unit
V
V
V
m
m
A

Off State; VCC=13V; Tj =25C;

VIN=VOUT=0V
On State; VCC=13V

12
5

25
7
50
0
5
3

A
mA
A
A
A
A

Typ

Max

Unit

IOUT =2A; Tj=25C

IOUT =2A; VCC> 8V

VIN=V OUT=0V; VCC=36V; Tj=125C

VIN=0V; VOUT=3.5V
VIN=V OUT=0V; Vcc=13V; Tj =125C
VIN=V OUT=0V; Vcc=13V; Tj =25C

0
-75

Test Conditions
RL=6.5 from VIN rising edge to
VOUT=1.3V
RL=6.5 from VIN falling edge to
VOUT=11.7V

Min

(**) Per device

SWITCHING (VCC =13V)

Symbol

Parameter

td(on)

Turn-on Delay Time

td(off)

Turn-off Delay Time

dVOUT/
dt(on)

Turn-on Voltage Slope

RL=6.5 from VOUT=1.3V to

VOUT=10.4V

dVOUT/
dt(off)

Turn-off Voltage Slope

RL=6.5 from VOUT=11.7V to

VOUT=1.3V

30

30

See
relative
diagram
See
relative
diagram

V/s

V/s

LOGIC INPUT
Symbol
VIL
IIL
VIH
IIH
VI(hyst)
VICL

Parameter
Input Low Level
Low Level Input Current
Input High Level
High Level Input Current
Input Hysteresis Voltage
Input Clamp Voltage

Test Conditions
VIN = 1.25V

Min

Typ

1
3.25

VIN = 3.25V
IIN = 1mA
IIN = -1mA

Max
1.25

10
0.5
6

6.8
-0.7

Unit
V
A
V
A
V
V
V

3/18

VND830SP
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol
VSTAT
ILSTAT
CSTAT
VSCL

Parameter
Test Conditions
Status Low Output Voltage ISTAT= 1.6 mA
Status Leakage Current
Normal Operation; VSTAT= 5V
Status Pin Input
Normal Operation; VSTAT= 5V
Capacitance
ISTAT= 1mA
Status Clamp Voltage
ISTAT= - 1mA

Min

Typ

6.8

Max
0.5
10

Unit
V
A

100

pF

-0.7

PROTECTIONS
Symbol
T TSD
TR
Thyst
tSDL

Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status Delay in Overload
Conditions

Ilim

Current limitation

Vdemag

Turn-off Output Clamp

Voltage

Test Conditions

Min
150
135
7

Typ
175

5.5V < VCC < 36V

IOUT =2A; L= 6mH

Unit
C
C
C

20

15

15

15

Tj>TTSD
VCC=13V

Max
200

VCC-41 VCC-48 VCC -55

OPENLOAD DETECTION
Symbol
IOL
tDOL(on)
VOL
TDOL(off)

Parameter
Openload ON State
Detection Threshold
Openload ON State

Test Conditions
VIN=5V

Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection Delay
at Turn Off

VIN=0V

Min

Typ

Max

Unit

50

100

200

mA

200

3.5

1000

IOUT =0A
1.5

OPEN LOAD STATUS TIMING (with external pull-up)

IOUT< IOL
VOUT > VOL
VINn

OVER TEMP STATUS TIMING

Tj > T TSD
VINn

VSTATn

VSTATn
tSDL
tDOL(off)

4/18

2.5

tDOL(on)

tSDL

VND830SP

Switching time Waveforms

VOUTn
90%
80%

dVOUT/dt(off)

dVOUT/dt(on)

10%
t
VINn

td(on)

td(off)

TRUTH TABLE
CONDITIONS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > VOL
Output Current < IOL

INPUT
L
H
L
H
H
L
H
L
H
L
H
L
H
L
H

OUTPUT
L
H
L
X
X
L
L
L
L
L
L
H
H
L
H

STATUS
H
H
H
(Tj < TTSD) H
(Tj > TTSD) L
H
L
X
X
H
H
L
H
H
L

5/18

VND830SP
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse

II

TEST LEVELS
III

IV

1
2
3a
3b
4
5

-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V

-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V

-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V

-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V

ISO T/R 7637/1

Test Pulse
1
2
3a
3b
4
5
CLASS
C
E

6/18

I
C
C
C
C
C
C

TEST LEVELS RESULTS

II
III
C
C
C
C
C
C
C
C
C
C
E
E

Delays and
Impedance
2 ms 10
0.2 ms 10
0.1 s 50
0.1 s 50
100 ms, 0.01
400 ms, 2

IV
C
C
C
C
C
E

CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be returned
to proper operation without replacing the device.

VND830SP
Figure 1: Waveforms

NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VUSDhyst

VCC
VUSD

INPUTn
OUTPUT VOLTAGEn
STATUSn

undefined

OVERVOLTAGE
VCC<VOV

VCC>V OV

VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN LOAD with external pull-up
INPUTn
VOUT>VOL

OUTPUT VOLTAGEn

VOL

STATUSn

OPEN LOAD without external pull-up

INPUTn
OUTPUT VOLTAGEn
STATUSn
OVERTEMPERATURE
Tj

TTSD
TR

INPUTn
OUTPUT CURRENTn
STATUSn

7/18

VND830SP
APPLICATION SCHEMATIC

+5V +5V
+5V
VCC
Rprot

STATUS1
Dld

Rprot

INPUT1
OUTPUT1

Rprot

STATUS2

Rprot

INPUT2

OUTPUT2

GND

VGND

GND PROTECTION
REVERSE BATTERY

NETWORK

AGAINST

Solution 1: Resistor in the ground line (RGND only). This

can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND 600mV / IS(on)max.
2) RGND (VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
devices datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary

RGND

DGND

depending on how many devices are ON in the case of

several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1k) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.

LOAD DUMP PROTECTION

Dld is necessary (Transil or MOV) if the load dump peak
voltage exceeds VCC max DC rating. The same applies if
the device will be subject to transients on the VCC line that
are greater than the ones shown in the ISO T/R 7637/1
table.

8/18

VND830SP
C I/Os PROTECTION:

supply the microprocessor.

The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<V Olmin.

If a ground protection network is used and negative

transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the C I/Os pins to latch-up.
The value of these resistors is a compromise between
the leakage current of C and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of C I/Os.
-VCCpeak /Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V
5k Rprot 65k.
Recommended Rprot value is 10k.

2) no misdetection when load is disconnected: in this

case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled
high (up to several mA), the pull-up resistor RPU should
be connected to a supply that is switched OFF when the
module is in standby.

OPEN LOAD DETECTION IN OFF STATE

Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to

The values of VOLmin, VOLmax and IL(off2) are available in

the Electrical Characteristics section.

Open Load detection in off state

V batt.

VPU

V CC
RPU
INPUT

DRIVER
+
LOGIC

IL(off2)

OUT
+
R
STATUS

VOL

RL

GROUND

9/18

VND830SP
High Level Input Current

Off State Output Current

Ii h (uA)

IL(off1) (uA)

2.5

4.5

2.25

Off state
Vcc=36V
Vin=Vout=0V

2
1.75

Vin=3.25V

4
3.5

1.5

1.25

2.5

0.75

1.5

0.5

0.25

0.5
0

0
-50

-25

25

50

75

100

125

150

-50

175

-25

25

50

75

100

125

150

175

Tc (C)

Tc (C)

Input Clamp Voltage

Status Leakage Current

Vicl (V)

Ilstat (uA)

0.05

7.8

Iin=1mA
7.6

0.04

7.4

Vstat=5V

7.2

0.03

7
6.8

0.02

6.6
6.4

0.01

6.2
6

0
-50

-25

25

50

75

100

125

150

-50

175

-25

25

Tc (C)

50

75

100

125

150

175

Tc (C)

Status Low Output Voltage

Status Clamp Voltage

Vstat (V)

Vscl (V)
8

0.8

7.8

0.7

Istat=1mA

Istat=1.6mA

7.6

0.6
7.4
0.5

7.2
7

0.4

6.8

0.3

6.6
0.2
6.4
0.1

6.2

6
-50

-25

25

50

75

Tc (C)

10/18

100

125

150

175

-50

-25

25

50

75

Tc (C)

100

125

150

175

VND830SP
On State Resistance Vs Tcase

On State Resistance Vs VCC

Ron (mOhm)

Ron (mOhm)

160

120

Tc=150C

110
140

Iout=2A
Vcc=8V; 13V & 36V

120

100
90
80

100
70
60

80

Tc=25C

50
60
40

Tc= - 40C

30

40

20
20

Iout=5A

10
0

0
-50

-25

25

50

75

100

125

150

175

10

15

20

Tc (C)

25

30

35

40

Vcc (V)

Openload On State Detection Threshold

Input High Level

Iol (mA)

Vih (V)

150

3.6

140

3.4

Vcc=13V
Vin=5V

130

3.2

120
3

110
100

2.8

90

2.6

80
2.4
70
2.2

60
50

2
-50

-25

25

50

75

100

125

150

175

-50

-25

25

Tc (C)

50

75

100

125

150

175

100

125

150

175

Tc (C)

Input Low Level

Input Hysteresis Voltage

Vil (V)

Vhyst (V)

2.6

1.5
1.4

2.4

1.3
2.2
1.2
2

1.1

1.8

1
0.9

1.6

0.8
1.4
0.7
1.2

0.6

0.5
-50

-25

25

50

75

Tc (C)

100

125

150

175

-50

-25

25

50

75

Tc (C)

11/18

VND830SP
Overvoltage Shutdown

Openload Off State Voltage Detection Threshold

Vov (V)

Vol (V)

50

48

4.5

46

44

3.5

Vin=0V

42

40

2.5

38

36

1.5

34

32

0.5

30

0
-50

-25

25

50

75

100

125

150

175

-50

-25

25

Tc (C)

dVout/dt(off) (V/ms)

800

600
550

Vcc=13V
Rl=6.5Ohm

125

150

175

100

125

150

175

Vcc=13V
Rl=6.5Ohm

500

500

450

400

400

300

350

200

300

100

250

200
-50

-25

25

50

75

100

125

150

175

Tc (C)

Ilim (A)
20
18

Vcc=13V
16
14
12
10
8
6
4
2
0
-50

-25

25

50

75

Tc (C)

-50

-25

25

50

75

Tc (C)

ILIM Vs Tcase

12/18

100

Turn-off Voltage Slope

dVout/dt(on) (V/ms)

600

75

Tc (C)

Turn-on Voltage Slope

700

50

100

125

150

175

VND830SP
Maximum turn off current versus load inductance

ILMAX (A)
10

A
B

1
0.1

L (mH )

10

100

A = Single Pulse at TJstart=150C

B= Repetitive pulse at TJstart=100C
C= Repetitive Pulse at TJstart=125C
Conditions:
VCC=13.5V
Values are generated with RL=0
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization

Demagnetization

Demagnetization

13/18

VND830SP

PowerSO-10 THERMAL DATA

PowerSO-10 PC Board

Layout condition of Rth and Z th measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).

Rthj-amb Vs PCB copper area in open box free air condition

PowerSO-10 RTH j-amb Vs. PCB copper area

RTH(C/W)

55
Tj-Tamb=50C

50
45
40
35
30
0

Cu area (cm^2)

14/18

10

VND830SP
Thermal Impedance Junction Ambient Single Pulse

ZTH (C/W)
1000

100
0.5 cm2
6 cm2

10

0.1
0.0001

0.001

0.01

0.1
1
Time (s)

Thermal fitting model of a double channel HSD

in PowerSO-10

10

100

1000

Pulse calculation formula

ZTH = R TH + ZTHtp ( 1 )
where

= tp T

Thermal Parameter
Tj_1

C1

C2

C3

C4

C5

C6

R1

R2

R3

R4

R5

R6

Pd1

Tj_2

C1

C2

R1

R2

Pd2

T_amb

Area/island (cm2)
R1 (C/W)
R2 (C/W)
R3( C/W)
R4 (C/W)
R5 (C/W)
R6 (C/W)
C1 (W.s/C)
C2 (W.s/C)
C3 (W.s/C)
C4 (W.s/C)
C5 (W.s/C)
C6 (W.s/C)

0.5
0.15
0.8
0.7
0.8
12
37
0.0006
2.10E-03
0.013
0.3
0.75
3

22

15/18

VND830SP

PowerSO-10 MECHANICAL DATA

mm.

DIM.

MIN.

A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
H (*)
h
L
L (*)

(*)

inch

TYP

3.35
3.4
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90

MAX.

MIN.

3.65
3.6
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30

0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232

1.35
1.40
14.40
14.35

0.049
0.047
0.543
0.545

1.80
1.10
8
8

0.047
0.031
0
2

1.27

TYP.

MAX.
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.295
0.240
0.248

0.050

1.25
1.20
13.80
13.85
0.50

0.053
0.055
0.567
0.565
0.002

1.20
0.80
0
2

0.070
0.043
8
8

(*) Muar only POA P013P

0.10 A B

10

E2

SEATING
PLANE
e

DETAIL A

0.25

E4

D
= D1 =
=
=
SEATING
PLANE

A
F

A1

A1

L
DETAIL A

P095A

16/18

11

VND830SP
PowerSO-10 SUGGESTED PAD LAYOUT

TUBE SHIPMENT (no suffix)

14.6-14.9

CASABLANCA

B
10.8- 11

MUAR

6.30
C

A
0.67-0.73
1

9.5

10
9

2
3

0.54-0.6

All dimensions are in mm.

8
7
6

4
5

1.27

Base Q.ty Bulk Q.ty Tube length ( 0.5) A

Casablanca
Muar

50
50

1000
1000

532
532

10.4 16.4
4.9 17.2

C ( 0.1)
0.8
0.8

TAPE AND REEL SHIPMENT (suffix 13TR)

REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
G (+ 2 / -0)
N (min)
T (max)

600
600
330
1.5
13
20.2
24.4
60
30.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing

W
P0 ( 0.1)
P
D ( 0.1/-0)
D1 (min)
F ( 0.05)
K (max)
P1 ( 0.1)

All dimensions are in mm.

24
4
24
1.5
1.5
11.5
6.5
2
End

Start
Top
cover
tape

No components

Components

No components

500mm min
Empty components pockets
saled with cover tape.

500mm min

User direction of feed

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VND830SP

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subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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18/18

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