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The
lights can be switched OFF and ON by either one of two switches, one in the hall and one in
the landing. The lights are to be OFF when both switches are either ON or OFF together, and
the lights are to be ON when one switch is ON and the other is OFF.
i) Obtain the truth table of the system
ii) Obtain the sum of products (SOP) Boolean expression for the system.
iii) Implement the system using AND, NOT and OR logic gates.
iv) Implement the system using exactly ONE logic gate.
2. A bank vault has 3 locks with a key for each lock. Key A is owned by the bank manager. KeyB
is owned by the senior bank teller. Key C is owned by the trainee bank teller. In order toopen
the vault door at least two people must insert their keys into the assigned locks at thesame
time. The trainee bank teller) can only open the vault when the bank manager is present in the
opening.
i) Determine the truth table for such a digital locking system
ii) Design, using Karnaugh Map techniques, a minimum ANDOR gate network to
realize this locking system.
3. A car seat belt interlock requires that the car should only start if the drivers seat belt is
fastened and either the front passenger seat is unoccupied or the front passenger seat is
occupied and the passenger seat belt is fastened.
i) Obtain the truth table of the system
ii) Obtain the SOP Boolean expression for the system.
iii) Use a Karnaugh map to simplify the SOP Boolean expression
iv) Implement the system using AND, NOT and OR logic gates.
4. Design a circuit that will indicate whether a 4bit number is either odd and greater than 8 or
even and less than 5. Assume decimal 0 to be an even number.
5.
i) Using meaningful signal names, write the Boolean function for the following design
specification. If either the drivers door or the passengers door of a two door car is opened, or
a switch on the dash is turned on, then the overhead light in the car will turn on else, the
overhead light will not turn on.
ii) Show a block diagram and label the signals on the diagram.
a.
6.
Given the following language statement: Design a switching circuit that has three independent
input signals. When only two inputs are 1 at the same time, the output is to be 1.
a. Obtain the truth table logic description
b. Obtain the standard SOP form of the function
c. Obtain the complement of the standard POS form of the function
7. For the following language statement: Design a switching circuit that has three independent
inputs and two outputs. One of the outputs should be 1 when all the inputs are 1, and the other
output should be 0 when two or less of the inputs are 0.
a. Write the truth table logic description.
b. Write the standard SOP form of each function.
c. Write the complement of the standard POS form of each function.
8. Write the Boolean function for the following logic statement: If task A is active or task B is not
active and task C is active and task D in not active or task E is active than F = 1 else F = 0.
9.
Obtain minimum SOP expressions and minimum POS expressions for the following Boolean
functions using Karnaugh maps. Implement using universal gates
a. F(A, B, C) = M (2, 3) d(4, 6)
b. F(A, B, C) = m(4, 6) + d(0, 1, 2)
c. F(A, B, C) = M(1, 2, 3, 5, 6) d(4)
10. A simple security system for two doors consists of a card reader and a keypad.
A person may open a particular door if he or she has a card containing the
corresponding code, and enters an authorized keypad code for that card.
No card inserted
Valid code for door 1
Valid code for door 2
A
0
0
1
B
0
1
1
Implement the following function using only NOR gates F = a(b + cd) + bc
b) Implement the following function using only NAD gates G = (a + b) . (cd + e)
c) Give the minimum twolevel SOP realization of the following switching function using only
NAND gates F = m(0, 3, 4, 5, 7)
13. Using the tabular method, obtain the minimal expression for
f = m(6, 7, 8, 9) + d (10, 11, 12, 13, 14, 15) implement using NAND
Find the minimal expression for f = M(2, 3, 8, 12, 13) . (d(10, 14). Implement using NOR
14.
5 locks v, w, y and z all of which must be unlocked for the safe to open. The keys to
the locks are distributed among five executives in the following manner.
Mr. A has keys for locks v and x.
Mr. B has keys for locks v and y.
Mr. C has keys for locks w and y.
Mr. D has keys for locks x and z.
Mr. E has keys for locks v and z.
a) Determine the minimal number of executives required to open the safe.
b) Find all the combinations of executives that can open the safe write and expression f(A, B,
C, D, E) which specifies when the safe can be opened as a function of what executives are
present.
c) Who is the essential executive?
23. You
are presented with a set of requirements under which an insurance policy can be issued.
The applicant must be
1. a married female 25 years old or over, or
2. a female under 25, or
3. a married male under 25 who has not been involved in a car accident, or
4. a married male who has been involved in a car accident, or
5. a married male 25 years of over who has not been involved in a car accident.
Find an algebraic expression which assumes a value 1 whenever the policy is issued. Simplify
the expression obtained.
24. Five soldiers A, B, C, D and E volunteer to perform an important military task if their
following conditions are satisfied.
1. Either A or B or both must go.
2. Either C or E but not both must go.
3. Either both A and C go or neither goes.
4. If D goes, then E must also go.
5. If B goes, then A and C must also go.
Define the variables A, B, C, D and E so that an unprimed variable will mean that the
corresponding soldier has been selected to go. Determine the expression which specifies the
combinations of volunteers who can get the assignment.
25. A lawnsprinkling system is controlled automatically by certain combinations of the following
variables.
Seasons (S = 1, if summer 0, otherwise)
Moisture content of soil (M = 1, if high 0, if low)
Outside temperature (T = 1, if high 0, if low)
Outside humidity (H = 1, if high 0, if low)
The sprinkler is turned on under any of the following circumstances.
1. The moisture content is low in winter.
2. The temperature is high and the moisture content is low in summer.
3. The temperature is high and humidity is high in summer.
4. The temperature is low and the moisture content is low in summer.
27. Construct 16x1 multiplexer using two (8x1) and one (2x1) multiplexers. (use block diagram
for each multiplexer
28. Design a priority encoder with four active high inputs Z0, Z1, Z2, and Z3 and three active high
outputs, A and B indicating the number of the highest priority device requesting service, and N,
indicating no active request. Input Z0 is the highest priority (and Z3 the lowest).
29. Construct the truth table of an octaltobinary priority encoder. Provide an output V to indicate
that at least one of the inputs is present. The input with the highest subscript number has the
highest priority. From the truth table, construct a logic circuit for the priority encoder.
30. A majority circuit is a combinational circuit that outputs 1 when the input variables have more
1s than 0s, and vice versa. Design a 5input majority circuit, by identifying a truth table, and a
Boolean equation.
31. Design a combinational circuit with three inputs, x, y, z, and three outputs, A, B, C. When the
binary input is 4, 5, 6, or 7, the binary output is 2 less than the binary input. When the binary
input is 0, 1, 2, or 3, the output is 4 more than the binary input.
32. Design a fourbit combinational circuit 2s complement. (The output generates the 2s
complement of the input binary number.) Show that the circuit can be constructed with XOR
gates. How will you design a 5bit 2s complement?
33. Construct a 5to32 line decoder with four 3to8 line decoders (with enable) and a 2to4 line
decoder. Use block diagrams for the different components.
34. Construct a BCD addersubtractor circuit. Use block diagrams for the different components.
35. Assume that every XOR gate has a propagation delay of 10 ps, and every AND or OR gate has
a propagation delay of 5 ps. Draw a block diagram of a 16bit carrylookahead type adder.
How much time does the adder require to do one addition? Draw a block diagram of a 16bit
ripplecarry adder. How much time does the ripplecarry adder take to complete one addition?
36.
Using Kmap, find the simplest SOP expression for the following functions. List out all
alternative answers, if any. How many prime implicants (PIs) and essential prime implicants
(EPIs) are there in each of the expressions? [ ()d and ()D denote dontcares. ] implement
using decoder
(a) F1(A,B,C,D) = (5,m 8, 10, 12, 13, 14)
(b) F2(W,X,Y,Z) = (0,M 1, 2, 8, 9, 10)
(c) F3(K,L,M,N) = (1,m 7, 10, 13, 14) + (0,d 5, 8, 15)
(d) F4(A,B,C,D) = (4,M 8, 9, 11, 12) . (2,D 3, 6, 7, 10, 14)
37.
Design a logic circuit that takes in a 4bit excess3 code ABCD that represents a decimal digit,
and generates 1 in its output G if the code represents a prime number, or 0 otherwise.
(Questions to settle before you can proceed: What are prime numbers? How to handle invalid
excess3 codes?) You are to show the truth table. Obtain the simplified SOP expression for G
and draw the logic diagram using only the fewest 2input and 3input NAND gates.
38.
Combinational Circuit Design with Multiplexers The input to a digital circuit are three signals
A,Band C(Note that ,ABand Care NOT available). Logic 1 and 0 are available (e.g.,as VCC and
GND).The output of the circuit is given to be f=AB +AB C.Implement the circuit using only
TWO 2: 1 Multiplexer Modules of the form shown in Figure 2(b) do not use any other
hardware. sisthe select line. Data lines 0Dand 1Dare selected (i.e. ,made the output Y)when s
=0 and 1, respectively.
39.
A house has two lights to illuminate the stairs leading from the hall to the upstairs landing. The
lights can be switched OFF and ON by either one of two switches, one in the hall and one in
the landing. The lights are to be OFF when both switches are either ON or OFF together, and
the lights are to be ON when one switch is ON and the other is OFF.
i) Obtain the truth table of the system
ii) Obtain the sum of products (SOP) Boolean expression for the system.
iii) Implement the system using AND, NOT and OR logic gates.
iv) Implement the system using exactly ONE logic gate.
40. A bank vault has 3 locks with a key for each lock. Key A is owned by the bank manager. Key B
is owned by the senior bank teller. Key C is owned by the trainee bank teller. In order to open
the vault door at least two people must insert their keys into the assigned locks at the same
time. The trainee bank teller) can only open the vault when the bank manager is present in the
opening.
i) Determine the truth table for such a digital locking system
ii) Design, using Karnaugh Map techniques, a minimum ANDOR gate network to realise
this locking system.
41. A car seat belt interlock requires that the car should only start if the drivers seat belt is
fastened and either the front passenger seat is unoccupied or the front passenger seat is
occupied and the passenger seat belt is fastened.
i) Obtain the truth table of the system
ii) Obtain the SOP Boolean expression for the system.
iii) Use a Karnaugh map to simplify the SOP Boolean expression
iv) Implement the system using AND, NOT and OR logic gates.
42. Design
a circuit that will indicate whether a 4bit number is either odd and greater than 8 or
even and less than 5. Assume decimal 0 to be an even number.
45. Design
TRANSISTOR TESTER
60.
resistor. Gate "C"detects the charge on the 100u and turns on the BC547 transistor via the 4k7
resistor. The 100u and 4M7 provide the 510 minutes timer for the "wailing."
The 100u and 2M2 provide the timer provide the timer for the buzzer when you enter. It will buzz for 20
seconds then turn off. If the Entry door is left open, the main siren will wail after 45 seconds.
Design a 4bit shift register with parallel load using Dflipflops. These are two control
61. inputs: shift and
load. When shift = 1, the content of the register is shifted by one position. New
data is transferred into
the register when load = 1 and shift = 0. If both control inputs are equal to 0, the
content of the
register dose not change.
62. Draw the logic diagram of a 4bit register with four D flipflops and 4 1 mutiplexers with mode
selection input sand s.The register operates according to the following function table:
s
Register Operation
10
s
1
0
0
1
0
1
0
No Change
Complement the four Output
Clear register to 0 (Synch)