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Digital Engineering

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Amil Ahmad Ilham
http://www.unhas.ac.id/amil

Materi Kuliah
Bahan I (Sampai MID Test)

SAP I
Dapat didownload di http://www.unhas.ac.id/amil/S1TE/2015_2/TD/

Bahan II (Setelah MID Test)

Akan disampaikan oleh Ibu Dr. A. Ejah Umaraeni S.

Rules!
Please be aware that:

No mark (zero) for late assignments without prior


permission or urgent reasons.
No mark (zero) for cheated assignments or exams.
No talks via mobile phone during class.
Silent mode is OK
You can leave class if you have an urgent call.

No FB, Twitter, SMS, etc, during class.


No smoking!
Snack/candy is OK during class.

Penilaian
Mid Test (wajib diikuti)

Total Nilai = 0, jika Mid Test tidak diikuti.

Quiz (kapan saja)


Tugas (Individu/Kelompok)

Perbaikan Nilai
Tidak ada (waktu) perbaikan nilai.
Ujian susulan hanya akan diberikan jika berhalangan hadir pada saat
ujian karena:
Sakit atau alasan pribadi lain yang dapat diterima.
Ada pemberitahuan pada saat ujian atau sebelum ujian

Contact Info
HP: 0853-9883-1853 (SMS and URGENT CALL ONLY)
Email: amil_ai@yahoo.com

Logic gates
Logic gates

Basic Logic Gates

Simple Switch Circuit


Switch open:

No current through circuit


Light is off
Vout is +2.9V

Switch closed:

Switch-based circuits can easily represent two states:


on/off, open/closed, voltage/no voltage.

Short circuit across switch


Current flows
Light is on
Vout is 0V

N-type MOS Transistor


MOS = Metal Oxide Semiconductor
two types: N-type and P-type

N-type

when Gate has positive voltage,


short circuit between #1 and #2
(switch closed)
when Gate has zero voltage,
open circuit between #1 and #2
(switch open)

Terminal #2 must be
connected to GND (0V).

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P-type MOS Transistor


P-type is complementary to N-type
when Gate has positive voltage,
open circuit between #1 and #2
(switch open)
when Gate has zero voltage,
short circuit between #1 and #2
(switch closed)

Terminal #1 must be
connected to +2.9V.

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CMOS Circuit
Complementary MOS
Uses both N-type and P-type MOS transistors
P-type

Attached to + voltage

N-type

Attached to GND

For all inputs, make sure that output is either connected to GND or to +,
but not both!

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Inverter (NOT Gate)

Truth table

In

Out

0 V 2.9 V
2.9 V

0V

In

Out

0
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NOR Gate

Note: Serial structure on top, parallel on bottom.

0
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OR Gate

Add inverter to NOR.

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Decoder

n inputs, 2n outputs

exactly one output is 1 for each possible input pattern

2-bit
decoder
Note the use of the
bubbles (NOT) in the
input.

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Multiplexer (MUX)

n-bit selector and 2n inputs, one output

output equals one of the inputs, depending on selector

4-to-1 MUX
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Full Adder

Add two bits and carry-in,


produce one-bit sum and carry-out.

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Four-bit Adder

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