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tions (3 /im and 5 /im) and three electrode widths (1 /im, 2 /im
and 3 fitn), the device areas were adjusted to obtain the target
capacitance values. A typical frequency response is depicted in
out
'dd
rfC
'int
M,M,
4&
Fig. 1
a Commonly used Schmitt trigger circuit
b New Schmitt trigger circuit
'out
1+ m
(1)
with
l(kp(W/L)l\
References
1
2
3
Vol. 22
where l^n, ^ p are the threshold voltages and kn, kp are the
transconductance parameters of the NMOS and PMOS transistors, respectively. If the first inverter is switching, the second
inverter (M 4 , M 5 ) will be switching as well. It means that M 3
No. 4
203
(2)
2(1 + m)
with
kn(W/L)3\
n =
UW/QlJ
5/7
5/18
5/40
5/7
5/18
-2
Fig. 4 Measured transfer curve of designed Schmitt trigger
No. 4
References
= l - ( l - p)n
(3)
0 3
0-2
classical scheme
Sastry's scheme
proposed scheme
0 1
10-2
[26i7T]
10'
0-8
06
'j,m ~
U-D,m
+ W'j.m
1 <m<n
(1)
if zL m < 0
0-4
Vol. 22
10-2
classical scheme
Sastry's scheme
proposed scheme
Pb
10-1
""
1261/21
No. 4
205