Key ASIC Company

Overview
2012

Key ASIC Corporate Profile

Founded in 2005
Profitable since 2006
Listed in 2008 on Mainboard Bursa Malaysia
Offices:
R&D: Malaysia, Taiwan
Sales: Taiwan, Singapore, Japan, United States

Shareholders:
Khazanah
Macronix

Core Business:
Turn-key ASIC design and production outsourcing, OEM and ODM
Customer Specific System Product (CSSP). Customer spec. into
chip

Acquired Gateway Silicon Taiwan, October 2009

Key ASIC, Inc. Copyright 2012
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Value Proposition
For fabless semiconductor companies, requiring SoCs
targeting video, imaging, wireless and multi-media
applications, Key ASIC uniquely provides:

Expert engineering and foundry support

IP and Design services
Manufacturing services
Access to the best foundry for the target application

Key ASIC provides the experts to manage design, operations,

testing, packaging and yield control
From specification to finished product, Key ASIC can help to
increase your design capabilities, improve your process and
reduce your costs

Key ASIC, Inc. Copyright 2012

Proprietary and Confidential

Key ASICs Strengths

Strong engineering team with multi-media and consumer

domain knowledge

Experience in CPU, Graphic, DSP and advanced SoC chip

design

Unique optimization technology and expertise implementing

designs to higher performance, lower power and smaller die
size than standard implementations

Experienced analog circuit design team to develop and verify

complex analog blocks required by mixed-signal applications

Worldwide customer base and customer successes.

Key ASIC, Inc. Copyright 2012
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Business Focus
Video, Imaging, Multi-Media, Wireless
CSSP (ODM for ASIC)
Provide complete design and production outsourcing of SoC/ASIC from
customers specifications
Customize solutions based on existing products or platforms

ASIC Design / Production (OEM)

Complete design implementation and production based on customers
RTL or netlist
Provide design optimization to achieve higher performance, lower power
and/or smaller die size

Foundry Design Enablement - Retargeting

Develop, port and verify the IP on silicon
Develop design flow based on process technologies
Calibrate the design flow from IP to Silicon
Key ASIC, Inc. Copyright 2012
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Key ASIC Core Competency

Design Optimization
In-house technologies to optimize designs beyond
standard design tools, in order to achieve design goals:
Performance
Power
Die Size

Typical Improvement of 10-30%

Key ASIC, Inc. Copyright 2012

Proprietary and Confidential

KeyPlatform for SOC

Consumer Electronics (Multimedia)

Communication

PMP/Portable Games
MP3/Digital Audio Players
Digital Imaging/Vide
DVD Player/Recorder
STB/DTV/HDTV
Digital Media Broadcast

ADSL/VDSL
Wireless LAN
VoIP
Mobile
Home Networking

Interfaces
LVDS TX/RX w Controller 10-bit 165MHz
LVDS WUXGA Receiver & Controller
USB2.0 Host/Device/PHY
USB2.0 OTG
Ethernet 10/100PHY
PECL
SSTL-18
HSTL III
PCI-X
P-ATA
CE-ATA
Cardbus
Inline Staggered - CUP I/Os

Interface
DDR/SDR

DAC
ADC

CPU

Audio/Voice Codec

DSP

AFE

CPU
ARM
MIPS
Power PC

Voice Codec 14-bit ADC, 16-bit DAC 48 KHz

Audio Codec 16/18/24-bit Sigma Delta
Key ASIC, Inc. Copyright 2012
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ADC/DAC/AFE
6 bit slow ADC
2 Channel 60MHz ADC
2 Channel 60MHz DAC
DC-DC Converter
Voltage Regulator
12 bit 100 MHz ADC
3 Ch 8 Bit 170MHz ADC+AFE
3 Ch 10 Bit 150MHz ADC + AFE
3 Ch 12 Bit 108MHz DAC
3 Ch 10 Bit 115 MSPS DAC
12 Bit 100MHz DAC
10 Bit 200 MHz DAC
10 Bit 200 MHz DAC
6 Bit PGA 46 MHz
Bandgap Reference
Power On Reset
Analog Mux
RTC
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Design Flow & Function

RTL Coverage

NC Verilog

VCS

RTL Analysis

Leda

Dynamic Sim

NC Verilog

VCS

Logic Synthesis

RTL Compiler

Design Compiler

STA Signoff Tool

ETS

Prime-Time (SI)

Floor Planner

SOC Encounter

Astro

AP&R Related

SOC Encounter

Astro, Astro-Talk,
Prime-Rail, MVDD

RC Extractor
SI, Delay Calculator

Star RC-XT
CelticIC, Celtic-NDC (ETS)

Power Analysis
Formal Verification

nLint

XRC

Prime-Time (SI)
Prime-Power

Encounter-Conformal

DFT/MBIST/BSD

DFT Compiler,
MBIST,BSD

Layout Editor

Virtuoso-XL

Low Power Solution

Conformal-Low Power

Memory
Architecture
Laker

DRC/ERC/LVS Signoff

Calibre
Key ASIC, Inc. Copyright 2012
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One-Stop Solution Production Management

Product Engineering (NPI)
Develop DFM/DFT/test plan specification
Manage product qualification project
Perform product characterization
Transfer design to wafer fabrication foundry
Manage product definition for system /BOM
Address customer issues
Manage product yield /quality and cost

Production Planning /Control

Manage manufacturing planning system
Implement capacity planning process
Forecast/ build plan /pack out/ ship
Manage backlog
Track and control inventory

Test Engineering / QA
Manage test H/W & S/W project
Transfer product to test site
Dispose suspected material in test
Implement long term QA program
Manage document control
Address customer issues

Packaging Engineering
Manage design rules
Design & develop packaging
Package outline design, substrate design
Bonding diagram and BOM
Define package/ marking /packing specification
Improve package ,yield, cost and reliability
Dispose suspected materials in assembly

Testing Development Activity

Test hardware / software development
Manage reliability in board fabrication
Manage reliability test activities

Overall Production Activity

Wafer fabrication
Assembly operation
Test / visual/ packing/ shipping operations
Key ASIC, Inc. Copyright 2012
Proprietary and Confidential

10

From specification to finished

product Key ASIC can help to
improve your process and
reduce your costs

Key ASIC, Inc. Copyright 2012

Proprietary and Confidential

11