Professional Documents
Culture Documents
SFF Committee
INF-8074i Specification for
SFP (Small Formfactor Pluggable) Transceiver
Rev
Secretariat:
1.0
SFF Committee
IBM
Lucent Technologies
Molex
Optical Communication Products
Picolight
Stratos Lightwave
Tyco Electronics
This Information Specification was not developed or endorsed by the SFF Committee
and was submitted for distribution on the basis that it is of interest to
industry.
The copyright on the contents remains with the contributor.
Contributors are not required to abide by the SFF patent policy. Readers are
advised of the possibility that there may be patent issues associated with an
implementation which relies upon the contents of an 'i' specification.
SFF accepts no responsibility for the validity of the contents.
POINTS OF CONTACT:
Schelto van Doorn
Technical Editor
Intel/nSerial
3101 Jay St #110
Santa Clara CA 95054
I. Dal Allan
Chairman SFF Committee
14426 Black Walnut Court
Saratoga
CA 95070
408-496-3426
408-486-9783Fx
schelto.vandoorn@intel.com
408-867-6630
408-867-2115Fx
endlcom@acm.org
Page 1
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____________________________________________________________________________________________________
September 14, 2000
Page 5
Dimension
(mm)
13.7
8.6
8.5
13.4
1.0
2.3
4.2
2.0
28.5
Tolerance
(mm)
0.1
0.1
0.1
0.1
Maximum
Reference
Reference
Maximum
Minimum
K
L
M
N
P
Q
R
S
T
U
V
56.5
1.1x45
2.0
2.25
1.0
9.2
0.7
45.0
34.6
41.8
2.5
Reference
Minimum
0.25
0.1
0.1
0.1
Maximum
0.2
0.3
0.15
0.05
W
X
1.7
9.0
0.1
Reference
2.0
Maximum
Z
AA
AB
AC
AD
AE
AF
AG
0.45
8.6
2.6
45
0.3
6.3
2.6
0.40
0.05
Reference
Maximum
3
Maximum
Reference
0.05
Minimum
Comments
Transceiver width, nosepiece or front that extends inside cage
Transceiver height, front, that extends inside cage
Transceiver height, rear
Transceiver width, rear
Extension of front sides outside of cage, see Note 2 Figure 1B
Location of cage grounding springs from centerline, top
Location of side cage grounding springs from top
Width of cage grounding springs
Location of transition between nose piece and rear of
transceiver
Transceiver overall length
Chamfer on bottom of housing
Height of rear shoulder from transceiver printed circuit board
Location of printed circuit board to bottom of transceiver
Thickness of printed circuit board
Width of printed circuit board
Width of skirt in rear of transceiver
Length from latch shoulder to rear of transceiver
Length from latch shoulder to bottom opening of transceiver
Length from latch shoulder to end of printed circuit board
Length from latch shoulder to shoulder of transceiver outside
of cage (location of positive stop).
Clearance for actuator tines
Transceiver length extending outside of cage, see Note 2
Figure 1B
Maximum length of top and bottom of transceiver extending
outside of cage, see Note 2 Figure 1B
Height of latch boss
Transceiver height, front, that extends inside cage
Length of latch boss (design optional)
Entry angle of actuator
Radius on entry angle of actuator
Width of cavity that contains the actuator
Width of latch boss (design optional)
Maximum radius of front of latch boss, 2 places (design
optional)
____________________________________________________________________________________________________
September 14, 2000
Page 6
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September 14, 2000
Page 7
Notes:
1. Cage grounding springs permitted in this
area and may extend full length of
transceiver, 4 places. Grounding springs
may contribute a maximum force of 3.5N
(Newtons) to the withdrawal force of the
transceiver from the cage.
2. A representative MT-RJ configuration is
illustrated. Indicated outline defines the
preferred maximum envelope outside of
the cage.
3. Design of actuation method and shape is
optional.
4. Color code: An exposed colored feature of
the transceiver (a feature or surface
extending outside the cage assembly) shall
be color coded as follows:
Black or beige for multi-mode
Blue for single mode
____________________________________________________________________________________________________
September 14, 2000
Page 8
The design of the mating portion of the transceiver printed circuit board is illustrated in Figure 2
and the electrical pad layout is illustrated in Figure 3. A typical contact pad plating for the
printed circuit board is 0.38 micrometers minimum hard gold over 1.27 micrometers minimum
thick nickel. Other plating options that meet the performance requirements are acceptable.
____________________________________________________________________________________________________
September 14, 2000
Page 9
20
VeeT
VeeT
19
TD-
TxFault
18
TD+
Tx Disable
17
VeeT
MOD-DEF(2)
16
VccT
MOD-DEF(1)
15
VccR
MOD-DEF(0)
14
VeeR
Rate Select
13
RD+
LOS
12
RD-
VeeR
11
VeeR
10
VeeR
Top of Board
____________________________________________________________________________________________________
September 14, 2000
Page 10
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September 14, 2000
Page 11
Maximum
Units
Measurement
0
0
90
40
11.5
170
Newtons
Newtons
Newtons
180
N/A
Newtons
11.5
100
22
N/A
Newtons
cycles
50
N/A
cycles
Comments
No damage to transceiver
below 90N
No damage to latch below
180N
____________________________________________________________________________________________________
September 14, 2000
Page 12
Page 13
Contact area: 0.38 micrometers minimum hard gold over 2.54 micrometers minimum
thick nickel
Solder terminal area: gold flash or 2.54 micrometers tin lead plating over 2.54
minimum thick nickel.
Dimension
(mm)
9.4
1.4
11.2
9.2
3.5
Tolerance
(mm)
0.08
0.05
Maximum
Maximum
Reference
3.9
Reference
G
H
1.35
2.6
Maximum
Minimum
J
K
L
M
N
9.6
0.9
1.4
5.4
0.8
TP
Reference
0.05
Maximum
Reference
6.0
Minimum
3.0
Maximum
0.7
0.1
0.3
Reference
1.0
Minimum
4.5
Reference
Comments
Connector card slot width
Guide pin diameter
Connector width
Connector length
Distance from centerline of connector
to outer contact
Distance from centerline of connector
to outer contact
Connector card slot height
Height from bottom of connector to
bottom of card slot
Distance between guide pins
Diamond guide pin width
Diamond guide pin length
Connector height
Length of solder leads past housing,
front & rear
Depth of card slot from front face of
housing
Depth of contact point from front face
of connector
Size of chamfer on top face of
connector
Distance boss extends past front face
of connector
Size of chamfer at entry of card slot,
all around
Length from centerline of guide posts
to end of solder lead
____________________________________________________________________________________________________
September 14, 2000
Page 14
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September 14, 2000
Page 15
Dimension
(mm)
Tolerance
(mm)
Comments
A
B
C
D
E
F
G
48.8
8.3
14.0
14.25
0.249
9.0
11.8
Maximum
Maximum
0.1
Basic
0.025
Basic
Basic
7.9
Basic
J
K
L
M
N
P
Q
R
2.0
16.5
10.0
0.6
0.7
2.0
1.25
3.95
0.1
Basic
Basic
0.1
0.1
Maximum
Maximum
Basic
1.45
Basic
1.45
Basic
4.8
Basic
V
W
0.5
9.2
0.05
0.15
X
Z
AA
AB
AC
AD
AE
AF
AG
9.8
10.0
11.5
7.5
15.0
13.9
8.95
1.0
2.4
Maximum
Basic
Basic
Minimum
Maximum
Minimum
0.15
Minimum
Basic
Overall length
Length from inside top of cage to latch
Inside width of cage
Distance between solderleg centerlines on side of cage
Thickness of solderleg
Distance between vent holes along length
Distance from front of cage to beginning of center vent
hole row
Distance between vent holes across the width of the
cage
Diameter of vent holes
Distance from front of cage to solderleg
Distance between chassis ground solderlegs along side
Width of EMI pins
Width of all chassis ground solderlegs
Width of solderleg shoulder
Length of solderleg
Distance from centerline of cage to centerline of
chassis ground solderleg
Distance from centerline of cage to centerline of
chassis ground solderleg
Distance from centerline of cage to centerline of
chassis ground solderleg
Distance from centerline of cage to centerline of EMI
pins
Width of EMI pins on top cage
Distance from inside top of cage to inside bottom
surface of front section of cage assembly
Maximum height of cage assembly from host board
Distance between chassis ground solderlegs along side
Distance from front of cage to solderleg
Length of 9.2 (W) dimension from front of cage
Maximum width of cage assembly
Minimum width of inside of cage
Height of inside of cage assembly
Height of clearance slots
Distance of clearance slots from cage centerline
____________________________________________________________________________________________________
September 14, 2000
Page 16
A9.
Designator
Dimension
(mm)
Tolerance
(mm)
AH
AJ
AK
AL
AM
AN
AP
AQ
AR
AS
AT
AU
AV
3.0
2.35
2.8
0.5
45.6
35.0
0.7
5.1
3.0
16.3
0.65
5.8
12.7
AW
AX
15.75
10.9
0.1
0.1
0.1
Minimum
Maximum
Maximum
0.1
Maximum
0.05
Basic
Maximum
Minimum
Maximum
recommended
Maximum
Maximum
Comments
Width of clearance slots
Distance from front of cage to latch opening
Length of latch opening
Height of latch lead-in
Distance from front of cage to kickout spring
Distance from front of cage to end of cage floor
Width of solderlegs that extend from floor of cage
Width of latch
Width of latch opening
Front of cage to beginning of outer vent hole rows
Inside radius of cage, four places
Distance between panel ground spring supports
Length of plug extending outside of the cage
Width of plug extending outside of the cage
Height of plug extending outside of the cage
The order to prevent contamination of the internal components and to optimize EMI
performance, it is recommended that a Dust/EMI Plug be inserted into cage assemblies when
no transceiver is present. The maximum dimensions of the Dust/EMI Cover are listed in Table
4 and the maximum size is illustrated in Figure 7A. The Dust/EMI Cover shall exert a
maximum force of 4.0 Newtons per side to the inside surfaces of the cage. This force shall be
measured as the force/side required to compress the Dust/EMI Covers compliant feature(s) to
the maximum dimensions listed in Table 4 (Illustrated in Figure 7A).
____________________________________________________________________________________________________
September 14, 2000
Page 17
____________________________________________________________________________________________________
September 14, 2000
Page 18
Page 19
Introduction
This annex contains pin definition data for the small form-factor pluggable (SFP) transceiver.
The pin definition data is specific to gigabit rate datacom applications such as Fibre Channel
and Gigabit Ethernet. It is expected that different pin definitions will be developed for
SONET/ATM and lower data rate datacom applications.
B2.
Pin Definitions
Figure 1 below shows the pin names and numbering for the connector block on the host board.
The diagram is in the same relative orientation as the host board layout (see Appendix A,
Figure 4.). As mentioned, this pinout only applies to gigabit rate datacom applications. The
pin functions are defined in Table 1 and the accompanying notes. Figure 2A shows the
recommended power supply filtering network. Figure 2B shows an example of a complete
SFP host board schematic with connections to SerDes and protocol ICs. For EMI protection
the signals to the 20-pin connector should be shut off when the transceiver is removed.
Standard board layout practices such as connections to Vcc and GND with Vias, use of shortand equal-length differential signal lines, use of microstrip-lines and 50 terminations are
recommended. Chassis grounds and external electromagnetic interference shields should not
be attached to circuit ground.
Towards
Bezel
VeeT
TXFault
TX Disable
MOD-DEF(2)
MOD-DEF(1)
MOD-DEF(0)
Rate Select
LOS
VeeR
10
VeeR
VeeT
20
TD-
19
TD+
18
VeeT
17
VccT
16
VccR
15
VeeR
14
RD+
13
RD-
12
VeeR
11
Towards
ASIC
Figure 1. Diagram of Host Board Connector Block Pin Numbers and Names
____________________________________________________________________________________________________
September 14, 2000
Page 20
Name
Function
Plug
Seq.
Transmitter Ground
Transmitter Fault
Indication
Note 1
Note 2
Module disables on high or open
Note 3, 2 wire serial ID interface
Notes
VeeT
TX Fault
TX Disable
MOD-DEF2
5
6
7
MOD-DEF1
MOD-DEF0
Rate Select
Module Definition 1
Module Definition 0
Select between full or
reduced
receiver bandwidth
3
3
3
8
9
LOS
VeeR
Loss of Signal
Receiver Ground
3
1
Note 5
Note 6
10
VeeR
Receiver Ground
Note 6
11
VeeR
Receiver Ground
Note 6
12
13
14
RDRD+
VeeR
3
3
1
Note 7
Note 7
Note 6
15
16
17
VccR
VccT
VeeT
Receiver Power
Transmitter Power
Transmitter Ground
2
2
1
18
19
20
TD+
TDVeeT
Transmit Data In
Inv. Transmit Data In
Transmitter Ground
3
3
1
Note 9
Note 9
Note 6
Transmitter Disable
Module Definition 2
Transmitter on
Undefined
Transmitter Disabled
Transmitter Disabled
____________________________________________________________________________________________________
September 14, 2000
Page 21
Reduced Bandwidth
Undefined
Full Bandwidth
Reduced Bandwidth
5) LOS (Loss of Signal) is an open collector/drain output, which should be pulled up with a
4.7K 10K resistor. Pull up voltage between 2.0V and VccT, R+0.3V. When high, this
output indicates the received optical power is below the worst-case receiver sensitivity (as
defined by the standard in use). Low indicates normal operation. In the low state, the
output will be pulled to < 0.8V.
6) VeeR and VeeT may be internally connected within the SFP module.
7) RD-/+: These are the differential receiver outputs. They are AC coupled 100 differential
lines which should be terminated with 100 (differential) at the user SERDES. The AC
coupling is done inside the module and is thus not required on the host board. The voltage
swing on these lines will be between 370 and 2000 mV differential (185 1000 mV single
ended) when properly terminated.
8) VccR and VccT are the receiver and transmitter power supplies. They are defined as 3.3V
5% at the SFP connector pin. Maximum supply current is 300 mA. Recommended host
board power supply filtering is shown below. Inductors with DC resistance of less than
1=should be used in order to maintain the required voltage at the SFP input pin with 3.3V
supply voltage. When the recommended supply filtering network is used, hot plugging of
the SFP transceiver module will result in an inrush current of no more than 30 mA greater
than the steady state value. VccR and VccT may be internally connected within the SFP
transceiver module.
9) TD-/+: These are the differential transmitter inputs. They are AC-coupled, differential lines
with 100 differential termination inside the module. The AC coupling is done inside the
module and is thus not required on the host board. The inputs will accept differential
swings of 500 2400 mV (250 1200 mV single-ended), though it is recommended that
values between 500 and 1200 mV differential (250 600 mV single-ended) be used for
best EMI performance.
____________________________________________________________________________________________________
September 14, 2000
Page 22
1 uH
VccT
0.1 uF
1 uH
VccR
0.1 uF
SFP Module
3.3 V
0.1 uF
10 uF
10 uF
Host Board
1 uH
Protocol
Vcc
SFP
Module
3.3 V
1 uH
10 uF
.1uF
Protocol Vcc
4.7k to 10k Ohms
Vcc,T
.1uF
Tx_Disable
Tx_Disable
Tx_Fault
Tx_Fault
TD +
TD -
.01uF
100 Ohms
Laser Driver
.01uF
Gnd,T
Protocol IC
SerDes IC
4.7k to 10k Ohms
10 uF
.1uF
RD +
100 Ohms
Vcc,R
.01uF
Preamp &
Quantizer
RD .01uF
Rx_LOS
Rx_LOS
Rx_Rate
Rx_Rate
3.3 V
30k Ohms
Gnd,R
PLD / PAL
Mod_def 0
Mod_def 1
Mod_def 2
Page 23
The timing requirements of the control and status lines are drawn largely from the GBIC
standard at the time of writing. They are summarized in Table 2 below:
Symbol
Min
Max
Unit
TX Disable Assert
Time
t_off
10
TX Disable Negate
Time
t_on
ms
Condition
Time to initialize,
including reset of
TX_Fault
TX Fault Assert Time
t_init
300
ms
t_fault
100
TX Disable to reset
t_reset
t_loss_on
100
t_loss_off
100
Rate-Select Change
Time
t_ratesel
10
f_serial_clock
100
kHz
10
____________________________________________________________________________________________________
September 14, 2000
Page 24
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September 14, 2000
Page 25
t_init
____________________________________________________________________________________________________
September 14, 2000
Page 26
TX_FAULT
TX_DISABLE
Transmitted Signal
t_off
t_on
____________________________________________________________________________________________________
September 14, 2000
Page 27
____________________________________________________________________________________________________
September 14, 2000
Page 28
t_loss_off
____________________________________________________________________________________________________
September 14, 2000
Page 29
The definition of the MOD-DEF function is drawn largely from the GBIC standard with some
small, but backwards compatible, changes to the fields or allowed values to reflect the latest
standards and expectations for these transceivers. In some cases, this backward compatibility
approach results in the possibility of illegal combinations (such as defining an SFP module with
SC optical connectors). Some locations previously reserved in the GBIC serial identification
have now been defined.
It should be noted that only the serial module definition and the basic Mod-Def 0 indication of
module present are implemented. The use of MOD DEF lines as static codes for module
definition as done with GBIC are not implemented.
Overview
The SFP serial ID provides access to sophisticated identification information that describes the
transceivers capabilities, standard interfaces, manufacturer, and other information. The serial
interface uses the 2-wire serial CMOS E2PROM protocol defined for the ATMEL
AT24C01A/02/04 family of components.
When the serial protocol is activated, the host generates the serial clock signal (SCL, Mod Def
1). The positive edge clocks data into those segments of the E2PROM that are not writeprotected within the SFP transceiver. The negative edge clocks data from the SFP
transceiver.
The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses
SDA in conjunction with SCL to mark the start and end of serial protocol activation. The
memories are organized as a series of 8-bit data words that can be addressed individually or
sequentially.
This section defines the information structures that are obtained from the SFP transceiver via
the serial ID.
A SFP transceiver shall meet the electrical and optical requirements, including amplitude, eye
diagram, jitter, and other parameters, specified for the standards with which the transceiver
claims compliance.
Serial information definition
The 2-wire serial CMOS E2PROM provides sequential or random access to 8 bit parameters,
addressed from 0000h to the maximum address of the memory. The address select pins for
the serial CMOS E2PROM shall be set to zero (fixed at the VIL low level). The fields specified
by this section shall not be written by the host in which it is installed. The SFP transceiver may
enforce this by using the write protect features of the CMOS E2PROM.
____________________________________________________________________________________________________
September 14, 2000
Page 30
____________________________________________________________________________________________________
September 14, 2000
Page 31
Field
Size
(Bytes)
Name of
field
Description of field
BASE ID FIELDS
Identifier
Ext. Identifier
Connector
3-10
Transceiver
11
Encoding
12
BR, Nominal
13
Reserved
14
Length(9m) - km
15
Length (9m)
16
Length (50m)
17
Length (62.5m)
18
Length (Copper)
19
Reserved
20-35
16
Vendor name
36
Reserved
37-39
Vendor OUI
40-55
16
Vendor PN
56-59
Vendor rev
60-62
Reserved
63
CC_BASE
64-65
Options
66
BR, max
67
BR, min
68-83
16
Vendor SN
84-91
Date code
92-94
Reserved
95
CC_EXT
96-127
32
128-511
384
Reserved
512-n
Vendor specific
____________________________________________________________________________________________________
September 14, 2000
Page 32
00h
01h
02h
03h
04-7Fh
80-FFh
Unknown or unspecified
GBIC
Module/connector soldered to motherboard
SFP transceiver
Reserved
Vendor specific
Extended Identifier
The field should be set to 04h for all SFP modules indicating serial ID module definition.
Connector
The Connector value indicates the external connector provided on the interface. This value
shall be included in the serial data. The defined connector values are shown in Table 3.3. Note
that 01h 05h are not SFP compatible, and are included for compatibility with GBIC standards
Description of Connector
Unknown or unspecified
SC
Fibre Channel Style 1 copper connector
Fibre Channel Style 2 copper connector
BNC/TNC
Fibre Channel coaxial headers
FiberJack
LC
MT-RJ
MU
SG
Optical pigtail
Reserved
HSSDC II
Copper Pigtail
Reserved
Vendor specific
____________________________________________________________________________________________________
September 14, 2000
Page 33
6
6
6
6
6
Bit
Description of transceiver
Data
Addr
Bit
Description of transceiver
9
9
9
9
9
9
9
9
10
10
10
10
10
10
Bit 7 is the high order bit and is transmitted first in each byte.
____________________________________________________________________________________________________
September 14, 2000
Page 34
BR, nominal
The nominal bit rate (BR, nominal) is specified in units of 100 Megabits per second, rounded
off to the nearest 100 Megabits per second. The bit rate includes those bits necessary to
encode and delimit the signal as well as those bits carrying data information. A value of 0
indicates that the bit rate is not specified and must be determined from the transceiver
technology. The actual information transfer rate will depend on the encoding of the data, as
defined by the encoding value.
Length (9m)-km
Addition to EEPROM data from original GBIC definition. This value specifies the link length
that is supported by the SFP transceiver while operating in compliance with the applicable
standards using single mode fiber. The value is in units of kilometers. A value of 255 means
that the transceiver supports a link length greater than 254 km. A value of zero means that the
transceiver does not support single mode fiber or that the length information must be
determined from the transceiver technology.
Length (9m)
This value specifies the link length that is supported by the SFP transceiver while operating in
compliance with the applicable standards using single mode fiber. The value is in units of 100
meters. A value of 255 means that the transceiver supports a link length greater than 25.4 km.
A value of zero means that the SFP transceiver does not support single mode fiber or that the
length information must be determined from the transceiver technology.
____________________________________________________________________________________________________
September 14, 2000
Page 35
____________________________________________________________________________________________________
September 14, 2000
Page 36
bit
Description of option
address
64
65
65
65
65
65
65
65
7-0 Reserved
7-6 Reserved
5 RATE_SELECT is implemented
If bit is set then active control of the rate select pin is required
to change rates. If bit is not set, no control of pin is required.
In all cases, compliance with multiple rate standards should
be determined by Transceiver Codes in Bytes 4, 5, 6 and 10.
(See Table 3.4)
4 TX_DISABLE is implemented and disables the serial output.
3 TX_FAULT signal implemented. (Reset defined in section III)
2 Loss of Signal implemented, signal inverted from definition in
Table 1
NOTE: This is not standard SFP transceiver behavior and
should be avoided, since non-interoperable behavior results.
1 Loss of Signal implemented, signal as defined in Table 1
0 Reserved
BR, max
The upper bit rate limit at which the SFP transceiver will still meet its specifications (BR, max)
is specified in units of 1% above the nominal bit rate. A value of zero indicates that this field is
not specified.
BR, min
The lower bit rate limit at which the SFP transceiver will still meet its specifications (BR, min) is
specified in units of 1% below the nominal bit rate. A value of zero indicates that this field is not
specified.
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Description of field
ASCII code, two low order digits of year. (00 = 2000).
ASCII code, digits of month (01 = Jan through 12 =
Dec)
ASCII code, day of month (01 - 31)
ASCII code, vendor specific lot code, may be blank
CC_EXT
The check code is a one byte code that can be used to verify that the first 32 bytes of extended
serial information in the SFP transceiver is valid. The check code shall be the low order 8 bits
of the sum of the contents of all the bytes from byte 64 to byte 94, inclusive.
Read-only
This area may contain vendor specific information which can be read from the SFP
transceiver. The data is read only.
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