myRIO Embedded Design

Due Date: Today +1 Week

In this lab experiment, the student will be introduced to the concept of embedded design on myRIO.
They will learn to create and manipulate a Labview project with Vis targeting different hardware
components (RT ARM processor, Xilinx ZYNQ FPGA) using myRIO 1900 development board.A myRIO
development board is an educational tool for students to design, implement and deploy a reliable
embedded control and monitoring applications by Acquiring and generating analog and digital signals,
controlling timing, and implementing signal processing on RT and FPGA and communicate data between
RT, FPGA and PC.

Objectives
Understand myRIO development board architecture and functionality.
Understand myRIO project templates (Standard, Custom FPGA personality, Blank).
Implement and verify design example in Labview with express and low level VI.

Hardware Architecture
Overview
The NI myRIO-1900 provides analog input (AI), analog output (AO), digital input and output (DIO), audio,
and power output in a compact embedded device. The NI myRIO-1900 connects to a host computer
over USB and wireless 802.11b,g,n. the NI myRIO provides two expansion ports A and B (MXPA, MXPB)
and a mini system port C (MSPC).Figure 1 shows the arrangement of different hardware interfaces of NI
myRIO-1900 components.

FPGA (Field Programmable Gate Array)

The NI myRIO-1900s core processing unit is a dual core Xilinx Zynq-7010 FPGA chipat 667MHz and an
embedded Real Time processor. The FPGA chip provides direct connections to digital input/output and
analog input/output channels. The available channels are arranged as following: 40 digital input/output
ports supporting a 3.3V, 4mA TTL output and a 5V TTL input, 2 analog output channels used to generate
0-5V signals on MXPA and MXPB with a stereo-audio input and output channels of 2.5V capable of
driving headphones. In addition to four single-ended analog Input channels capable of measuring
voltage levels from 0-5V with 12-bits ADC resolution. All analog input channels share one ADC. Each
analog output channel connects to a dedicated DAC. In addition to a built in accelerometer The NImyRIO also provides 10 V, differential analog input channels and 10 V referenced, single-ended analog
output channels on the MSPC connector.

Real Time Processor (RT-Processor)

The NI myRIO-1900 Real Time processor is a dual-core ARM Cortex-A9 hard-processor defined in the
FPGA. The RT processor connects to a Watchdog timer, Reset Button, USB device port, USB host port,
256 MB Nonvolatile Memory,512MB DDR3 Memory, Wireless Interface, Wireless On/Off Button, Status
LED, Wireless LED, UART module and User LEDs.

Figure 1 Hardware Block Diagram

myRIO Project Templates

You can choose a personality when you create a myRIO project. With different personalities, you can
implement different functionalities and use different channels on the NI myRIO.To switch between
personalities, right-click an NI myRIO target in the Project Explorer window, select Switch FPGA
Personality, and choose an available personality from the shortcut menu.

Default Personality
A standard myRIO project is the best for beginners. This project option provides the user with a predefined and pre-compiled FPGA VI. The default FPGA VI contains pre-implemented functions and
libraries (PWM, analog input, analog output, encoder, SPI, I2C, UART, LED control, digital read, digital
write, accelerometer). The default FPGA VI is known as Default FPGA Personality and is hidden from
the user it supports general I/O, protocols, and interrupts. The created Labview project provides the

user with the RT main VI for editing and a myRIO toolkit to interfacing with the available functions. Use
the default personality for control applications. Figure 2 shows the supported personalities.

Figure 2 Supported Functionalities

Custom Personality
A Custom personality project option is provided for the intermediate users to implement independent
FPGA functionalities and designs using the FPGA target VI. The custom personality displays the hidden
FPGA VI used by the default personality project and allows editing. The Custom FPGA personality VI
includes all implemented functions previously discussed. Editing the FPGA VI should be used only to add
extra functionalities. Deleting unused functions should only be considered for freeing extra resources.
Warning: Deleting any pre-defined functions from the FPGA VI causes the related myRIO toolkit VI to
malfunction, since the myRIO toolkit interfaces directly with the previously ready FPGA designs.

Blank Project
A Blank project option is provided for advanced users. A blank labview project is created and the user is
required to manually add and arrange Vis with equivalent hardware targets (RT-FPGA). Added Vis is
manually created empty. The User is provided full control on the device. In such case myRIO toolkit
functions are not implemented on the FPGA and therefore cannot be used by the RT main VI. In addition
the developer is required to implement and customize all needed functions and data transfer methods
from RT <-> FPGA from scratch (PWM, encoder, SPI, FIFO, Memory).

Demo Project
This project is an introductory project to Labview and myRIO. the following experiments shows the
available project options for setting up a myRIO project and VIs targeting the PC, RT and FPGA units.

Task

Create a standard myRIO project with the default FPGA personality.

Indentify Front Panel and Block Diagram components.
Answer related experiment questions at the end of the procedure.

Procedure

Connect the myRIO to PC using the USB cable provided and plug in the power adapter to turn on
the device.
Create a new folder on your desktop and name it "myRIO Lab1".
Launch Labview and create a new project (File -> Create Project).
From the left window under Templates choose myRIO (Templates -> myRIO).
From the right side window, three options are available (Blank, myRIO project, myRIO Custom
FPGA Project). Select "myRIO project" and press next.Figure 3 Shows the mentioned procedure.
The following step initializes the myRIO hardware, edits the project details and provide
information regarding supported functionalities.
In the "Project Name" box type " myRIOdemo".
in the "Project Root" box browse to the created folder and name your project "myRIO Lab1"
and click next. Figure 4 shows the mentioned procedure.
Examine the project window showing two hardware targets "PC" and "NI-myRIO", target
specific VI should be placed under the intended hardware, the main VI only deploys and runs on
the RT processor, notice how the FPGA VI is hidden and the project window shows only two
targets when a standard myRIO project is chosen.Figure 5 shows the project window.
Expand the myRIO target included in the project and open the "main" VI. the main VI provides a
demo application which displays and plots current coordinates of the myRIO internal
accelerometer. Press run to delpoy the program to the connect device.
When running, gently move the myRIO in UP/DOWN or LEFT/RIGHT motion.
Stop the program and open the "Block Diagram" of the main VI (Shortcut: CTRL+T).
Answer the upcoming experiment questions and proceed to the next step.

Figure 3 Project Templates

Figure 4 Project Configuration

Figure 5 Project Architecture

Lab Procedure
Task

Design and implement an optimized accelerometer acquisition technique using low level
functions.

Procedure

In the previously created project, open the block diagram and delete the Accelerometer Express
VI. Figure 6 shows the Express VI.
Right Click in the block diagram and choose the myRIO low level functions from the function
palette.(myRIO -> low level -> accelerometer) to display the accelerometer specific functions.
Figure 7 shows the function palette.
Modify the Block diagram to include the accelerometer low level functions as shown in Figure 8.

Figure 6 Accelerometer Express VI

Figure 7 Low level functions

Figure 7 Modified Block Diagram

Tips

Use CTRL+SPACE for a quick drop search for a needed function.

Use CTRL+H to display the help window and display additional information for a chosen
function, structure or wire.
Data representations are identified by colors: Green -> Boolean, Pink -> String, Orange ->
floating point, Blue -> Integers.
Read the device guide and specifications for correct wiring and project design.

Questions

What are the supported functions on the myRIO-1900 using the default FPGA personality and
standard project template? (refer to figure 4)
Indentify the Front Panel components (Push Buttons, Clusters, Graphs, Charts...) and group
them under "Control" and "Indicator" categories.
Identify the Block Diagram components, what are the used functions, VIs and structures?
Double click on the Accelerometer express VI select "View Code", indentify the code
components, comment on the disadvantages of using Express VIs in loops.
Suggest an optimization technique for a more synchronized design.
Create a Custom personality project following the previous step. note the main differences in
the project window?

Pre Lab 2 Questions Analog Basics

Research the LM35 Temperature Sensor, What is the operating voltage range of the given
sensor? How is the output voltage converted to temperature? is the output voltage linear to the
measured temperature in Degree C?
What is the ADC data conversion resolution in bits?
What is the required operating voltage of the sensor (VCC)?
Are the analog input pins on the myRIO device compatible with the mentioned sensor? do you
require additional signal conditioning circuit?
What is the supported analog reference voltage used by the ADC in MXPA/B and MSPC
connectors