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ER LAB
MANUAL
MICROCONTROLLER LAB
LIST OF EXPERIMENT (B.Tech., VIIth Sem, EEE)
1. TO UNDERSTAND THE BASIC ARITHMETIC AND INTRODUCTION
TO 8051 MICROCONTROLLER.
1(a) Write an ALP to add, subtract & multiply , division of two 8 bit
numbers. Numbers are in Register in R1 & R2. Result of addition in
register in R0, subtraction in R3, borrow if any in R4, Result of
multiplication in Register R5 & R6, & Result of division , quotient in R7,
Remainder in R0 of RB1. Display all results on port 1 LED Bank with a 5
sec delay.
1(b) Write an ALP to AND, OR, NOT & XOR of two 8 bit numbers.
Numbers are in Register in R1 & R2. Result of ANDING in Register R0,
ORING in R3, Negation in Register R5 & R6, XORING in R7. Display all
results on Port 1 LED Bank with a 5 sec delay.
1(c) Write an ALP to add of two byte number. 1st two byte number are in
Register R1 & R2 and 2nd two byte number are in Register in R3, R4,
Result of addition in Register R5,R6,R7. Display all results on port 1 LED
Bank with a 5sec delay.
1 (d) Write an ALP to subtract of two byte number from another two byte
number. 1st two byte number are in Register R1 & R2 and 2nd two byte
number are in Register in R3, R4, Result of subtraction in Register R5,R6,
borrow if any in R7. Display all results on port 1 LED Bank with a 5sec
delay.
1 (e) Write an ALP to add n byte number stored in external RAM
(Starting addresss 9000 and no of bytes is 10 or 0Ah). 1st two byte number
are in Register R0 & R1 and 2nd two byte number are in Register in R2, R3.
Result of addition in Register R5,R6,R7. Display all results on port 1 LED
Bank with a 5sec delay.
2. COPY BLOCK AND SHIFT BLOCK
2 (a) Write an ALP to move block of data bytes present in internal memory
with starting address 10h and ending address 20h to the destination
memory with starting address 30h. (Without overlap).Numbers are in
Register R1,R2,. Result of without overlapping in Register R0. Display all
results on Port 1 LED Bank with a 5 sec delay.
2 (b) Write an ALP to move block of data bytes present in internal
memory with starting address 10h and ending address 20h to the
destination memory with atarting address 15h. (With Overlap).
2 (c) Write an ALP to move block of data bytes present in external
memory with starting address 800h to the destination memory with
starting address 900h and size of array is 10h.
2 (d) Write an ALP to exchange block of data bytes present in external
memory. Starting address of first is 8000h and starting address of other
block 900h and size of array is 10h.
3.HEX TO BCD CONVERSION
3 (a) Write an ALP to illustrate hexadecimal up counter with a given
starting and ending value. Starting Range is 00H, Ending Range is 0FFH,
Register used R0,R1,R3,R6.
3 (b) Write an ALP to illustrate hexadecimal down counter with a given
starting and ending value. Starting Range is 0FFH, Ending Range is 00H.
3 (c) Write an ALP to illustrate decimal up counter with a given starting
and ending value. Starting Range is 00H, Ending Range is 099H, Register
used R0, R1, R3,R6.
3 (d) Write an ALP to illustrate decimal down counter with a given
starting and ending value. Starting Range is 99H, Ending Range is 00H,
Register used R0, R1, R3,R6.
10. WAP for configuring timer to generate variable frequency square wave.
11.Write a program for interfacing a seven segment display.
12.Write a program to display digital values on LCD modules.
1(a) Write an ALP to add, subtract & multiply , division of two 8 bit numbers. Numbers
are in Register in R1 & R2. Result of addition in register in R0, subtraction in R3, borrow
if any in R4, Result of multiplication in Register R5 & R6, & Result of division , quotient in
R7, Remainder in R0 of RB1. Display all results on port 1 LED Bank with a 5 sec delay.
Address
8000
Label
Mnemonic
MOV R1,#20H
MOV R2,#10H
MOV A,R1
ADD A,R2
MOV R0,A
LCALL DELAY 5Sec
MOV A,R1
SUBB A,R2
MOV R3,A
JC GET
MOV
LCALL DELAY 5sec
MOV A,R1
MOV B,R2
MUL AB
MOV R5,A
LCALL DELAY 5sec
MOV A,R1
MOV B,R2
DIV AB
MOV R5,A
LCALL DELAY 5sec
LCALL 0003H
DELAY 5sec
Comment
First no
Second no
ADDITION
RO=R1-R2
MULTIPLICATION
R4=R1XR2
DIVISION
R5=R1/R2
1(b) Write an ALP to AND, OR, NOT & XOR of two 8 bit numbers. Numbers are in Register in
R1 & R2. Result of ANDING in Register R0, ORING in R3, Negation in Register R5 & R6,
XORING in R7. Display all results on Port 1 LED Bank with a 5 sec delay.
Address
8000
Label
Mnemonic
MOV R1,#20H
MOV R2,#10H
Comment
First BYTE
Second BYTE
MOV A,R1
ANL A,R2
MOV R0,A
MOV M,A
LCALL DELAY 5sec
MOV A,R1
ORL A,R2
MOV R3,A
MOV M,A
LCALL DELAY 5sec
MOV A,R1
CPL A
MOV R4,A
MOV M,A
LCALL DELAY 5sec
MOV A,R1
XRL A,R2
MOV R5,A
MOV M,A
LCALL DELAY 5sec
LCALL 0003H
DELAY 5 sec
ANDING
R0=R1 AND R2
ORING
R3=R1 OR R2
NEGATION
R4=~R1
XORING
R5=R1 XOR R2
1(c) Write an ALP to add of two byte number. 1st two byte number are in Register R1 & R2 and 2nd
two byte number are in Register in R3, R4, Result of addition in Register R5,R6,R7. Display all
results on port 1 LED Bank with a 5sec delay.
Address
8000
Label
Mnemonic
MOV R1,#12
MOV R2,#34
MOV R3,#56
MOV R4,#78
MOV R7,#00
CLR C
MOV A,R1
ADD A,R3
MOV R5,A
MOV M,A
LCALL DELAY 5sec
MOV A,R2
ADDC A,R4
MOV R6,A
MOV M,A
LCALL DELAY 5sec
JNC SKIP
MOV R7,#01
Comment
3412
7856
------0AC68
3rd byte=0
3rd byte=1
SKIP
MOV M,A
LCALL DELAY 5sec
LCALL 0003
DELAY 5 sec
1 (d) Write an ALP to subtract of two byte number from another two byte number. 1 st two byte
number are in Register R1 & R2 and 2nd two byte number are in Register in R3, R4, Result of
subtraction in Register R5,R6, borrow if any in R7. Display all results on port 1 LED Bank with a
5sec delay.
Address
8000
Label
Mnemonic
MOV R1,#56
MOV R2,#78
MOV R3,312
MOV R4,#34
Comment
7856
3412
-----4444
CLR C
MOV A,R1
SUBB A,R2
MOV R5,A
MOV M,A
LCALL DELAY 5sec
MOV A,R2
SUBB A,R4
MOV R6,A
MOV M,A
LCALL DELAY 5sec
LCALL 0003
DELAY 5sec
1 (e) Write an ALP to add n byte number stored in external RAM (Starting addresss 9000 and no
of bytes is 10 or 0Ah). 1st two byte number are in Register R0 & R1 and 2nd two byte number are in
Register in R2, R3. Result of addition in Register R5,R6,R7. Display all results on port 1 LED
Bank with a 5sec delay.
Address
8000
Label
LOOP
Mnemonic
MOV R0,#0A
MOV R1,#00
MOV DPTR,#9000
MOVX A,@DPTR
ADD A,R1
INC DPTR
Comment
No of bytes
R1=SUM=0
DPTR=9000
Sum=sum+n[i]
DJNZ R0,LOOP
LCALL 0003
2. COPY BLOCK
Problem:- Copy a block of 20 bytes of data available from address 60H to 73H to the location
starting from 40H.
Solution:The data available between 60H and 73H of the internal RAM area, shown at left, is to be copied in
the same sequence to RAM location 40H onwards.
As the addresses are sequential in this case, it is preferable to use pointers, which can be
manipulated easily. Therefore, R0 and R1 may be initialized by the starting address of source and
destination area. Another register, say R7, may be used as a counter to keep a track of number of
copy operation and indicate when to terminate. As the MOV instruction does not allow both source
and destination to be indirectly addressed, therefore, the accumulator may be used for in-between
storage of data.
Alogrithm:Step no 1: Initialize R0 as source and R1 as destination pointers and load R7 by 20d to serve as the
counter.
Step no 2: Copy a byte from source to destination, using R0 and R1 through accumulator (as a
temporary storage). Update pointers after copying.
Step no 3 Decrement counter by one. Continue at step 2 if the counter is not zero.
Step no 4: Terminate the process.
Program
; Program to copy 20 bytes starting from 60H to location 40H onwards.
; First three instructions initialize both source and destinations pointers and the counter.
START:
: Iterative procedure to copy data from source to destinations starts from here.
COPYIT:
MOV A, @R0
MOV @R1,A
: store it in destination
INC R0
INC R1
R7=0 indicates data copy over. Following instructions terminates the program.
OVER:
SJMP OVER
; terminates here
Generally, this type of routine is terminated by the RET (return to the calling program) instruction.
However, as we are yet to become familiar with RET instruction, an infinite loop is used to
terminate the program. A system reset is to be used to come out from this infinite loop.
SHIFT BLOCK
Problem
Shift a block of 8 bytes of data, presently located 50H to 57H, 1 byte up, so that the data is available
from 51H to 58H.
Solution
The difference between copy block and shift block is that there is no overlapping in former, which
exists in the latter. Moreover, shift-up and shift-down are to be treated in a slightly different
manner. Otherwise, the usage of pointers and the counter is identical in both cases. Here also R0
and R1 are used as pointers and R7 is used as the counter. Following are the algorithm and
program listing.
Algorithm
Step no 1: Initialize R0 as source and R1 as destinations pointers for the highest addresses and load
R7 by 08 to serve as the counter.
Step no 2: Copy a byte via accumulator from source to destination, using R0 and R1, through
accumulator. Decrement both pointers by one after copying.
Step no 3: Decrement both pointers by one after copying.
Step no 4: Terminate the process.
Program
; Program to shift 8 bytes by 1 byte up.
; Following three instructions initialize both pointers and the counter.
START:
MOV A,@ R0
MOV @ R1, A
DEC R0
DEC R1
SJMP OVER
; terminate here.
In case of shifting down, pointers would have been loaded for the others end (50H and 4FH) and
would have been incremented after every iteration.
2 (a) . Write an ALP to move block of data bytes present in internal memory with starting address
10h and ending address 20h to the destination memory with starting address 30h. (Without
overlap). Numbers are in Register R1,R2,. Result of without overlapping in Register R0. Display all
results on Port 1 LED Bank with a 5 sec delay.
Address
9000
Label
LOOP
Mnemonic
MOV R1,#10H
MOV R2,#20H
MOV R0,#30H
CLR C
MOV A,R2
SUBB A,R1
MOV R2,A
MOV A,@R1
MOV @R0,A
INC R1
INC R0
DJNZ R2,LOOP
LCALL 0003
Comment
Starting addr of src
Ending addr of src
Starting addr of desti
Determination of size and stored in
R2
Copy data byte
2 (b) Write an ALP to move block of data bytes present in internal memory with starting address
10h and ending address 20h to the destination memory with atarting address 15h.(With Overlap).
Address
9000
Label
Mnemonic
MOV R1,#10H
MOV R2,#20H
MOV R0,#15H
CLR C
MOV A,R2
SUBB A,R1
MOVR2,A
Comment
Starting addr of src
Ending addr of src
Starting addr of desti
Determination of size and stored in
R2
MOV A,R1
ADD A,R2
MOV R1,A
MOV A,R0
ADD A,R2
MOV R0,A
INC R2
MOV A,@R1
MOV @R1
DEC R0
DJNZ R2,LOOP
LCALL 0003
2 (c) Write an ALP to move block of data bytes present in external memory with starting address
800h to the destination memory with starting address 900h and size of array is 10h.
Address
8500
Label
LOOP
Mnemonic
MOV R0,#10H
MOV 82H,#00H
MOV 83,#80H
MOVX A,@DPTR
MOV 83H,#90H
MOV @DPTR,A
INC DPTR
DJNZ R0,LOOP
LCALL 0003H
Comment
Size of an array
DPL=00
DPH=80
Src data to acc
DPH=90
Acc to desti
2 (d) Write an ALP to exchange block of data bytes present in external memory. Starting address of
first is 8000h and starting address of other block 900h and size of array is 10h.
Address
8500
Label
LOOP
Mnemonic
MOV R0,#10H
MOV 82H,#00H
MOV 83H, #80H
MOVX A,@DPTR
MOV R1,A
MOV 83H,#90H
MOV A,@DPTR
XCH A,R1
MOVX@DPTR,A
MOV 83H,#80H
MOV A,R1
MOVX @DPTR,A
INC DPTR
DJNZ R0,LOOP
LCALL 0003H
Comment
Size of an array
DPL=00h
DPH=80h
Src dat to acc
DPH=90h
DPH=80h
Solution
A simple way to convert any hexadecimal number to its BCD equivalent is
to use the table look-up procedure. However , this needs a 256- byte
table, which consumes sustainable memory space. Another method is to
divide the hexadecimal numbers by powers of 10. As the problem states
that the hexadecimal number would not be more than 63H or 99d, the
MOV
MOV
R7,30H
R0,#31H
; load N in counter
; set pointer at start of
array
LOOP:
number
MOV
A,@R0
ACALL
HEXBCD
MOV
@R0,A
the accumulator
location
INC
R0
DJNZ
R0, LOOP
RET
; Name:
HEXBCD
; Function:
64H (100d)
; Input:
; Output:
; Calls:
none
; Uses:
flags A,B
HEXBCD:
MOV
B,#0AH
DIV
AB
accumulator and remainder in B
; load B by 10d
; quotient in the
SWAP
A,B
in its place
ORL
digit
RET
Label
LOOP
Mnemonic
MOV A,#00
MOV F0,#FF
MOV R6,A
MOV R3,A
LCALL 677D
MOV R0,#FF
MOV R1,#FF
LCALL 6850
MOV R0,#FF
MOV R1,#FF
MOV A,R3
INC A
CJNE A,F0,LOOP
LJMP MAIN
Comment
Starting value
Ending value
Display R6 data
Delay
Next value
Label
LOOP
Mnemonic
MOV A,#FF
MOV F0,#00
MOV R6,A
MOV R3,A
LCALL 677D
MOV R0,#FF
MOV R1,#FF
LCALL 6850
MOV R0,#FF
MOV R1,#FF
MOV A,R3
DEC A
CJNE A,F0,LOOP
LJMP MAIN
Comment
Starting value
Ending value
Display R6 data
Delay
Next value
Label
MAIN
LOOP
Mnemonic
MOV A,#00
MOV F0,#99
ADD A,#00
DA A
MOV R6,A
MOV R3,A
LCALL 677D
MOV R0,#FF
MOV R1,#FF
LCALL 6850
MOV R0,#FF
MOV R1,#FF
INC A
CJNE A,F0,LOOP
LJMP MAIN
Comment
Starting value
Ending value
Display R6 data
Delay
Next value
Label
MAIN
LOOP
Mnemonic
MOV A,#99
MOV F0,#00
ADD A,#00
DA A
MOV R6,A
MOV R3,A
LCALL 677D
MOV R0,#FF
MOV R1,#FF
LCALL 6850
MOV R0,#FF
MOV R1,#FF
DEC A
CJNE A,F0,LOOP
LJMP MAIN
Comment
Starting value
Ending value
Display R6 data
Delay
Next value
Address
8000
Label
Mnemonic
MOV R0,#16
MOV A,#R0
ANL A,#F0
SWAP A
MOV FO,#0A
MUL AB
MOV R1,A
MOV A,R0
ANL A,#0F
ADD A,R1
MOV R1,#A
LCALL 0003
Comment
R0= Input byte
R1=Output byte
Label
Mnemonic
MOV R0,#FF
MOV A,R0
MOV F0,#64
DIV AB
MOV R1,A
MOV A,B
MOV F0,#OA
DIV AB
MOV R2,A
MOV A,B
MOV R3,F0
MOV A,R2
SWAP A
ADD A,R3
MOV R2,A
LCALL 0003
Comment
Input no
B=64h
First dgt
B=0Ah
Second dgt
Third dgt
Pack R2 & R3 to R2
Label
Mnemonic
MOV R1,#0B
MOV A,R1
LCALL 9000
LCALL 0003
Comment
Input char
LCALL CONV
First dgt
9000
9001
9003
9004
9006
9008
9009
900B
CONV
DGT
CLR C
SUBB A,#OA
MOV A,R1
JC 9009
ADD A,#37
RET
ADD A,#30
RET
JC DGT
ASCII(CHAR)
ASCII(NUMBER)
9000
Label
CONV
DGT
Mnemonic
MOV R1,#39
MOV A,R1
LCALL 9000
LCALL 0003
CLR C
SUBB A,#41
MOV A,R1
JC DGT
CLR C
SUBB A,#37
RET
CLR C
SUBB A,#30
RET
Comment
Input char
LCALL CONV
ASCII ECHAR
ASCII(NUMBER)
3 (i) Write an ALP to convert BCD to its equivalent ASCII code. Input
Register is R0.
Address
8000
Label
Mnemonic
MOV R0,#23
LCALL 9000
LCALL 0003
Comment
Input char
LCALL CONV
9000
CONV
MOV A,R0
ANL A,#0F
ADD A,#30
MOV R1,#A
MOV A,#F0
SWAP A
ADD A,#30
MOV R2,A
RET
available from 40H to 4FH. Packed BCD numbers are to be stored from 50H
to 5FH.
Solution
As this problems deal with the three arrays, three different pointers are
generally expected. However, even with a single pointer it may be solved
easily as some symmetry exists in data structure of this problem.
The problem with a few sample inputs and outputs. As an example case,
may indicate that 08 to be address 30H and 02 MAY BE COPIED FROM
ADDRESS 40h. After packing these two, the packed number 82 is to be
saved in the location 50H. It may be observed that last 4 bits of all these
three addresses are identical (30H, 40H, 50H). Only MS 4 bits are
changing as 3,4, and 5. Utilizing this special cases, we may develop the
program using only one pointer, R0. The algorithm and complete program
would be as follows.
Alogorithm
Step no1: Select bank #0, load pointer by 30H and counter by 16d (10H)
Step no2: Load higher digits in the accumulator through the pointer. Shift
it to the higher nibble.
Step no 3: Change MS digit of pointer to 4.
Step no 4: Logically OR accumulator with lower digit through the pointer.
Step no 5: Change MS digit of the pointer to 5.
Step no 6: Save packed BCD number from the accumulator to its storage
location as pointed by the pointer.
Step no 7: Restore MS digit of the pointer to 3.
Step no 8: Increment the pointer by 1.
Step no 9: Decrement counter by 1. If counter is not 0 then go to step 2.
Otherwise return.
; Program to pack two arrays of unpacked BCD digits using only one
pointer (R0).
; Source address varies from 30H to 3FH for MS digits and 40H to 4FH for
LS digits.
; Destinations address for packed BCD digits varies from 50H to 5FH.
MOV A,@R0
RL
RL
RL
RL
; Now process the pointer to target the next array of same LS address
nibble.
; This is done by the following two logical operations with R0 of bank #0.
; Results are available in the directly addressed location (R0 of bank #0).
; Note that the content of the pointer R0 is changed from 3x to 4x by these
two instructions.
ANL
00H,#0FH
ORL
00H,#40H
unchanged
; insert 4 in MS nibble
; Now pointer is targeting the second array. Use the pointed number
ORL
A,@R0
; Now process the pointer to target the third array, for storage (make 4x
as 5x).
ANL
00H,#OFH
ORL
00H,#50H
; clear MS nibble.
; insert 5 in it.
; Pointer is now showing the saving location. Save the packed number
from the accumulator.
MOV
@R0,A
00H,#0FH
ORL
00H, #30H
; restore 3 in it.
; Increment pointer to target next location of the first array. Then continue
packing.
INC
higher digit
R0
DJNZ
R7, LOOP
RET
; over
MOV
MOV
PSW,#00H
R7,30H
MOV
address of the array
R0,#31H
MOV
numbers for comparison
R4,#00H
; worst maximum
MOV
R3,#0FFH
for comparison.
; The pass to find largest and smallest unsigned integers starts from here.
; To check the next integer of the array, the procedure must start from
here.
; Following five instructions check and store the maximum integers, so far.
CHKMAX:
MOV
CJNE
A,#R0
A,04H,NEXT1
CHKMIN
R4 IS GREATER
NEXT1:
current term
JC
MOV
R4,A
SJMP
NEXTNUM
; update R4 by the
greater term
; get next term
A, 03H, NEXT2
NXTNUM
R3,A
smaller term.
; Checking of one term is over. Point to the next term and loop on, if
necessary.
NXTNUM:
any
INC
DJNZ
R0
R7, LOOP
term
RET
Label
LOOP
SKIP
Mnemonic
MOV R0,#10H
MOV DPTR,#9000H
CLR C
MOVX A,@DPTR
MOV R2,A
INC DPTR
MOVX A, @DPTR
MOV R3,A
SUBB A,R3
JNC SKIP
XCH A,R2
MOVX @DPTR,A
DEC 82H
MOV A,R2
MOVX @DPTR,A
INC DPTR
DEC R0
CJNE R0,#01H,LOOP
INC DPTR
MOV A,@DPTR
LCALL 0003H
Comment
Count
Carry=0
R2=first no
Acc=second no
Compare
Exchange
Big no Emen
DPL=DPL-1
Small no Emen
A=largest no
Label
OUTLOOP
INLOOP
Mnemonic
MOV R1,#10H
MOV R0,#10H
MOV DPTR,#9000H
CLR C
MOVX A,@DPTR
MOV R2,A
INC DPTR
Comment
Outer loop count
Inner loop count
Carry=0
R2=first no
SKIP
MOVX A,@DPTR
MOV R3,A
SUBB A,R3
JNC SKIP
XCH A,R2
MOVX @DPTR,A
DEC 82H
MOV A,R2
MOV A,R2
MOVX @DPTR,A
INC DPTR
DEC R0
CJNE R0,#01H,INLOOP
DEC R1
CJNE R1,#01H,OUTLOOP
LCALL 0003H
Acc=second no
Compare
Exchange
Big no Emen
DPL=DPL-1
Small no Emen
Label
Mnemonic
MOV R0,#0A
MOV R1,#10
MOV R2,#00
MOV DPTR,#9000
MOVX A,@DPTR
CLR C
SUBB A,R1
INC DPTR
JNZ SKIP
INC R2
DJNZ R0,LOOP
LCALL 0003
Comment
Array size
Search value
Count
compare
MOV
MOV
R7,30H
MOV
R0, #31H
; load pointer
R2, #00H
; clear sum
MOV
LOOP:
PSW,#00H
MOV
ACALL
factorial, value in A
A,@R0
FACTO
; load counter
ADD
A,R2
MOV
R2,A
; save it back
INC
R0
DJNZ
R7, LOOP
any
RET
; Name:
FACTO
; Function:
; Input :
; Output :
; Calls:
PRODCT
; Uses:
A, R3, R4
FACTO:
MOV
DEC
MOV
R4,A
A
R3,A
counter
MULTI:
ACALL
MOV
DJNZ
PRODCT
R4,A
R3, MULTI
RET
; Name:
PRODCT
; Function:
Calculates the product of the two unsigned integers by
multiple additions.
; Input:
; Output:
Product available in the accumulator. R3 remains
unchanged R4 cleared.
; Calls:
None
; Uses:
A, R3,R4
PRODCT:
CLR
ADDIT:
ADD
A, R3
DJNZ
RET
R4, ADDIT
Label
Mnemonic
MOV R0,#05
MOV A,#R0
LCALL 9000
LCALL 0003
CJNE R0,#01,9005
RET
DEC R0
MOV F0,R0
MUL AB
LJMP 9000
Comment
Input number
LCALL FACT
CJNE R0,#01,LOOP
LJMP FACT
(ii) Alternate LEDS (i.e. connected to odd & even pins of port 1) to glow
for 5 sec
Program:- MOV P1,# 0AAH;
DELAY
, #55H;
LED INTERFACING
LED are available in various sizes, shapes and colours. Standard sizes are
3,5 and 8mm in diameter. Shapes are generally circular. However,
rectangular shapes are also available. Red, green, yellow, orange, blue
and white are available colours. Bicolour, tricolor, infrared and ultraviolet
LEDs rae also available. Red LEDs of 5 mm diameter are most widely used
as general-purpose indicators. As a normal practice, they are to be
It means that they must be interfaced with proper polarity and with a
resistance in series. This resistance is a current- limiting resistor, and
its value is to be calculated as per the applied voltage and current limit
of the LED. A simple LED interface is presented in figure, where port
pin P1.0 is used to drive the LED. Note that if the LED is to be turned on
by logic 0, then it may be directly connected with the port pin , which
has the capablility of sourcing of the port pin becomes a constraint. To
eliminate this problem, the port pin may use a buffer, like an inverter
gate, which would enchance the current sourcing limit.
Problem
Develop a program so that the LED interfaced with Port P1.0 blinks
continuously.
Solution
As blinking is nothing but interchanging the on and off states of the
LED, therefore, assuming equal durations of on and off states, the
following routine may be used.
; Blinking LED.
BLINK:
the LED
CPL
P1.0
ACALL
DELAY
SJMP
BLINK
; Delay subroutine
DELAY:
MOV
R7,#04H
DELAY1:
MOV
R6,#00H
DELAY2:
MOV
R5,#00H
DELAY3:
DJNZ
R5,DELAY3
DJNZ
DJNZ
R6,DELAY2
R7, DELAY1
RET
Problem
Two keys and one LED are interfaced with 8051 . Develop a software so
that K1 would turn the LED on and K2 would turn it off.
Solution
As it may be observed keys K1 and K2 are interfaced with Port pins
P3.0 and P3.1, respectively, while the LED is interfaced with Port pin
P3.7. Moreover, as per the problem definition, K1 would turn on the LED
while K2 would turn it off. This may be achieved by the following
subroutine.
; LED control with two keys.
; First instruction is for initialization.
LEDONF:
inputs
RDKEY:
ORL
MOV
A,P3
RRC
; to check K1
JC
NEXT1
; K1 not active
CLR
P3.7
SJMP
NEXT1:
P3,#83H
RRC
JC
; to read keys
RDKEY
; to check K2
RDKEY
keys
SETB
P3.7
SJMP
RDKEY
(ii)
For the first case, the Counter of the Timer counts the processor clock
pulses. In other words, it uses the processors own oscillatory circuit. If
the mechanism is functioning in this manner, it is designated as a Timer,
the aim of which is to generate a programmable time delay. In the second
case, the same Counter counts the number of pulses of some external
signal. Note that this external signal may or may not be periodic in nature.
When the unit functions in such a manner, it is called a Counter.
Both Timers of 8051 may function as Counter also. Whether they would
function as Timer or Counter, is a factor which is programmable C/ bits of
TMOD SFR.
8051/8052 Timers
8051 offers two independent 16- bit count-up Timers designated as Timers
designated as Timers designated as Timer 0 and Timer1. The functions of
these two Timers are more or less identical with some minor variations. A
third Timer, designated as Timer 2, is available in higher versions of 8051 ,
like 8052. The function of Timer 2 is widely different from that of the other
two Timers and demands separate. Timers 0 and 1 at present. After
completion, we will take up Timer2. However, for a quick reference, the
salient features of all three Timers are presented in Table
Salient features of 8051/52 Timers
Timer
s
Timer
0
Vector
address
000BH
Modes
Related SFSs
TCON-control operations
1-16-bit Timer/Counter
2-8-bit auto-reload
3-dual 8-bit Timers
Timer
1
001BH
0-13-bit Timer/Counter
1-16-bit Timer/Counter
2-8-bit auto-reload
Timer
2
002BH
16-bit auto-reload
16-bit Capture
Baud-rate generator
TMOD
SFR TMOD is meant for configuring both Timer0 and Timer 1. Its lower 4
bits (0-3) controls Timer 0, and the upper 4 bits (4-7) controls Timer1. Bit
assignments of both sets are identical, i.e., both bit 0 and bit 4 are
designed as MO and so on.
Reg TMOD
(MSB)
7
3
Direct
address 89H
1
Gate
C/
M1
MO
Gate
C/
M1
MO
| -----------------
MI MO MODE
0
13-bit Timer/Counter
16-bit Timer/Counter
8- bit Auto-Reload
only)
C/ 0-Act as a Timer
1-Act as a Counter
Gate OR gate enable bit (see text)
Figure:
For both Timer 0 and 1, the bits, designated as Gate, enable or disable
the corresponding OR gate. Similarly, the function of C/ bit, responsible
for selecting the function as either Timer or Counter. In either case, bits
designated as M0 and M1 finalize the mode of operation of these Timers,
which may vary from 0 to 3 for Timer 0 and 0 to 2 for Timer 1.