Pavitra Jinaga

Email: pavitrajinaga@gmail.com | Mobile : +91 9703896141

Education:

Master in Science Degree in VLSI (July 2011 - July 2013)

Aggregate : 85.5% (Rank 1)
Veda Institute of Information Technology, Hyderabad, India
Related Course work: Advanced digital design, Hardware design and simulation using Verilog,
VLSI Verification Methodologies using System Verilog, Processor Architecture, Shell and
Scripting languages, Interface Protocols and Controllers, ASIC/FPGA Synthesis and DFT, VLSI
Physical design

Bachelor in Technology Degree in Electronics and Telematics (July 2011)

G.Narayanamma Institute of Technology and Science, Hyderabad, India

Aggregate : 79.8%

Technical Skills:
Hardware Description Languages:
Scripting Languages:
Protocols:
Software Languages:
Software Tools:
Operating Systems:
Hardware:

Verilog, VHDL, System Verilog

Perl, Tcl/Tk
AMBA AHB, APB, AXI, PCI, I2C
C, C++, Assembly language programming
Cadence Encounter, NC-Verilog, Simvision, Design Compiler,
OrCAD, Concept HDL, Keil Vision3, Lattice Diamond, Quartus II
WindowsXP/Vista/7, Linux
8085, 8086, LPC2294 (ARM Core), 8051, AT89C51ED2,
CY37256P160, Actel A3P250-PQG208, MachXO2 Lattice CPLD

Work Experience:

Hardware Engineer 1, Artesyn Embedded Technologies, Hyderabad

March 2014 Present
- RTL design and verification of CPLD glue logic for the PCIE cards
- Developed a custom made protocol, clock speed independent management interface
between PLX switch and the CPLD that is being used as a proprietary interface in the
company
- Developed Glue logic combining the custom made interface, I2C, SPI through Wishbone
interface
- Actively participated in Bring up and post bring up testing activity such as DVT

Internship at Caravel Info Systems Pvt. Ltd., Bangalore

- Design of PCM Decommutator System

Internship at Caravel Info Systems Pvt. Ltd., Bangalore

- Firmware Programming on ARM controllers (LPC 2294)
- Hardware Design using ORCAD
- System Design Using CY37256P160 (CPLD)

December 2010 - March 2011

May 2010 - July 2010

Training at National Ubiquitous Computing Research Resource Centre, C-DAC, Hyderabad

Mentor: Mahesh Uttam Patil, C-DAC
June 2009 - July 2009
- System Design using FPGA
- Firmware Programming on AVR Series of Microcontrollers.

Projects:

SharpCaster PCIE-8205
Designed Glue logic for the PCIE-8205 card. Designed and developed a custom made, clock
speed independent management interface between hardware and software. Designed,
implemented and verified the control logic for data exchange between interfaces like I2C and
SPI using wishbone interface.

SharpStreamer Pro
Contributed in the schematics design of the board. Developing Glue logic.

Ethernet Ring

Implementation of FRS/PRP IP in Altera FPGA along with NIOS II soft processor.

Involved in the architectural phase of the project.

Design of AXI 4.0 Interface for an L3 cache controller (Masters thesis) July 2012 - July 2013
Mentor: Srinivasa Gutta, Director, Soctronics Pvt. Ltd.
Designed AXI 4.0 Interface between four processors and L3 cache controller (as Slaves) and
between the L3 cache controller and a dual port main memory (as Masters). The design has
been implemented in Verilog and basic verification has been done using System Verilog.

Design of Cache Controller

Designed a 4-way set associative cache controller with Write Back policy and LRU replacement
policy in verilog and verified using System Verilog.

PCM Decommutator System (Bachelors Project)

December 2010 - March 2011
Implemented the Design of PCM Decommutator System in VHDL on FPGA (A3P250-PQG208)
and developed the required PCB for practical verification.

Awards and Publications:

To receive Invention Disclosure Award for developing Artesyn Management Interface

Protocol from Artesyn Embedded Technologies.
Published a paper on Bandwidth Efficient Remote Data Acquisition over Internet, at
International Conference on Mobile Internet Devices, 2010.
Awarded Young Promising Engineer Award for the year 2010 by ISTE - Students' Chapter,
G.Narayanamma Institute of Technology and Science for Electronics and Telematics Engineering
branch.

Professional Affiliations & Activities:

Volunteer at the International Conference on VLSI and Embedded Systems 2012

Member of ISTE student chapter for 2007-11 at G. Narayanamma Institute Technology and
Science
Member of IEEE student chapter for 2007-11 at G. Narayanamma Institute Technology and
Science
Member of NSS-Sahaya, a Social Welfare group at G. Narayanamma Institute Technology and
Science