1. The roles of function and Task are to?

A. hide some variables.

B. repeatedly involked within the module.
C. facilitates debugging and reorganization.
D. ALL of the above
ANSWER: D

2. which one of the statement is correct with respect to a function in verilog?

A. The function can return a real or integer data type.
B. variables declared within a function can be available outside the function.
C. A function must have atleast more than one input.
D. a function can't call another function.
ANSWER: A

3. what is the difference between a function and task?

A. The scope and role of functions are wider than those of tasks.
B. function can be recursive but task can not.
C. both task and function can have input, output, inout.
D. function can return more than one value, whereas a task can return only one
value.
ANSWER: D

4. The system task $finish?

A. Makes the simulator exit and return control back to the OS
B. Causes the simulation to suspend.
C. Causes the simulator to insert a breakpoint interrupt
D. none of the above

ANSWER: A

5. The advantage of ASM chart with respect to state diagram is to?

A. provides flexibility of converting into equivalent forms, and each form lead
directly hardware description.
B. provides less number of states.
C. mimimize the hardware
D. easy to debug.
ANSWER: A

6. In `timescale 1ms/100 us, 3.022 is interpreted as?

A. 3.022 ms
B. 3 ms
C. 3.1 ms
D. 30.22 ms
ANSWER: B

7. In timescale 10ms/100us, 3.199 is interpreted as?

A. 31.9 ms
B. 3.199 ms
C. 31.99 ms
D. 3.1 ms
ANSWER: A

8. The system function $fopen is used for?

A. opening directory
B. opening file

C. writing to into a file

D. reading from a file.
ANSWER: B

9. The system function $fopen return?

A. an integer pointer
B. null
C. file name
D. a vector
ANSWER: A

10.The system task $readmemb?

A. reads data from a memory and load the data into a file
B. reads data from a text file and load the data into memory
C. reads data from a memory and load the data into other memory
D. invalid system task
ANSWER: B

11.The system task call $timeformat(units_number, precision, suffix,

numeric_field_width) if the units_number is -4, what is the precision of the
simulation time?
A. 1 sec
B. 100 msec
C. 10 msec
D. 100 US
ANSWER: D

12.The define directive is used for ?

A. macro substitution
B. debugging purpose
C. specifying time scale
D. none
ANSWER: A

13.Which of the statement is not correct with respect to moore machine?

A. Next state of the output is decided fully by the present state.
B. Next state of the output is decided fully by the present state and present inputs.
C. all the changes in the output are brought about only at the actve edge of the
clock.
D. It is inherently synchronous.
ANSWER: B

14.The primitives available in verilog are___?

A. Gate type
B. Switch type
C. Both
D. None
ANSWER: C

15.The type of declaration not supported by user defined primitive?

A. Input type
B. Inout type
C. Output type
D. All the above

ANSWER: B

16.In user defined primitive, program starts with___?

A. Entity
B. Module
C. Architecture
D. Primitive
ANSWER: D

17.Number of output ports present in user defined primitive program?

A. One
B. Two
C. Four
D. Many
ANSWER: A

18.Which signal value is not defined as the output of user defined primitive
program?
A. 1
B. z
C. x
D. 0
ANSWER: B

19.The symbol "?" in user defined primitives represent?

A. 0 and 1
B. 1 and x

C. 0,1 and x
D. x and 0
ANSWER: C

20.The behaviour block of primitive is given in between__?

A. table and endtable
B. entity and endentity
C. module and endmodule
D. All
ANSWER: A

21.A level sensitive sequential user defined primitive____?

A. T latch
B. D flipflop
C. T flipflop
D. D latch
ANSWER: D

22.User defined primitives are basically___?

A. Combinational
B. Sequential
C. Both
D. None
ANSWER: C

23.A function can be defined___?

A. Outside module
B. Inside module
C. Anywhere in the module
D. None of these
ANSWER: C

24.Synchronous sequential circuits are called____?

A. State machines
B. Simple machines
C. Sequential machines
D. Synchronous machines
ANSWER: A

25.State machines mainly uses___?

A. only latches
B. Only flipflops
C. Flipflops and latches
D. None of the above
ANSWER: C

26.If FSM is carried out properly it forms?

A. Infinite & logical representation
B. Optimal & logical representation
C. Optimal & compact representation
D. Optimal & large representation
ANSWER: C

27.Next state or the output is decided _______ by present state in moore model?
A. Partially
B. Fully
C. Doesnt effect
D. None of the above
ANSWER: B

28.Swapping of two numbers can be possible without using temporary register

by ______statement of verilog?
A. concurrent
B. Non blocking
C. blocking
D. None of the above
ANSWER: B

29.Parameters are _____________________?

A. constant timing values
B. ranges of variables
C. wires
D. all of the above
ANSWER: D

30.Parameter assignment is made through the keyword_________ and whose

value which cannot be overridden.
A. defparam
B. pecparam

C. localparam
D. all of the above
ANSWER: C

31.The design description at the behavioral level is done through a sequence of

________?
A. continuous assigntments
B. procedural assignments
C. gate instantiation statements
D. UDP
ANSWER: B

32.If multiple $monitor tasks are present in the routine which one willbe active ?
A. only first one
B. all will be ctive
C. only last one
D. none of the above
ANSWER: C

33.Which of the following is a "posedge" transition?

A. 1 to 0
B. 1 to x or z
C. x or z to 0
D. x or z to 1
ANSWER: D

34.Which of the following is a "negedge" transition?

A. 0 to 1
B. 1 to x or z
C. 0 to x or z
D. x or z to 1
ANSWER: B

35.The syntax of "wait construct" is____?

A. wait (alpha) assignment1;
B. wait LHS target=RHS expression;
C. both a and b
D. none of the above
ANSWER: A

36.When designs are spread out in two or more always blocks they are
necessarily?
A. sequential
B. concurrent
C. Continuous
D. none of the above
ANSWER: B

37.The symbol or combination _______ specifies path from source to destination?

A. "greaterthan"
B. "*"
C. "pipe"
D. "*greaterthan"
ANSWER: D

38.The alternations can be brought about through assignments made

with______?
A. specparam
B. defparam
C. localparam
D. Nonlocalparam
ANSWER: B

39.A "$" sign preceeding a word or aword group signifies a________?

A. system task
B. systemfunction
C. both
D. none
ANSWER: C

40.An escape sequence starts with character________?

A. %
B. *
C. $
D. ^
ANSWER: A

41.The form of specifying arguments is identical to that of the__________?

A. display task
B. system task

C. monitor task
D. define task
ANSWER: A

42.only one___________ task can be active at any time?

A. real time task
B. $stime task
C. $time task
D. monitor task
ANSWER: D

43.All compiler directives are preceded by the_______?

A. "*"
B. "$"
C. "'"
D. "^"
ANSWER C

44.The syntax for $timeformat is________?

A. $timeformat(-aa, bb, "cc", dd);
B. $timeformat(-a, b, c, d);
C. $timeformat(-a, b,"c",d);
D. $timeformat(a, "-b", c, d);
ANSWER: A

45.The output of next state of melay circuit depends on________________?

A. present state
B. inputs and present state
C. inputs
D. none of the above
ANSWER: B

46.In classical method if the no. of bits in the system is n then no. of flipflops
used should be_____?
A. n
B. 2powern
C. n*n
D. n+1
ANSWER: A

47.A FSM is the most basic form of describing a_____________?

A. digital system
B. analog system
C. logical system
D. desrete system
ANSWER: A

48.If the system is three bit, then thec lassical method requires 3 flipflops,while
1 flipflop per state requires______flipflops?
A. 5
B. 6
C. 3
D. 8

ANSWER: D

49.what is the definition of perameter override with example?

A. count less than or equal to count + 1;
B. default: y = a;
C. defparam Reg.N = 16
D. param Reg.N =15
ANSWER: C

50.posedge clk1 or posedge clk2: means?

A. execute the block following if clk1 goes to 1 state or clk2 goes to 1 state.
B. execute the block following if clk1goes to 1 state or clk2 changes state (whether
0 to 1 or 1 to 0).
C. execute the block following if clk1 goes to 0 state or clk2 goes to 0 state.
D. execute the block following if clk1goes to 0 state or clk2 changes state (whether
0 to 1 or 1 to 0).
ANSWER: A

51.Melay machine output depends on?

A. only input
B. only present state
C. only on next state
D. input and present state
ANSWER: D

52.When the "function" is said to be recursive?

A. using repeat keyword

B. using automatic keyword

C. using return keyword
D. none of these
ANSWER: B

53.User Defined Primitives(UDP) are ______ types

A. digital and discrete
B. anolog and digital
C. combinational and sequential
D. both A and B
ANSWER: C

54.Whenever parameter value is overridden during instantiation type,

signed/unsigned, remain
A.
B.
C.
D.

Is overridden
Changed
Unchanged
Partially changed

ANSWER: D

55. Difference between $display and $write tasks

A. Displays the arguments in the desired format and advances to new line where
as other not.
B. Only Displays the arguments in the desired format
C. Only advances to new line
D. Both advances to new line
ANSWER: A

56.______ and _______ can easily be derived by tracking link paths on an SM

chart.
A. Differential equations and logical equations
B. Logical and quadratic equations

C. PLA tables and logic equations

D. Conditional and sequential
ANSWER: C

57.State box contains

A. A state name, slash, optional output list
B. Conditional and input list
C. Conditional output box, a state name
D. Decision box, list and output list
ANSWER: A
58.How to reduce size of PLA
A. By Substituting input values of each state
B. By transforming SM chart into input of each state
C. Both A and B
D. None of these
ANSWER: B
59.