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/TCHAPGA TCHITO
So on an so forth,
In order to get an application work, you must
know specifically the function, input and
output requirements of the particular
integrated circuit.
Structure
CPU : Central Processing Unit
Oscillator
/Clock
CONTROL
UNIT
Order/command
data
register
ALU :
Transfer
Output /
Input
Arithmetic
and Logic
Unit
UNIT
UNIT
CENTRAL
MEMORY
Peripherals,
sensors,
Mass
memory,
Memory
BUS
INPUT /
OUTPUT
peripheral
MICROPROCESSOR
Apart from in the most minimal of circuits, some RAM is needed. Even
if the microprocessor-based system is controlling an oven, we still need
the facility to vary the instructions to change the temperature, the time
cycle, the fan speed etc., so some RAM must be added.
Some microprocessors have a small amount of RAM included internally,
enough for this sort of system to work but still quite limited.
If we add some external RAM, the microprocessor is controlling the
operation of three chips: ROM, RAM and I/O.
To control the flow of information it needs to send chip select and
read/write information along the control bus.
Read/write signals tell the RAM and the I/O chip whether they have to
read, i.e. accept information from the data bus or to write information
onto the data bus.
The 8085 has extensions to support new interrupts, with three maskable
interrupts (RST 7.5, RST 6.5 and RST 5.5), one non-maskable interrupt
(TRAP), and one externally serviced interrupt (INTR). The RST n.5
interrupts refer to actual pins on the processor, a feature which
permitted simple systems to avoid the cost of a separate interrupt
controller.
Like the 8080, the 8085 can accommodate slower memories through
externally generated wait states (pin 35, READY), and has provisions for
Direct Memory Access (DMA) using HOLD and HLDA signals (pins 39 and
38). An improvement over the 8080 was that the 8085 can itself drive a
piezoelectric crystal directly connected to it, and a built in clock
generator generates the internal high amplitude two-phase clock signals
at half the crystal frequency (a 6.14 MHz crystal would yield a 3.07 MHz
clock, for instance).
The 8085 is a binary compatible follow up on the 8080, using the same
basic instruction set as the 8080. Only a few minor instructions were
new to the 8085 above the 8080 set.
MVI B, 06
//Load Register B with the Hex value 06
MOV A, B
//Move the value in B to the Accumulator or register A
MVI C, 07
//Load the Register C with the second number 07
ADD C
//Add the content of the Accumulator to the Register C
STA 8200
//Store the output at a memory location e.g. 8200
HLT
//Stop the program execution
LDA 8500
//Load the accumulator with the address of memory viz
8500
MOV B, A
Move the accumulator value to the register B
LDA 8501
//Load the accumulator with the address of memory viz
8501
ADD B
//Add the content of the Accumulator to the Register B
STA 8502
//Store the output at a memory location e.g. 8502
HLT
//Stop the program execution
LDA 8500
//Load the accumulator with the address of memory viz 8500
MOV B, A
Move the accumulator value to the register B
LDA 8501
//Load the accumulator with the address of memory viz 8501
ADD B
//Add the content of the Accumulator to the Register B
STA 8502
//Store the output at a memory location e.g. 8502
MVI A, 00
//clear the accumulator with 00
ADC A
//Add with carry the content of the accumulator
STA 8503
//Store the output at a memory location e.g. 8503
HLT
//Stop the program execution
m-processor
Address
8080
16
8085
16
8086
19
16
1 Mo
4,77 MHz
80286
23
16
16 Mo
6 MHz
80386
30
32
4 Go
16 MHz
80486
30
32
4 Go
33 MHz
Pentium
30
32
4 Go
60 MHz
Pentium Pro
30
64
4 Go
200 MHz
Pentium II
30
64
4 Go
300 MHz
Pentium III
30
64
4 Go
400 MHz
Pentium IV
30
64 (x2)
4 Go
3+ GHz
Data
Memory
Frequency
3.5 and 6
MHz