ESE-2016 : TEST SERIES

EE

UPSC Engineering Services Examination

Detailed Solutions
1.

Test 19 : Conventional
Full Syllabus Paper - 2

(a)
Current,

150 103
= 340.909 36.87 A
I1 =

440

150 103
= 652.174 53.13 A
and current, I 2 =
230

Current in h.v. side due to I1 (i.e. to balance the mmf)

r

I1 340.909 36.87
I1 =
=
a1
6600

440

I1 = 22.727 36.87 A

Current in h.v. side due to I 2 (i.e. to balance the mmf)

I
I 2 = 2

a2

6600

a =

2
230

652.174 53.13
6600

230

I 2 = 22.727 53.13 A
So, primary current in h.v. side

r r
I = I1 + I2 = 22.727 36.87 + 22.727 53.13
= 44.997 45 A

OFFLINE
MODE

2
1.

ELECTRICAL ENGINEERING

(b)

y12 =

1
1
=
= 1.66 j 5
z12
0.06 + j 0.18

y13 =

1
1
=
= 3.33 j10
z13
0.03 + j 0.09

y23 =

1
1
=
= 1.25 j 3.75
z 23
0.08 + j 0.24

Y11
Y22
Y33
Y12
Y23
Y13

y12 + y13 = 1.66 j5 + 3.33 j10 = 5 j15

y12 + y23 = 1.66 j5 + 1.25 j3.75 = 2.91 j8.75
y23 + y13 = 1.25 j3.75 + 3.33 j10 = 4.58 j13.75
y12 = 1.66 + j 5 = Y21
( Ybus is symmetrical)
y23 = 1.25 + j 3.75 = Y32
y13 = 3.33 + j10 = Y31

Ybus

1.

ESE-2016 : TEST SERIES

=
=
=
=
=
=

1.66 + j 5
3.33 + j10
5 j15

= 1.66 + j 5
2.91 j 8.75 1.25 + j 3.75

3.33 + j10 1.25 + j 3.75 4.58 j13.75

(c)
The resultant circuit is shown in Fig. (a). Comparing the circuits of figure given in question and Fig. (a),
it is clear that the output voltage alongwith the conducting states of the diodes can be obtained in the
present case by simply replacing VS2 by VS2 in results of the clipper circuit of figure given in question.
Input
Conducting states of D1 and D 2
Output

vi < (VS2 V ) = 2.3 V

2

(VS2 V ) < vi < (VS1 + V )

2

D1 OFF and D2 ON

vo = 2.3 V

D1 OFF and D2 OFF

vo = vi

D1 ON and D2 OFF

vo = 3.65 V

i.e. 1.7 V < vi < 3.65 V

vi > (VS1 + V ) = 3.65 V

1

where we have used Vs1 = 3 V , VS2 = 2 V, V = 0.65 V, V = 0.3 V in the above calculations given
1
2
earlier. The output waveform corresponding to the sinusoidal input is illustrated in Fig. (b) where

3.65
1 = sin1
= 0.818 rad, 2 = 1 = 2.323 rad, 3 = 3.61 rad and 4 = 5.80 rad
5
3 k
+

vi

D1

D2

VS1 = 3 V

vo
VS2 = 2 V

(a)

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Test - 19 (Conventional) : Full Syllabus Paper - 2

vi (V)
5
3.65

2
= t (rad)

vo (V)
3.65

2
= t (rad)

2.3
(b)

1.

(d)
(i) Buffer:
0

2:1
MUX

Y = Output = A
(ii) NOT gate/Invertor:
As we know,

(iii) AND gate:

For AND operation

Y = S0 I0 + S0 I1

Y = A I 0 + A I1

Y = A For NOT gate

1
2:1
MUX

I0 = 1 and I1 = 0

Y = AB
Y = S0 I0 + S0 I1
Logic
B

Control (A)

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ESE-2016 : TEST SERIES

for,

ELECTRICAL ENGINEERING

A = 0 : Y = 0 = I0

for

(iv)

A = 1 : Y = 0 = I1

Y = A 0 + AB = AB

1
2:1
MUX

So,
I0 = 0 and I1 = B
OR gate:
For OR operation
Y=A+B

for,
A = 0 : Y = B = I0
for
A = 1 : Y = 1 = I1
Therefore,

A
B

Control (A)

Y = S0 I0 + S0 I1

(v)

So,
Ex-OR gate:
For Ex-OR operation

Y = A I 0 + A I1

Y = A B + A 1 = A + B
I0 = B and I1 = 1

1
2:1
MUX

Y = A B = A B + A B and Y = S0 I0 + S0 I1 = A I 0 + A I1
B
B

2:1
MUX

0
A

I0 = B and I1 = B

Number of MUX required = 2 (becasue to obtain B another MUX is required)

1.

(e)
The Foster-Seeley circuit is also known as phase-shift discriminator circuit. It makes the use of frequency
sensitive nature of series resonant circuit and provides a frequency dependent phase shifting of the
modulated circuit. It comprises of an inductively coupled doubled-tuned circuit in which both primary and
secondary are tuned to same frequency i.e. intermediate frequency. Centre of the secondary coil is
connected to the top of primary through a capacitor C .
This C has following functions,
It blocks the d.c. from primary to secondary.
It couples the signal frequency from primary to centre tapped of secondary.

Principle of Operation

Eventhough the primary and secondary tuned circuits are tuned to the same center frequency, the
voltages applied to the two diodes D1 and D2 are not constant.

They vary depending on the frequency of the input signal. This is due to the change in phase shift
between the primary and secondary windings depending on the input frequency.

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Test - 19 (Conventional) : Full Syllabus Paper - 2

At fin = fc, the phase of the individual output voltages of the two diodes will be equal and opposite.
The output voltage is zero as,
V0 = V01 V02

For fin > fc the phase shift between the primary and secondary windings is such that the output of D1
is higher than D2. Hence the output voltage will be positive.

For fin > fc, the phase shift is such that output of D2 is higher than that of D1 making the output
voltage negative.

The output is dependent on the primary-secondary phase relationship, so this circuit is called as
phase discriminator.
D1
C
CP

V3

V1

CS

Va1

V3

Lp

+
V2

RFC

Output
V0 = |V02| |V01|

V3
Va

V02

Va2

VR

Va

V01

D2

V1

Va

V3

V2

Va

V1

Va

V2
2

V1

V3
Va

V2
2

(Phasor diagram)

The radio frequency voltages Va1 and Va2 applied to the diodes D1 and D2 are expressed as:

Va1 = V3 + V1
Va2 = V3 V2

and

Advantages

It is most linear.
Alignment is easy.
There is no tuning problem.

Disadvantages:

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Any variation in amplitude of the input FM signal due to noise modifies the discriminator characteristics.
This distortion is removed using a limiter circuit in the FM receiver.

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6
1.

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

(f)
The average value of current can be obtained by the ratio of area under the curve to the total time period.
In the given waveform,
I
10 A

15 20

30

t in sec

1 1

Iavg = 30 2 5 10 + (10 10) + 2 5 10

Iavg =
1.

150
=5A
30

(g)
MVI

A, B5 H

[A] = 1 0 1 1 0 1 0 1

MVI

B, 0E H

[B] = 0 0 0 0 1 1 1 0

XRI

69 H

1011 0101
0110 1001

ADD

ANI

9B H

1101 1100
+0000 1110
11101010
1001 1011
1 0 0 0 1 0 1 0 = 8A H

CPI

9F H

8A 9F

As, 8A < 9F So, CY = 1 and Z = 0

Note well that CPI instruction compares the immediate data with accumulator by subtracting it from accumulator
and however the content of accumulator remains unaffected.
2.

(a)
Given that :
No load current,
No load input power,
No load voltage,

I0 = 0.18 A
Poc = 40 W
Voc = 2200 V

No load resistance,

Rc =

No load reactance,

Rc
X = tan
0

2
Voc
(2200)2
=
= 121 k
Poc
40

No load power factor,

cos0 =

Poc
40
=
Voc Io 2200 0.18

0 = 84.2026
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Test - 19 (Conventional) : Full Syllabus Paper - 2

X =

Zsc (HV) =

cos =

Where,

121 10 3
= 12.285 k
tan(84.2026)

Isc = 5 A
Vsc = 45 V

and, short circuit current,

Short circuit voltage,
So,

45
= 9
5
120
45 5

= 57.759

Zeq (HV) = 957.76

So

or Zeq (LV) =

9
= 0.09 57.76
a2

Irated at full load, 0.8 pf lag.

I=

10 103
36.8 (LV)
220

= 45.4536.8 (LV)
So Vinput (referred to LV)

Vi = 2000 + (25.4536.86) (0.09) (57.76)

Vi = 203.820.41
(i)

%VR =

203.82 200
100%
200

%VR = 1.91%
Output on 75% of full load at 0.85 p.f. lagging
= Rated kVA 0.75 p.f.
= 10 0.75 0.85 = 6.375 kW
Iron loss,
Pi = 40 W
2

Full load copper loss,

I
Pcu = 1 Psc
Isc

I1 =

10 103
= 4.545 A
2200
2

4.545
Pcu =
120 = 99.1537 Watts
5

Copper loss at 75% of full load = x2Pcu

= (0.75)2 99.1537 = 55.774 watts

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ESE-2016 : TEST SERIES

(ii)

ELECTRICAL ENGINEERING

Transformer efficiency,
=

output
output + Pi + x2Pcu

100

6375
100
6375 + 40 + 55.774

= 98.52%
kVA corresponding to maximum efficiency
= x Rated kVA
Pi
=
Pcu

x=

40
= 0.635
99.1537

= x Rated kVA = 0.635 10 = 6.35 kVA

Maximum efficiency =

output
100
output + 2Pi

Assuming p.f. is unity

output = 6.35 103 1 = 6350 watts
6350
100
6350 + 2 40
= 98.755%

max =

2.

(b)

Assume armature current Ia as reference

Ia =

20 10 6
= 1.4579 0 kA
3 11 10 3 0.72

r
11 10 3
cos 1 (0.72 ) = 6.35085 43.945 kV
V =
3
r
r
r
E = V + j Ia X s
r
r
Ef 2 = 1.5Ef 1
1.5

Ef

j Ia Xs

Ia

11 10 3
11 10 3
=
43.945 + j 1.4579 10 3 X s
3
3
16.5 = 1143.945 + j1.4579 3 Xs
16.5 = 1143.945 + j 2.525 X s
16.5 = (11 cos 43.945) + j (11 sin 43.945 + 2.525 Xs)

Squaring and equating magnitude

(16.5)2 = (7.92)2 + (7.6336 + 2.525 Xs)2
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Test - 19 (Conventional) : Full Syllabus Paper - 2

(14.4749)2 = (7.336 + 2.525 Xs)2

Xs =

14.4749 7.6336
= 2.7094
2.525

Before increasing excitation

Pe =
20 106 =

Ef V
sin
Xs

11 11 103 103
sin
2.7094

= sin1 (0.4478) = 26.603

Load angle,

11
11
r
r
10 3 26.603
10 3 0
Ef V
3
3
=
Ia =
jX s
j 2.7094

r
( V as reference)

Armature current,
Power factor,

Reactive power,

Ia = 1078.596 13.3 A
Ia = 1078.596 A
cos = cos 13.3 = 0.97317 (leading)
11
10 3
11
V
11

Q=
(E cos V ) = 3
10 3 cos 26.603
10 3

2.7094 3
Xs
3

Q = 1.576 MVAR
i.e. before increasing excitation
Machine operate at leading p.f. and delivered leading VAR
2.

(c)
Rated phase e.m.f. =

11000
= 6350.8 V
3

Let the fault occurs on phase a.

Total impedance per phase upto the far end of the feeder to different sequence currents are:

Za0 = j0.4 + j3.0 = j3.4

Za1 = j1.2 + j1.0 = j 2.2
For L-G fault,

Za2 = j0.9 + j1.0 = j1.9

Ia0 = Ia1 = Ia2
=

Fault current,

Vf
6350.8
=
= j 846.77 A
Z a0 + Z a1 + Z a2
j 3.4 + j 2.2 + j1.9

If = Ia = 3Ia0 = j(3 846.77) = j2540.3 A

The voltage to neutral of the faulty phase of the generator is

Va = Ea (Zga0 Ia0 + Zga1 Ia1 + Zga2 Ia2) = Ea Ia0 (Zga0 + Zga1 + Zga2)
= 6350.8 (j846.77)(j0.4 + j1.2 + j0.9) = 6350.8 2116.9 = 4233.9 V

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10
3.

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

(a)
The power-angle curves are:
Pe
A

Pmax 1
Pmax 3
Ps

q e

A1

Pmax 2

C
A2

d
c

b
g

Here,

q 1 = c

m
2 = m

Pmax1 = Pmax
Pmax2 =

1
P
= 0.333Pmax
3 max

Pmax3 = 0.8 Pmax

Ps = 0.6 Pmax
The below equation is used to determine c (critital clearing angle)
cosc =

Ps (m 0 ) Pmax 2 cos 0 + Pmax 3 cos m

Pmax 3 Pmax 2

The initial load angle 0 is determined from the prefault curve A. For curve A,

Pe1 = Pmax1 sin0

At operating point a on curve A,

Pe1 = 0.6 Pmax,

= 0

0.6 Pmax = Pmax sin 0

sin 0 = 0.6
0 = 36.87 = 0.6435 rad
cos 0 = 0.8

The load angle q is obtained from curve C. For curve C,

Pe3 = Pmax3 sin

At point q on curve C,

Pe3 = 0.6 Pmax, = q

0.6 Pmax = 0.8 Pmax sin q

sinq =

0.6
, q = 48.59
0.8

m = 180 48.59 = 131.41 = 2.2935 rad

cosm = 0.6614
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Test - 19 (Conventional) : Full Syllabus Paper - 2

11

Substituting various values in below equation, we get

1
cosc = [0.6 Pmax (2.2935 0.6435) 0.3333 Pmax 0.8 + 0.8 Pmax (0.6614)] (0.8P
max 0.3333 Pmax )

1
(0.99 0.2667 0.5291) = 0.4161
0.4667

The critical clearing angle,

c = 65.41
3.

(b)
The phase voltage at the receiving end,

Vrp =

132 10 3
= 76210 V
3

Taking Vrp as the reference phasor,

r
Vrp = 762100 = (76210 + j0) Volts
Pr =
50 106 =
Ir =

3Vr l Ir l cos r
3 132 103 Ir 0.8
50 10 6
= 273.3 A
3 132 10 3 0.8

Ir = Ir r = 273.3cos1 0.8 = 273.336.87 A

When the two transmission lines are connected in parallel

A=

A1B2 + A2 B1
;
B1 + B2

B=

B1B2
B1 + B2

A1B2 + A2B1 = (0.970.6) (5076) + (0.970.4) (6070)

= 30.76 + j102 = 106.5473.22

B1 + B2 = 6070 + 5076
= 32.616 + j104.89 = 109.8472.727

B1B2 = (6070) (5076) = 3000146

A=

106.54 73.22
= 0.96990.493
109.84 72.727

B=

3000 146
= 27.3173.273
109.84 72.727

r
r
r
Vs l = AVrp + BIr
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12

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

= (0.96990.493) (762100) + (27.3173.273) (273.336.87)

= 79920.7 + j5065.5 = 800813.626 V
Line voltage at the sending end,
r
Vs l =

r
3 Vsp= 3 80081 = 138704 V

= 138.704 kV
3.

(c)
Given that :
Stand still motor impedance,
r
Z m = (0.5 + j 5) + (8 + j 3) = (8.5 + j 8)
= 11.6726 43.2643
(i) Rotor current at stand still with rheostat in the circuit,
r
E
(90 / 3 )0
I2 = r =
Z 11.6726 43.2643

= 4.4516 43.2643 A
i.e. Rotor current is 4.4516 A lagging behind induced emf by an angle 43.2643
(ii) Rotor current at slip 3%

I2

I2

r
r
s E2
s E2
r
=
=
(R2 + jsX 2 )
Z
r
(90 / 3 ) 0
E2
=
=
R2

0.5

+ j 5
+ jX 2
0.03

I 2 = 2.9862 16.699 A
i.e. Rotor current, when the slip rings are short circuited and motor is runing with a slip of 3% is 2.9862 A
lagging behind induced emf by an angle of 16.699.
4.

(a)
Given that :
Ratio of pole arc to pole pitch = 0.7
pole pitch =

Pole shoe diameter

No. of pole

pole shoe arc = pole pitch

0.35

= 0.2748 m

pole arc
pole pitch

= 0.2748 0.7 = 0.19236 m

Axial length = length of pole shoe = 0.2 m

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Test - 19 (Conventional) : Full Syllabus Paper - 2

13

Area of pole face = pole shoe arc axial length

= 0.19236 0.2 = 0.038472 m2
Mean flux density =
Number of parallel paths,

A= P=4

Induced emf,

Eg = Z
=
mean flux density =

4.

Flux per pole

Area of pole face
(armature is lap wound)

N P

60 A

250 60
= 0.020833 Wb
600 1200
0.020833
= 0.54152 Wb/ m2
0.038472

(b)
The receiving-end kVA per phase =

Phase voltage at the receiving end,Vrp =

15000
= 5000
3

1
1
Vr l =
33 103 = 19052 V
3
3

Irp = current per phase at the receiving end

Let

Vrp Irp
1000

= receiving-end kVA per phase

Irp =

1000 5000
= 262.43 A
19502

Let Vrp be taken as reference phasor.

r
Vrp = Vrp0 = Vrp + j 0 = 19052 + j 0 V

Power factor at the receiving end, cos r = 0.85 lagging, r = 31.7883

r
Irp = Irp r = 262.43 31.7883 A
Therefore,
Line constants
Resistance per phase,
Inductive reactance per phase,
Series impedance per phase,

Rp = 0.29 8 = 2.32
Xp = 0.65 8 = 5.20
Zp = Rp + jXp = 2.32 + j5.20
=

(i) Let

(2.32 2 + 5.20 2 ) tan 1

5.20
= 5.694 65.9558
2.32

r
Vsp = Phase voltage at the sending end
r
r r
r
Vsp = Vrp + Zp Irp = 19052 0 + j0 + (5.694 65.9558) (262.43 31.7883)
= 20305.712.3686

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14

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

Line voltage at the sending end,

r
r
Vs l = 3 Vsp =

3 20305.71

= 35170.52 V = 35.170 kV.

r
r
(ii) Phase difference between Vs and Is
s = 2.3686 (31.7883) = 34.1569
Power factor at the sending end,
coss = cos 34.1569 = 0.8275 (lagging)
4.

(c)
Effective (rms) value of phase voltage =

Peak value of phase voltage

275
kV
3
275
2 = 224.5 kV
3

For economical size of the cable, optimum ratio of sheath and core radii is given by

gmax =

and

V
r ln

Now,

R
r

R
=e
r

V
r

gmax = 15 kV/mm
15

224.5
;
r

r =

224.5
= 14.96 mm
15

Economical core diameter,

D = 2r = 2 14.96 = 29.92 mm
Also, for economical size of the cable
R = er = 2.718 14.96 = 40.66 mm
Inner diameter of the sheath = 2R = 2 40.66 = 81.32 mm
5.

(a)
(i)

It is given that all currents flow inside the op-amp

thus

V01 = IB (50 k) = (10 106) (50 103)

1

= 0.5 V
now,

V02 = V01

V02 = 0.5 V

( It is a voltage buffer)

V03 = (1) V02 + (10 10 6) (20 103)

= 0.5 + 0.2 = 0.3 V

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Test - 19 (Conventional) : Full Syllabus Paper - 2

(ii)

15

Suppose we have an opamp as shown below

R2
R1

V0

To nullify the value of input current

V0 = R2 IB

now if we introduce a resistance R3 say then

R2
R1

+
R3

R
Vout = IBR2 + 1 + 2 R3 ( IB )
R1

R
Vout = IBR2 1 + 2 R3 IB = 0
R1

R 3 = (R1 R2)

Thus by choosing proper value of resistance we can compensate for to bias current op-amp
In the given question

RA = (10 k) (50 k) = 8.33 k

RB = (20 k) (20 k) = 10 k

5.

(b)
State Diagram:
0000
0001

1001
1000

0010
0111
0011
0110
0101

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16

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

Number of flip-flops required is log2 N = log210 = 4

Q3 Q2 Q1 Q0
0
0
0
0
0
0
0
0
1
1

0
0
0
0
1
1
1
1
0
0

0
1
0
1
0
1
0
1
0
1

0
0
1
1
0
0
1
1
0
0

Q3+ Q2+ Q1+ Q0+

0
0
0
0
0
0
0
1
1
0

0
0
0
1
1
1
1
0
0
0

0
1
1
0
0
1
1
0
0
0

T3

T2

T1

T0

0
0
0
0
0
0
0
1
0
1

0
0
0
1
0
0
0
1
0
0

0
1
0
1
0
1
0
1
0
0

1
1
1
1
1
1
1
1
1
1

1
0
1
0
1
0
1
0
1
0

K-map for T3, T2, T, 1, T0 :

T3

T2

Q1 Q0
00
Q3Q2

01

11

Q1 Q0
00
Q3Q2

10

00
1

01
11

10

11
1

01

11

10

10

T2 = Q1Q0

T3 = Q2Q1Q0 + Q3Q1Q0
T1

T0

Q1 Q0
00
Q3Q2

01

11

00

Q1 Q0
00
Q3Q2
00 1

01

01

11

01

00

10

10

01

11

10

11

10

T0 = 1

T1 = Q3Q0

Thus, decade counter can be realized by T-flip flop and basic gates as given below
Q2
Q1
Q0

Q3
Q1
Q0

T3

Q3

Q3

Q2

Q3

Q0

Q0

T2

Q2

Q2

T1

Q1

Q1

T0

Q0

Q0

CLK

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Test - 19 (Conventional) : Full Syllabus Paper - 2

5.

(c)

LOOP:

LOC 1:

LOC 2:

6.

17

LXI SP, 2050 H

LXI H, 0000H
MVI C, 00H
POP D
DAD D
JC LOC1
DCR B
JNZ LOOP
JZ LOC 2
INR C
DCR B
JNZ LOOP
MOV A, L
STA 3200H
MOV A, H
STA 3201 H
MOV A, C
STA 3202 H
HLT

(starting the stack pointer)

(taking reading to DE pair)

(adding the readings and storing in HL pair)
(B contains the value of total readings)

(taking lower byte of sum)

(storing to 3200 H)
(taking next higher byte)
(storing at next address)
(taking next higher byte)
(storing at next address)

(a)
The circuit is acting as line commutated inverter since > 90

V0 = Eg + I0R
=

2Vm
cos 4 fLs I 0 = Eg + I0R

2Vm
I0 =
given

cos + Eg

Ra + 4fLs

Eg = 80 V,
Vm = 120 2 V ,
Ls = 1 mH and f = 50 Hz
2 2 120
cos(110 ) + 80

= 35.874 A
I0 =
1 + (4 50 1 10 3 )

I0 = 35.874 A
Average reduction in dc output voltage due to source inductance
Vd 0 =

Vm
[cos cos( + )] = 4 fLs I0

120 2

[cos110 cos(110 + )]

= 4 50 1 103 35.874
=

= 8.346
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18
6.

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

(b)
(i) Astable Multivibrator: The circuit of astable multivibrator using 555 timer is shown below:
+VCC
RA

RB

4
3

555
2

output

5
C1

There is no stable state in the astable multivibrator. This circuit does not require an external trigger to
change the state of the output, hence it is also called free-running multivibrator.

Initially when the output is high, capacitor C starts charging toward Vcc through RA and RB. However
as soon as voltage across the capacitor equals 2/3 VCC, the output switches low. Now capacitor C
starts discharging through RB. When the voltage across C equals 1/3 Vcc, the output goes high. Then
the cycle repeats.

The output voltage and capacitor voltage waveforms are shown below.
T

Output = VCC
0

t
t2

Capacitor 2 V
CC
voltage 3
1V
3 CC

td

Charging
t
Discharging

The time when capacitor charges is:

tc = 0.69 (RA+RB)C
The time during which capacitor discharges is:
td = 0.69 (RB)C
The total period of output waveform is:
T = tc + td = 0.69 (RA + 2RB)C
Thus, the frequency of oscillation is:

f0 =

(ii)

Percentage duty cycle =

1
1.45
=
T
(R A + 2RB )C
tc
R + RB
100 = A
100%
T
R A + 2 RB

For astable multivibrator

=

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R1
1
=
R1 + R2
R2
1 + R
1
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Test - 19 (Conventional) : Full Syllabus Paper - 2

R2
R1

Here

19

= 1.8 to 9

1
1
to
= 0.357 to 0.1
1 + 1.8
1+ 9

1 +
T = 2 l n
1
= RC = time constant = 1 ms

The oscillation time period,

Where

1 + 0.357
Tmax = 2 1 l n
= 1.49 ms
1 0.357
fmin = 669 Hz

or

1 + 0.1
Tmin = 2 1 l n
= 0.4 ms
1 0.1

Similarly

fmax = 2.5 kHz

The frequency range is 669 Hz to 2.5 kHz
6.

(c)
For seperately excited dc motor,
Armature resistance = 2.5
Back emf = Eb = KN

Eb = V0 IaRa
= 250 20 2.5

Eb = 200 V
K. =

Eb 200 1
=
=
600 3
N

Let be the duty ratio

V0 = Vs
Vs IaRa = K N
Since torque remains constant, Ia should be constant.
[ 250 20 2.5] =

1
400
3

= 0.733
At ( = 0.5) and given motor is in regenerative mode that is working as a generator, then

N =

(1 )Vi + IaRa (0.5 250) + (20 2.5)

=
K
(1 / 3)

N = 525 rpm
[Here in the above equation we have taken V0 = (1 ) Vi because, the machine is in regenerative mode so
the chopper used is second quadrant chopper whose output voltage is as stated above]

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20
7.

ESE-2016 : TEST SERIES

ELECTRICAL ENGINEERING

(a)
The counter will count untill enable is zero. The enable will be zero when voltage at both terminal of
comparator will be same.
Voltage at capacitor will be 1 V
t

V=

Q 1
=
Idt
C C 0

1=

1
2 103 dt
10 10 6
0

1 = 0.2 103 t

t=

1
0.2 10 3

= 5 msec

The counter stops after 5 msec of start conversion pulse.

Period of clock pulse =

1
2 10 3

= 0.5 msec

n tclk = 5 msec
n=

5 10 3
0.5 10 3

= 10

10 clock pulses are utilized by counter

So the counter stops after 10th clock pulse.
Count of the counter will be

Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0
7.

(10)10

(b)

T1

T3

T5

T4

T6

T2

3-
supply
440 V
50 Hz

R = 12.4

500 V
+

Here in this case line commutated inverter means battery is supplying power to source.
2
Since battery is supplying total power which is desired to be transferred i.e. 5000 W and I 0,rms R loss so,

according to energy balance equation.

EbI 0 = 5000 + I 0,2 rms R

I0, rms I0 because of large inductor
500 I0 = 5000 + I02 12.4
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Test - 19 (Conventional) : Full Syllabus Paper - 2

21

12.4 I02 500 I0 + 5000 = 0 is a quadratic equation, the roots of this equation are I0 = 21.96 A or 18.35 A.
Considerting the lowest value of load current,
I0 = 18.35 A
(i)

Eb + I0R =
500 + (18.35) (12.4) =

3 VmL
cos

3 2 440

cos

272.46
= cos 1
3 2 440

= 117.2920
(ii) Input power factor
=

Is 1
3
cos = cos(117.2920 )

Is

Input power factor = 0.4378 (lagging)

(iii) Rms value of fundamental ac current
Is1 =

2 2

I 0 sin60 =

I0 =

(18.35)

Is1 = 14.307 A
(iv) Efficiency of energy transferred
5000
5000
= E I = 500 18.35 100
b 0

= 54.49%
7.

(c)
The maximum quantization error must satisfy
mp
=
0.01 mp
2
L
is step size and L is the number of levels, L = 2n
Hence L 100, and we choose L = 128 = 27. The number of bits per sample required is 7. Since the Nyquist
sampling rate is 2fm = 4000 samples/s, the sampling rate for each signal is
f s = 1.25 (4000) = 5000 samples/s
There are eight-time division multiplexed signals, requiring a total of 8 5000 = 40000 samples/s.
Since each sample is encoded by 7 bits, the resultant bit rate is

(qe)max =

1
Tb

= 7(40000) = 280 kb/s

Hence the minimum transmission bandwidth required is

fB =

1 + 0.2
(280) = 168 kHz
2

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