Storage Network

ASIC Verification
Intelligent Network Processor
iSCSI 10 Gigabit-based Design
RAID 5 and 6 Support
7.5 Million Gate count

Case Study

Ideal for Voice, Video and Data

Executive Summary
Our client, a pioneer in development of storage network architecture ASICs had designed a
new intelligent storage network processor. The processor had higher performance, was less
costly and easier to design and develop on general purpose platforms. The client looked for a
technology partner to do full chip level verification and functional testing of this ASIC.
We developed test plans to verify MAC Data port, MAC Management port, TCP/IP and
Ethernet filter block, XOR block, iSCSI transmit block and peripherals such as I2C, GPIO and
UART. We also developed full chip level scoreboard for end to end data integrity check and
integrated various block level test bench environments to run full chip simulations.
About 250 bugs were detected and resolved using coverage driven methodology for chip
verification. Besides, we reduced time-to-market by 30% and achieved 25% savings in totalcost-of-ownership in first 6 months of the product launch.

www.einfochips.com | marketing@einfochips.com

Client Profile
Our client is a poineer in developing storage
network architecture ASICs. It also provides
leading-edge silicon solutions for unified voice,
video and data networks.

Technology and tools

o

Specman, Incisive and eVerilog

PCIe, Ethernet, TCP/IP, iSCSI and

Solaris

Business Challenges
The client had developed a new intelligent
storage network processor. With limited
investments and lesser time-to-market, the
client looked for a technology partner who can
take ownership of verification for this ASIC.

Solution
eInfochips took complete ownership of ASIC
verification and used coverage driven
methodology to develop chip level scoreboard
for end to end data integrity check.

Verified MAC data port, MAC management

port , TCP/IP and Ethernet filter block, XOR
block, iSCSI transmit block and peripherals
such as I2C, GPIO and UART

Integrated block level test environments to

run full chip simulation

Created regression scripts to automate

execution and validation of test cases

Client Benefits
About 250 bugs were traced and resolved after
full chip verification. Besides, the client was also
able to reduce time-to-market by 30% and got
25% savings on total-cost-of-ownership in first 6
months of the product launch.

eInfochips synchronised
with isolated multi-site
teams for 6 months to
ensure all RTL changes are
taken care.

About eInfochips
eInfochips is a Product and Semiconductor Engineering Solutions company recognized for technology
leadership by Gartner, Frost & Sullivan, NASSCOM and Zinnov. eInfochips has contributed to 500+
products for top global companies, with more than 10 million deployments across the world.
USA HQ

1230 Midas Way, Suite #200, Sunnyvale (CA) 94085 | (+1) 408 496 1882

INDIA HQ

11 A/B Chandra Colony, CG Road, Ellisbridge, Ahmedabad 380 006

www.einfochips.com | marketing@einfochips.com