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MOCK PAPER 2016

E.C.E. - CORE
1. Consider the constant current source shown in the figure below. Let
represent the current gain of the transistor.

The load current 0 through RL is


V ref

( +1 ) R

(A) I 0 =

(B)

V ref
+1 R

( )

I0 =

V ref

( +1 ) 2 R

(C) I 0 =

(D)

V ref
+1 2 R

( )

I0 =

2. Consider the oscillator circuit shown in the figure. The function of the
network (shown in dotted lines) consisting of the 100 k resistor in series
with the two diodes connected back-to-back is to:

(A) Introduce amplitude stabilization by preventing the op amp from


saturating and thus producing sinusoidal oscillations of fixed
amplitude
(B) Introduce amplitude stabilization by forcing the op-amp to
swing between positive and negative saturation and thus producing
square wave oscillations of fixed amplitude
(C) Introduce frequency stabilization by forcing the circuit to
oscillate at a single frequency
(D) Enable the loop gain to take on a value that produces square
wave oscillations

3. In an 8085 system, a PUSH operation requires more clock cycles than a POP
operation. Which one of the following options is the correct reason for this?
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(A) For POP, the data transceivers remain in the same direction as
for instruction fetch (memory to processor), whereas for PUSH their
direction has to be reversed.
(B) Memory write operations are slower than memory read
operations in an 8085 based system.
(C) The stack pointer needs to be pre-decremented before writing
registers in a PUSH, whereas a POP operation uses the address
already in the stack pointer.
(D) Order of registers has to be interchanged for a PUSH operation,
whereas POP uses their natural order.
4. The block diagram of a frequency synthesizer consisting of a Phase Locked
Loop (PLL) and a divide-by- counter (comprising 2, 4, 8, 16 outputs)
is sketched below. The synthesizer is excited with a 5 kHz signal (Input 1).
The free-running frequency of the PLL is set to 20 kHz. Assume that the
commutator switch makes contacts repeatedly in the order 1-2-3-4.

The corresponding frequencies synthesized are:


(A) 10 kHz, 20 kHz, 40 kHz, 80 kHz
(B) 20 kHz, 40 kHz, 80 kHz, 160 kHz
(C) 80 kHz, 40 kHz, 20 kHz, 10 kHz
(D) 160 kHz, 80 kHz, 40 kHz, 20 kHz
5. What is the voltage Vout in the following circuit?

(A) 0 V
NMOS) / 2
(C) Switching threshold of inverter

(B) (|VT of PMOS| + VT of


(D) VDD

6. For the circuit shown in the figure, the delays of NOR gates, multiplexers and
inverters are 2 ns, 1.5 ns and 1 ns, respectively. If all the inputs P, Q, R, S
and T are applied at the same time instant, the maximum propagation delay
(in ns) of the circuit is

(A)

6.0
(D) 8.0

(B) 7.0

(C) 4.0

7.
160 kHz

10 bit
O/P
Ring

4 bit
Parallel
Counter

MOD-25
Ripple

4 bit
Johnson
4

What is the frequency of the output signal?


(A) 10 Hz

(B) 160 Hz

(C) 40 Hz

(D) 5 Hz

8. When R1 = 3k, R2 = 8k, R3 = 4k, R4 = 5k and supply voltage is +10 V and -10
V. What should be Vo?

(A) V0 will oscillate between +10 and -10.


(B) V0 = 0.
(C) Vo will saturate at either +10 or -10.
(D) No saturation or oscillation, assumes some non-zero value.
9. The first two rows in the Routh table for the characteristic equation of a
certain closed-loop control system are given as

The range of K for which the system is stable is


(A) 2.0 < K < 0.5
(B) 0 < K < 0.5
(C) 0 < K <
0.5 < K <

(D)

10.
How to obtain symmetrical waveform in Astable multi vibrator?
(A) Use clocked RS flip-flop
(B) Use clocked JK flip-flop
(C) Use clocked D-flip-flop
(D) Use clocked T-flip-flop
11.
Find maximum operating frequency of given circuit for given data (in
GHz) :

1
47

(A)

(B)

1
42

(C)

1
30

(D)

1
40
12.
Instrumentation amplifiers are normally used to
measure
(A)
Small differential signal voltages.
(B)
Signals superimposed on a common-mode
voltage often much larger than the signal voltage.
(C)
both of the above
(D)
none of the above
13.

An n-bit microprocessor has


(A) n-bit program counter
(B) n-bit address registers
(C) n-bit ALU
(D) n-bit instruction registers

14.
Referring to the given figure, what should the display on the scope look
like if the A/D converter is working properly?

(A)
It should be a circular Lissajous pattern resulting from
the simultaneous application of ramps to the vertical and
horizontal inputs of the oscilloscope.
(B)
The pattern should be a straight line across the screen
due to the equal but opposite voltages being applied to the
scope inputs.
(C)
A uniform stair step pattern should be displayed.
(D)
The scope should display a sequential binary count with
the LSB on the left and the MSB on the right side of the
display.
15.
Voltage Series feedback (also called series-shunt
feedback) results in
(A)
Increase in both input & output impedances
(B)
Decreases in both input & output impedances
(C)
Increase in input impedance &decreases in
output impedance
(D)
Decrease in input impedance & increase in
output impedance
16.
Consider the circuit shown in the figure. Assuming VBE1
= VEB2 = 0.7 volt, the value of the dc voltage VC2 (in volt) is

(A)
17.
casual system?
(A)

0.50

(B) 1.0

(C) 2.0

(D) 2.5

Which of the following can be impulse response of a


h(t)
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(B)

h(t)

(C)

h(t)

(D)

18.
(A)
(B)
(C)
(D)

h(t)

Which of the following lines is non-radiating?


Open two wire
Coaxial
Both
None of the above

19.
A short circuited stub is shunt connected to a
transmission line as shown in the figure is, if z0 = 500 ohms, the
admittance y seen at the function of the stub and the transmission line is

(A)
(B)
(C)
(D)

(0.01
(0.02
(0.04
(0.02

- j 0.02) mho
- j 0.01) mho
- j 0.02) mho
+ j 0) mho

20.
A system with input x[n] and output y[n] is given
as y[n] = (sin 5/6 pn) x(n) The system is
(A)
linear, stable and invertible
(B)
non-linear, stable and non-invertible
(C)
linear stable, non invertible
(D)
linear, unstable, invertible
21.
In the circuit shown below, if the source voltage Vs =
10053.13 V then the Thevenins equivalent voltage in Volts as seen by the
load resistance RL is
Given : tan-1(4/3)=53.130

(A) 10090 (B) 8000


10060

(C) 80090

(D)

22.

The signal flow graph for a system is given below. The

transfer function

Y (s)
U (s )

for this system is

(A)

s +1
5 s +6 s+2

(B)

s +1
s +6 s+ 2

(C)

s+1
s + 4 s+2

(D)

1
5 s +6 s+2

23.
Consider the following assembly language program.
MVI B, 87H
MOV A, B
START:
JMP NEXT
MVI B, 00H
XRA B
OUT PORT1
HLT
NEXT:
XRA B
JP START
OUT PORT2
HLT
The execution of the above program in an 8085 microprocessor will result in
(A)
An output of 87H at PORT1
(B)
An output of 87H at PORT2
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(C)
Infinite looping of the program execution with
accumulator data remaining at 00H
(D)
Infinite looping of the program execution with
accumulator data alternatingbetween 00H and 87H
24.
In the h-parameter model of the 2-port network given in the figure
shown, the value of 22 (in S) is

(A)
54
25.

67

(B)

71

(C) 84

Ideal voltage amplifier can be represented by


(A)
h-parameters (B) y-parameters
(D) g-parameters

(D)

(C) z-parameters

26.
In a certain system the main memory access time is 100 ns. The cache
is 10 time faster than the main memory and uses the write though protocol.
If the hit ratio for read request is 0.92 and 85% of the memory requests
generated by the CPU are for read, the remaining being for write; then the
average time consideration both read and write requests is
(A)
14.62 ns
(B)
348.47 ns
(C)
29.62 ns
(D)
296.2 ns
27.
4 messages band limited to W, W, 2W and 3W are to be multiplexed
using TDM. The minimum bandwidth required for the transmission of this
TDM signal is
(A)
W
(B) 3W
(C) 6W
(D)
7W

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28.
The figure shows the band diagram of a Metal Oxide Semiconductor
(MOS). The surface region of this MOS is in.

(A)

29.

inversion
(D) flat band

(B) accumulation

The asymptotic Bode phase plot of () =

(C) depletion
k
(s +0.1)(s +10)(s + p1) , with

and 1 both positive, is shown below

The value of 1 is
(A) 2

(B) 1

(C) 4

(D) 0.5

30.
A speech signal is sampled at 8 kHz and encoded into PCM format
using 8 bits/sample. The PCM data is transmitted through a baseband
channel via 4-level PAM. The minimum bandwidth (in kHz) required for
transmission is
(A) 16
(B) 8
(C) 64
(D) 32

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