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BE/B.Tech
Analog Electronics Laboratory Syllabus for VTU BE/B.Tech Electronics and Communication
Engineering 3 sem syllabus
Laboratory Code
15ECL37
IA Marks
20
Number of Lecture
Hours/Week
Exam Marks
80
Exam Hours
CREDITS 02
Course Objectives:
This laboratory course enables students to get practical experience in design, assembly,
testing and evaluation of
Power Amplifiers.
Laboratory Experiments:
NOTE: The experiments are to be carried using discrete components only.
1. Design and set up the following rectifiers with and without filters and to determine ripple factor and rectifier
efficiency: (a) Full Wave Rectifier (b) Bridge Rectifier
2. Conduct experiment to test diode clipping (single/double ended) and clamping circuits (positive/negative).
3. Conduct an experiment on Series Voltage Regulator using Zener diode and power transistor to determine line
and load regulation characteristics.
4. Realize BJT Darlington Emitter follower with and without bootstrapping and determine the gain, input and
output impedances
5. Design and set up the BJT common emitter amplifier using voltage divider bias with and without feedback
and determine the gain bandwidth product from its frequency response.
6. Plot the transfer and drain characteristics of a JFET and calculate its drain resistance, mutual conductance and
amplification factor.
7. Design, setup and plot the frequency response of Common Source JFET/MOSFET amplifier and obtain the
bandwidth.
8. Plot the transfer and drain characteristics of n-channel MOSFET and calculate its parameters, namely; drain
Design and Test rectifiers, clipping circuits, clamping circuits and voltage regulators.
Compute the parameters from the characteristics of JFET and MOSFET devices.
5. Design and set up the BJT common emitter amplifier using voltage divider bias with and without feedback and
determine the gain bandwidth product from its frequency response.
AIM: To study the frequency response of Common Emitter Amplifier and calculate its Bandwidth.
Components:
S.No.
Name
Quantity
Transistor BC107
1(One) No.
2(Two) No.
Capacitors (10F)
2(Two) No.
Capacitors (100F)
1(One) No.
Bread board
1(One) No.
Equipment:
S.No.
Name
Quantity
1(One) No.
1(One) No.
1(One) No.
Theory:
The common emitter configuration is widely used as a basic amplifier as it has both voltage and current amplification.
Resistors R1 and R2 form a voltage divider across the base of the transistor. The function of this network is to provide
necessary bias condition and ensure that emitter-base junction is operating in the proper region.
In order to operate transistor as an amplifier, biasing is done in such a way that the operating point is in the active region. For
an amplifier the Q-point is placed so that the load line is bisected. Therefore, in practical design V CE is always set to VCC/2. This
will confirm that the Q-point always swings within the active region. This limitation can be explained by maximum signal
handling capacity. For the maximum input signal, output is produced without any distortion and clipping.
The Bypass Capacitor:
The emitter resistor RE is required to obtain the DC quiescent point stability. However the inclusion of R E in the circuit causes a
decrease in amplification at higher frequencies. In order to avoid such a condition, it is bypassed by a capacitor so that it acts
as a short circuit for AC and contributes stability for DC quiescent condition. Hence capacitor is connected in parallel with
emitter resistance.
The Input/ Output Coupling (or Blocking) Capacitor: An amplifier amplifies the given AC signal. In order to have noiseless
transmission of a signal (without DC), it is necessary to block DC i.e. the direct current should not enter the amplifier or load.
This is usually accomplished by inserting a coupling capacitor between two stages.
XCC << ( Ri hie )
Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Set source voltage VS = 50mV (say) at 1 KHz frequency using the function generator. Observe the phase difference
between input and output by giving these two signals to the dual channels of CRO.
3. Keeping input voltage constant, vary the frequency from 50 Hz to 1 MHz in regular steps and note down the
corresponding output voltage. Calculate gain in dB as shown in the tabular column.
4. Plot the graph: gain (dB) verses Frequency on a semi log graph sheet.
5. Calculate the 3-dB bandwidth from the frequency response.
Expected waveform:
(a) The Input & Output Waveforms at 1 KHz
Vo(Volts)
Gain = Vo/Vs
Gain(dB) = 20 log(Vo/Vs)
Result:
Common Emitter Amplifier is studied and its Bandwidth is calculated.
1. Maximum Gain ( Amax )
2. 3dB Gain
= ___________ dB
= ___________ dB
= ___________ Hz
= ___________ Hz
5. 3dB Bandwidth ( fH - fL )
= ___________ Hz
Discussion/Viva Questions:
6. Plot the transfer and drain characteristics of a JFET and calculate its drain resistance, mutual conductance
To study Drain Characteristics and Transfer Characteristics of a Field Effect Transistor (FET).
Components:
S.No.
Name
Quantity
1(One) No.
Resistor (1K
Bread board
,100K )
1(One) No.
Equipment:
S.No.
Name
Quantity
1(One) No.
1(One) No.
2(Two) No.
Specifications:
For FET BFW11:
Circuit Diagram:
Top View
Bottom View
Operation:
The circuit diagram for studying drain and transfer characteristics is shown in the figure1.
1. Drain characteristics are obtained between the drain to source voltage (VDS) and drain current (ID) taking gate to source
voltage (VGS) as the constant parameter.
2. Transfer characteristics are obtained between the gate to source voltage (VGS) and drain current (ID) taking drain to
source voltage (VDS) as the constant parameter.
Procedure:
Drain Characteristics:
1. Connect the circuit as shown in the figure1.
2. Keep VGS = 0V by varying VGG.
3. Varying VDD gradually in steps of 1V up to 10V note down drain current ID and drain to source voltage (VDS).
4. Repeat above procedure for VGS = -1V.
Transfer Characteristics:
Observations:
Drain Characteristics
VDD (Volts)
VGS = 0V
VDS(Volts)
ID(mA)
VGS = -1V
VDS(Volts)
ID(mA)
Transfer Characteristics
VGG (Volts)
VDS = 2V/5V
VGS(Volts)
Graph:
ID(mA)
VDS = 4V/8V
VGS(Volts)
ID(mA)
1. Plot the drain characteristics by taking VDS on X-axis and ID on Y-axis at a constant VGS.
2. Plot the transfer characteristics by taking VGS on X-axis and taking ID on Y-axis at constant VDS.
Calculations from Graph:
1. Drain Resistance (rd): It is given by the relation of small change in drain to source voltage(
change in Drain Current(
region.
gm
Inference:
1. As the gate to source voltage (VGS) is increased above zero, pinch off voltage is increased at a smaller value of drain
current as compared to that when VGS = 0V.
2. The value of drain to source voltage (VDS) is decreased as compared to that when VGS = 0V.
Precautions:
1. While performing the experiment do not exceed the ratings of the FET. This may lead to damage of FET.
2. Connect voltmeter and ammeter with correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless the circuit connections are checked as per the circuit diagram.
4. Properly identify the Source, Drain and Gate terminals of the transistor.
Result:
Drain and Transfer characteristics of a FET are studied.
Outcomes: Students are able to
1. analyze the Drain and transfer characteristics of FET in Common Source configuration.
2. calculate the parameters transconductance (gm), drain resistance (rd) and amplification factor().
Viva Questions:
7. Design, setup and plot the frequency response of Common Source JFET/MOSFET amplifier and obtain the
bandwidth.
Aim: To study the JFET common source amplifier and find its cut off frequencies and Bandwidth.
Components:
Name
Quantity
JFET BFW 11
Name
Quantity
2, 1, 1
2,1
Equipment:
Name
Range
Bread Board
Quantity
1
0-30V
CRO
(0-20)MHz
Function Generator
(0-1)MHz
Connecting Wires
Theory:
Of the possible three configurations of JFET amplifiers, common source (CS) configuration is mostly used. The advantage of
using CS configuration is that it has very high input impedance.
Circuit diagram shows the FET amplifier of common source configuration. The biasing input and couplings are shown in the
figure. The mid range voltage gain of the amplifier is given by A = gm(r d || RL)
At the mid-frequency range, there is n effect of input and output coupling capacitors. Therefore, the voltage gain and phase
angle are constant in this frequency range. The amplifier shown in the circuit diagram has only two RC networks that influence
its low-frequency response. One network is formed by the output coupling capacitors and the output impedance looking at the
drain. Just as in the case of BJT amplifier, the reactance of the input coupling capacitor, reactance increases as the frequency
decreases. The phase angle also changes with change in frequency.
As the frequency is increased beyond mid-frequency range the internal transistor capacitance effect is predominant. For
JFETs is the internal capacitance between gate and source. This is also called input capacitance, . The other internal
capacitance, which effects the performance is acts as a feedback circuit, which couples both, input and output. The effect of
both these capacitances is that it reduced the gain appreciably as in the case of BJT.
Circuit Diagram:
Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Set source voltage VS = 50mV (say) at 1 KHz frequency using the function generator.
3. Keeping input voltage constant vary the frequency from 50 Hz to 1 MHz in regular steps and note down the
corresponding output voltage.
4. Plot the graph: gain (dB) verses Frequency on a semi log graph sheet.
5. Calculate the bandwidth from the graph.
6. Calculate all the parameters at mid band frequencies (i.e. at 1 KHz).
7. To calculate voltage gain
Gain AVS = Output Voltage (VO) / Source Voltage (VS)
Expected waveform:
In the usual application, mid band frequency range are defined as those frequencies at which the response has fallen to 3dB
below the maximum gain (|A| max). These are shown as f Land fH and are called as the 3dB frequencies are simply the lower
and higher cut off frequencies respectively. The difference between higher cut off and lower cut off frequency is referred to as
bandwidth (fH - fL).
Observation tables:
VS = 50mV
Frequency
Vo(volts)
Gain= Vo/Vs
Gain(dB)=20 log(Vo/Vs)
Result:
JFET common source amplifier is studied and its cut off frequencies and Bandwidth is found.
Viva Questions:
Voltage Impedance
Expression
Definition
Input Impedance
Output Impedance
Expression