ITBP205

Digital Design and Computer

Organization
Unit 8
Sequential Circuits Analysis
Prof. Walid Ibrahim

Outline
State Table

State Diagram

Mealy and Moore Circuits

2

Definition
State

Flip-flops (FFs) output combination

Current
State

The state before the clock edge

Next
state

The state after the clock edge

Number
of
States
Mealy
Circuits

2N ( N is the number of FFs).

Moore
Circuits

The outputs of the sequential circuit

depend upon both the current state of
the circuit and the inputs.
The outputs of the sequential circuit
depend only upon the current state of
the circuit.
3

How do you analyze a circuit?

For a combinational circuit a truth table is
used to show how the outputs are related to
the inputs.
For a sequential circuit, the outputs depend
upon not only the inputs, but also the current
state of the flip-flops.
In addition to finding outputs, we also need to
find the state of the flip-flops on the next
clock cycle.
A state table is the sequential analog of a
truth table. It shows inputs and current
states on the left, and outputs and next
states on the right.

State Table
The State Table is used to show the
circuit output(s) and next state for
each combination of inputs and
current state.
Numb
er of
Rows

Numb
er of
Colum
ns

Number of inputs +
number of outputs + 2 x
number of FFs + number
of FFs inputs

Number of inputs + number of FFs

Example
Analyze the following sequential circuit

1
Number of Inputs:
Number of outputs:
1
Number of flip flops:
2
Number of States:
4
2+1
=
Number of rows:2
8

Number of Columns:
1+1+2x2+2x
2 = 10
Mea
Mealy or Moore?
ly

X'
Q0

J1

SET

Q1

X
Q0

K1CLR Q1

X
Q1

J0

SET

Q0

K0 CLR Q0

X'
CLK

X'
Q0

Z = Q1.Q0.X
J1 = Q0.X'
K1 = Q0 + X
J0 = Q1 + X
K0 = X

J1

SET

Q1

X
Q0

K1 CLR Q1

X
Q1

0
J

X'

K0

SET

CLR

Q0
Q0

CLK

Current State
Input Flip Flop Inputs Next State
Output
Q1
0
0
0
0
1
1
1
1

Q0
0
0
1
1
0
0
1
1

X
0
1
0
1
0
1
0
1

J1
0
0
1
0
0
0
1
0

K1
0
1
1
1
0
1
1
1

J0
0
1
0
1
1
1
1
1

K0 Q1* Q0*
1
0
0
0
0
1
1
1
0
0
0
1
1
1
1
0
0
1
1
0
0
0
0
17

Z
0
0
0
0
0
0
0
1

Getting the state table

columns
straight
The table
starts with
Current
State and
Inputs.

Current
State and
Inputs
yield
Output.
Current
State and
Inputs
yield FF
Inputs.

We only
care about
FF Inputs
in order to
find Next
State.

Current State and FF Inputs

yield Next State, based on
the flip-flop characteristic
tables.

Note: the
outputs
occur this
cycle and
the next
state in the
next cycle

Exercise
Complete the state table for the
following circuit
X'
Q0

D1

SET

CLR

Q1
Q1

X
X
Q1

TD
0

SET

CLR

Q0
Q0

CLK
9

State Diagram
The information in the state table can
be represented graphically in a state
diagram
Each state is represented by a node
in the diagram
The edges in the diagram represent
the transitions between the states
If there are n flip-flops, there should
be 2n nodes in the diagram.
If there are m inputs, then each node
m
will have 2 outgoing edges from
each node.
Different diagrams for Mealy10and

Mealy State Diagram

Current Inpu Next
Outpu
State
t
State
t
Q1 Q0
X Q1* Q0*
Z
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
0
0
1
1
0
1
0
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0
0
0
0
1
1
1
0
1
1

Two 4 nodes (states)

FFs
:
One Two edges going
inp out from each
ut
node
The label on each edge
should be (input /
output)
Input / output
0/0

1/0
1/0

00

1/0

01

10

0/0
0/0

1/1

0/0

11

11

Moore State Machine

The output depends
only on the current
state.
Each state should
specify the expected
output
The edge should only
specify the input that
cause the transition

Current Inpu Next

Outpu
State
t
State
t
Q1 Q0
X Q1* Q0*
Z
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
0
0
1
1
0
0
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
0
1
1
1
1
0
1
1
1

0
1
00
0

01
0

10
0

11
1

1
0

12