Hspice

Spice
Hspice Spice
Static CMOS Inverter Spice (
)* Spice
*Hspice *
------------------------------------------------------------------------------------------------------Spice_Title

*Spice Title,*

.GLOBAL vdd! gnd!

* GLOBAL vdd! gnd!

Spice *

vdd vdd! gnd! 2.5V

* Power Supply vdd!

gnd! 2.5V*

.SUBCKT inv ip op

* inv SUBCKT

.param wp=1.8u wn=0.6u

* Local wp=1.8uwn=0.6u
SUBCKT inv *

MP1 op ip vdd! vdd! pch L=0.25u W=wp

* MP1 PMOS
Drain, Gate, Source, Bulk
Channel Length Channel
WidthMOS M
Drain Source
Spice
Drain
SourceLChannel Length
WChannel Widthpch
Model .Lib
*

MN1 op ip gnd! gnd! nch L=0.25u W=wn

* MN1 NMOS*

.ENDS
*Global control signals
X1

* inv SUBCKT S*
**Hspice *

in out1 inv

* inv SUBCKT X1
SUBCKT X in out1
SUBCKT inv ip
op *

X2 out1 out2 inv

* inv SUBCKT X2
out1 out2 SUBCKT inv
ip op *

vin in gnd! pulse(0 power 0.2ns 0.08ns 0.08ns 0.42ns 1ns)

.param power=2.5V

* GLOBAL power=2.5V*

* in gnd! vin pulse

0V power 2.5V
Delay TimeRise TimeFall TimeDuty Cycle Cycle Time
*

.meas tran out1Tr trig V( in) fall=2 val='power*0.5'

+
targ V(out1) rise=2 val='power*0.5'
* out1 Rise Delay Timeout1Tr
in Falling 50% vdd out1 Rising
50% vdd+
+ Data Initial
Condition *

.meas tran out1Tf trig V( in) rise=2 val='power*0.5'

+
targ V(out1) fall=2 val='power*0.5'
* out1 Fall Delay Time*
.meas tot_power AVG power from=1.2ns to=10.2ns
* 1.2ns 10.2nstot_power
*
.IC v(out1)=2.5V v(out2)=0V

.TRAN 0.1ns 12ns

* out1 2.5V
out2 0V*
* 0ns 12ns
0.1ns *

.Lib 'mix025_1.l' TT

* mix025_1.l Model
TT Typical PMOSTypical
NMOS Model*

.END

* Spice S*

------------------------------------------------------------------------------------------------------ Spice Hspice

Measure
out1trise
out1tfall
tot_power

= 4.5417E-11 targ= 1.7854E-09

= 5.0197E-11 targ= 1.2902E-09
= 1.1334E-04 from= 1.2000E-09

trig= 1.7400E-09
trig= 1.2400E-09
to= 1.0200E-08

out1 Rise Delay Time 0.045nsFall Delay Time

0.050ns 0.113mW
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