EE6303 LINEAR INTEGRATED CIRCUITS

2 Marks and 16 Marks- Question Bank

UNIT I IC Fabrication
TWO MARKS
1. List out the reaction compounds and doping hydrides used in chemical vapour deposition (A.U May
2014)
Typical hydrides of the impurity atoms are used as the source of dopant. Typical reaction for
arsenic dopant is as below
2AsH3(gas) = 2As[solid] + 3H2 [gas] = 2As (solid) = 2As+ [solid] + 2e
Arsine AsH3, Phosphine PH3, Tertiary butyl arsine C4H11As, Tertiary butyl
phosphine C4H11P
2. What are the basic processes involved in fabricating ICs using planar technology? (A.U.NOV-2011)

Silicon wafer (substrate) preparation

Epitaxial growth

Oxidation

Photolithography

Dif fusion

Ion implantation

Isolation technique

Metall ization

Assembly processing & packaging

3. Write the basic chemical reaction in the epitaxial growth process of pure silicon. (A.U.APRIL-2011)
The basic chemical reaction in the epitaxial growth process of pure silicon is the Hydrogen
reduction of silicon tetrachloride.
1200 OC
SiCl 4+ 2H 2 <>Si + 4 HCl
4. What are the two important properties of SiO 2?

SiO 2 is an extremely hard protective coating & is unaffected by almost all

Reagents except by hydrochloric acid. Thus it stands against any contamination.

By selective etching of SiO 2 , diffusion of impurities through carefully defined

Windows in the SiO 2can be accomplished to fabricate various components.

5. Explain the process of oxidation.

The silicon wafers are stacked up in a quartz boat & then inserted into quartz Furnace tube.
The Si wafers are raised to a high temperature in the range of 950 to 1150 C o& at the same
time, exposed to a gas containing O2 or H2 O or both. The chemical action is
Si + 2H 2O > Si O +2 2H 2
6. What is meant by molecular beam epitaxial (MBE)?
In the molecular beam epitaxial, silicon along with dopants is evaporated. The Evaporated
species are transported at a relatively high velocity in a vacuum to the Substrate. The
relatively low vapour pressure of silicon & the dopants ensures Condensation on a low
temperature substrate. Usually, silicon MBE is performed under Ultra high vacuum (UHV)
condition of 10 - 8 to 10 - 10 Torr.
7. What are the advantages of Molecular Beam Epitaxial (MBE)? (A.U.APRIL-2011)
(i) It is a low temperature process, useful for VLSI. This minimizes out diffusion& auto
doping.
(ii) It allows precise control of doping& permits complicated profiles to be generated.
(iii)Linear doping profile desirable for varactor diode in FM can be obtained with MBE.
(iv)Wider choice of dopants can be used.

8. What are the two processes involved in photolithography?

a) Making a photographic mask
b) Photo etching
The development of photographic mask involves the preparation of initial artwork and its
reduction, decomposition of initial artwork or layout into several mask layers. Photo etching is
used for the removal of SiO 2from desired regions so that the desired Impurities can be
diffused.
The term reactive plasma is meant to describe a discharge in which ionization
&fragmentation of gases takes place& produce chemically active plasma species, frequently
oxidizers and reducing agents. Such plasmas are reactive both in the gas phase & with solid
surfaces exposed to them. When these interactions are used to form volatile products so that
material is removed or etching of material form surfaces that are not masked to form
lithographic patterns, the technique is known as reactive plasma etching.
9. What is isotropic & anisotropic etching processes? (A.U.NOV-2013)
Isotropic etching is a wet etching process which involves undercutting. Isotropic etching is a
dry etching process, which provides straight walled patterns. This process used for diffusion
(doping process)
10. What are the advantages of ion implantation technique? (A.U.NOV-2011) (A.U.NOV-2012)
1. It is performed at low temperature. Therefore; previously diffused regions have a lesser
tendency for lateral spreading.
2. In diffusion process, temperature has to be controlled over a large area inside the oven,
whereas in ion implantation process, accelerating potential & beam content are dielectrically
controlled from outside.
11. What is parasitic capacitance? (A.U.NOV-2009)
In IC fabrication no of active devices and passives devices are used in ion implantation the
separation and connection of two devices act as a dielectric parallel plate this contact known
as parasitic capacitance.
12. Why inductors are not used in integrated circuits (A.U.NOV-2012) (A.U.MAY-2013)
Because it's hard, and inductors take up a lot of space and usually whatever purpose the
inductor is being used for can be accomplished by some other combination of electrical
components that are more easily fit onto an IC
13. Significance using buried layer in IC fabrication (A.U.NOV-2012)
The buried layer is for increasing the conductivity of the path the charges take to reach the
collector terminal.
14. What are the advantages of Molecular Beam Epitaxy( MBE )?

It is a low temperature process, useful for VLSI. This minimizes out diffusion & autodoping.

It allows precise control of doping& permits complicated profiles to be generated.

Linear doping profile desirable for varactor diode in FM, can be obtained with MBE.

Wider choice of dopants can be used.

15. What is oxidation induced defects in semi conductor?

1. Stacking faults
2. Oxide isolation defects
Stacking faults:
Structural defects in the silicon lat ice are called oxidation induced stacking faults. The growth
of
Stacking faults is a strong function of substrate orientation, conductivity type & defect nuclei
present. The stacking faults formation can be suppressed by the addition of HCl.
Oxide isolation defects:
The stress along the edges of an oxidised area produces severe damage in the silicon. Such
Defects results in increased leakage in nearby devices. High temperatures (around 950 0C )
will prevent
Stress induced defect formation.

16. What is birds beak?

In local oxidation process, the oxidation of silicon proceeds slightly under the nitride as well .
Also, a large mismatch in the thermal expansion co-efficient of Si3N4 &Silicon results in
damage to the semi conductor during local oxidation. This damage can be greatly reduced by
growing a thin layer of SiO2 prior to placement of the Si3N4 mask. Typical y 100 to 200Ao is
used for this purpose. Unfortunately, this greatly enhances the penetration of oxide under the
nitride masked regions, resulting in oxide configurations called birds beak.
17. What is lithography?
Lithography is a process by which the pattern appearing on the mask is transferred to the
wafer. It
Involves two steps: the first step requires applying a few drops of photoresist to the surface of
the wafer & the second step is spinning the surface to get an even coating of the photoresist
across the surface of the wafer.
18. What are the different types of lithography? What is optical lithography?
The different types of lithography are:
1.Photolithography
2.Electron beam lithography
3.Xray beam lithography
4.Ion beam lithography
Optical lithography:
Optical lithography comprises the formation images with visible or UV radiation in a
photoresist
Using contact, proximity or projection printing.
19. What are the two processes involved in photolithography?
a) Making a photographic mask
b) Photo etching
20. Distinguish between dry etching & wet etching. (A.U.NOV-2013)

(April/May 2016)

Wet etching

Dry etching

Wet etching is a material removal process that uses liquid

chemicals or etchants to remove materials from a wafer

In dry etching, plasmas or etchant gasses remove the substra

material

A wet etching process involves multiple chemical reactions

that consume the original reactants and produce new reactants

The reaction that takes place can be done utilizing high kinet
energy of particle beams, chemical reaction or a combination
of both.

Anisotropic wet etching

plasma etching, gas etching, physical dry etching, chemical

dry etching, physical-chemical etching

Isotropic wet etching

21. What is meant by reactive plasma etching?

The term reactive plasma is meant to describe a discharge in which ionization & fragmentation of
Gases takes place& produce chemical y active plasma species, frequently oxidizers and reducing
agents.
Such plasmas are reactive both in the gas phase & with solid surfaces exposed to them. When these
Interactions are used to form volatile products so that material is removed or etching of material form
Surfaces that are not masked to form lithographic patterns, the technique is known as reactive plasma
Etching.
22. State the limitations of IC technology (April/May 2016)
1. If one component in an integrated fails, that means the whole circuit has to be replaced.
2. Integrated circuits have limited capacitances. This calls for external components if the
capacitance needs an extension.
3. It is impossible to fabricate transformers or any other kind of inductor onto the integrated
circuits and again calling for a discrete circuit.
4. Power that integrated circuits can produce is limited and calls for extension.
5. Integrated circuits are not flexible. Their components cannot be modified and neither can the
parameters of operation.
23. Define diffusion.
The process of introducing impurities into selected regions of a silicon wafer is called diffusion. The
rate at which various impurities dif use into the silicon will be of the order of 1 range of 900C to
1100C . The impurity atoms have the tendency to move from regions of higher concentrations to
lower concentrations.
24. What is dielectric isolation?
In dielectric isolation, a layer of solid dielectric such as SiO2 or ruby completely surrounds
each
Components thereby producing isolation, both electrical & physical. This isolating dielectric layer is
thick enough so that its associated capacitance is negligible. Also, it is possible to fabricate both PNP &
NPN transistors within the same silicon substrate.
25. What is metallization?
The process of producing a thin metal film layer that will serve to make interconnection of the
Various components on the chip are called metallization.
26. What is ion implantation?.why it is preferred over diffusion process(A.U.MAY 2014)
(April/May 2015)
Ion implantation is a materials engineering process by which ions of a material are accelerated
in an electrical field and impacted into another solid.
Diffusion process is limited:
-cannot exceed solid solubility of dopant

-difficult to achieve light doping

Ion implantation is preferred because:
-controlled, low or high dose can be introduced (1011 - 1018 cm-2)
-depth of implant can be controlled.
Used since 1980, despite substrate damage;low throughput, and cost.

27. What are the major categories of integrated circuits (A.U.DEC-2014)

Ans: Hybrid and Monolithic ICs
28. Mention the advantages of integrated circuits over discrete circuits (or) What are the
advantages of ICs over discrete circuits? (A.U.JUNE-2013) (A.U.DEC-2014) (April/May 2015)

Minimization & hence increased equipment density.

Cost reduction due to batch processing.

Increased system reliability

Improved functional performance.

Matched devices.

Increased operating speeds

Reduction in power consumption

29.
2015)

Classify ICs on the basis of application ,device used and chip complexity. (A.U.DECICs can be classified on the basis of their chip size as given below:
Small scale integration (SSI)3 to 30 gates/chip.
Medium scale integration (MSI)30 to 300 gates/chip.
Large scale integration (LSI)300 to 3,000 gates/chip.
Very large scale integration (VLSI)more than 3,000 gates/chip.

30.
What are the different kinds of packages of IC741? (A.U.APRIL-2011) (A.U.JUNE-2013)
(A.U.NOV-2013) (A.U.DEC-2015)

Metal can (TO) package

Dual-in- line package

Flat package or flat pack

Unit 1
Sixteen marks
1.

Explain the process of epitaxial growth IC fabrication with neat diagram? (A.U.NOV-2011)
(April/May 2015)

2.

Explain the fundamental of monolithic IC technology using suitable circuit? (A.U.APRIL2011) (A.U.NOV-2012)

3.

Explain the process of photolithography. Compare Ion implantation with diffusion.

(A.U.NOV- 2011) (A.U.JUNE-2013) (A.U.NOV-2013)

4.

What are the different ways by which the diode structure can be realized in IC? (A.U.JUNE2012)
(A.U.NOV-2011) (A.U.NOV-2013)

5.

Explain the importance of isolation and discuss the method of isolation. (A.U.NOV-2011)

6.

Explain the fabrication process of resistance, capacitance and JFET? (A.U.JUNE-2012)

(A.U.NOV-2012) (A.U.JUNE-2013) (A.U.NOV-2013)

7.

Describe in detail any two isolation technique used to provide isolation between various
components in IC fabrication with illustration? (8+8) (A.U.JUNE-2014)

8.

Explain in step-by-step basis, the fabrication of planar P-N junction diode with neat
illustration. (A.U.JUNE-2014)

9.

(a)(i) Explain the fabrication process involved in the following circuit diagram(Fiugure 1)(10)
(A.U.DEC-2014)

(ii)Explain the process of masking and photo etching in IC fabrication(6) (A.U.DEC-2014)

10. (b)(i)Discuss the different ways to fabricate diodes(10) (A.U.DEC-2014)
(ii)Explain how a monolithic capacitor can be fabricated(6) (A.U.DEC-2014)
11. (a)(i) Describe the Epitaxial growth process (8)(April/May 2015)
(ii)Explain the different types of IC packages (8) (April/May 2015)
12. Briefly explain the various process involved in fabrication monolithic IC which integrates
diode, capacitance and FET (16) (April/May 2015)
13. (i) Distinguish diffusion and ion implantation process in IC fabrication (6). (April/May 2016)
(ii). Describe the metallization process, assembly processing and packaging with neat
diagram. (10) (April/May 2016)
14. Discuss briefly about the PN junction diode and JFET fabrication (16) (April/May 2016)
15. Explain the various steps involved in fabrication of a typical transistor into monolithic ICs
(16) (A.U.DEC-2015)
16. What is thin and thick film technology? Explain the various methods used for deposition of
thin film technology. (16) (A.U.DEC-2015)

UNIT II
Characteristics of Op-Amp
TWO MARKS
1.

Draw an adder circuit using an op-amp to get the output expression as Vo=(0.1V1+V2+10V3) where V1,V2 and V3 are the inputs. (A.U.DEC-2014)
Solution:
The output of the figure is Vo=-(0.1V1+V2+10V3)

Rf
Rf
Rf
Vo=-( R1 V1+ R2 V2+ R3 V3)
Rf=10k R1=100k, R2=10k, R3=1k

2. What is OPAMP?
An operational amplifier is a direct coupled high gain amplifier consisting of one or more
differential amplifiers, followed by a level translator and an output stage. It is a versatile device that

can be used to amplify ac as well as dc input signals & designed for computing mathematical functions
such as addition, subtraction , multiplication, integration & differentiation
3. Draw the pin configuration of IC741.

4. List out the ideal characteristics of OPAMP? (A.U.JUNE-2012) (A.U.APRIL-2011) (A.U.NOV2013)

1.

Open loop gain infinite =105

2.

Input impedance infinite

3.

Output impedance low

4.

Bandwidth infinite

5.

Zero offset, V=0 when V1=V2=0

5. What is the need for frequency compensation in practical op-amps?

Frequency compensation is needed when large bandwidth and lower closed loop gain is
desired.
Compensating networks are used to control the phase shift and hence to improve the stability.
6. Define input offset voltage. (A.U.NOV-2011)
A small voltage applied to the input terminals to make the output voltage as zero when the two
input terminals are grounded is called input offset voltage.
7. Define CMRR of an op-amp. (A.U.NOV-2011) (A.U.NOV-2012) (A.U.NOV-2013) (April/May
2015)
The relative sensitivity of an op-amp to a difference signal as compared to a common mode
signal is called the common mode rejection ratio. It is expressed in decibels.
CMRR= A d/ A c
8. Define slew rate.
The slew rate is defined as the maximum rate of change of output voltage caused by a step
input voltage. An ideal slew rate is infinite which means that op-amp s output voltage should change
instantaneously in response to input step voltage.
9. What causes slew rate? (A.U.MAY 2014)
There is a capacitor with-in or outside of an op-amp to prevent oscillation. It is this capacitor
which prevents the output voltage from responding immediately to a fast changing input.
10. Define thermal drift. (A.U.NOV-2011)
The bias current, offset current & offset voltage change with temperature. A circuit carefully
nulled at 25 C may not remain so when the temperature rises 0 to 35C.This is called thermal drift.
Often, offset current drift is expressed in nA/ C and Offset voltage drift in mV/ C.
11. Define supply voltage rejection ratio (SVRR)
The change in OPAMPs input offset voltage due to variations in supply voltage is called the
supply voltage rejection ratio. It is also called Power Supply Rejection Ratio (PSRR) or Power Supply
Sensitivity (PSS).
12. Draw the summer or Adder Amplifier? (A.U.NOV-2013)

Inverting summer amplifier

13. Draw the Differentiator Amplifier? (A.U.NOV-2011)

14. Draw the integrator Amplifier?

15. Draw the sub tractor Amplifier? (A.U.JUNE-2012) (A.U.NOV-2011) (A.U.NOV-2012)

16. What is the input impedance of a non inverting amplifier? (A.U.JUNE-2013)

Input impedance is high(RI=hig)
17. What happens when the common terminal of V+ and V- sources is not grounded?
If the common point of the two supplies is not grounded, twice the supply voltage will get
applied And it may damage the op-amp
18. Define input offset current. State the reasons for the offset currents at the input of the op-amp.
(April/May 2015)
The difference between the bias currents at the input terminals of the op-amp is called as input
of set current. The input terminals conduct a small value of dc current to bias the input transistors.
Since the input transistors cannot be made identical, there exists a difference in bias currents.
19. Mention the frequency compensation methods.

*Dominant-pole compensation
*Pole-zero compensation.
20. What are the merits and demerits of Dominant-pole compensation?
*noise immunity of the system is improved.
*Open-loop bandwidth is reduced.
21. Draw the frequency response characteristics of an AC integrator and indicate the part where it
behaves as a true integrator(A.U.MAY 2014)

22. A 100pF capacitor has a maximum charging current of 150 microamps.What is the slew rate?
(A.U.DEC-2014)

Imax=150A and C=100pF

slew rate =(150X10-6)/(100X10-12)
Hence slew rate=1.5 V/S
23.State the causes for slew rate in an operational amplifier?how it is indicated? (A.U.MAY 2014)
Slew rate is caused by current limiting and the saturation of internal stages of an op-amp when
a high-frequency,large amplitude signal is applied.
Slew Rate (V/s)=2f Vpk
Where f = the highest signal frequency (Hz) and Vpk = the maximum peak voltage of the
signal
24.
In the circuit shown in figure, calculate Vo,ACL,load current iL and output current io.
(A.U.DEC-2015)

25.

Draw the circuit of a log amplifier using two-Op-amps. (A.U.DEC-2015)

26.

Why IC 741 is not used for high frequency application. (April/May 2016)

IC741 has a low slew rate because of the predominance of capacitance present in the circuit at higher
frequencies. As frequency increases the output gets distorted due to limited slew rate.
27.

Draw the circuit diagram of an integrator and give its output equation (April/May 2016)

Unit 2
Sixteen marks
1.

Discuss the various DC characteristic of op-amp and frequency response of op-amp.

(A.U.APRIL-2011) (A.U.NOV-2012) (A.U.JUNE-2013) (A.U.NOV-2013)

2.

Obtain the frequency response of an open-loop op-amp and discuss about the methods of
frequency compensation. (A.U.NOV-2011) (A.U.NOV-2012)

3.

Design practically and theoretically (A.U.NOV-2013)

(1) DIFFERENTIATOR and practical differentiator (A.U.NOV-2011) (A.U.APRIL2011)
(2) INTEGRATOR (A.U.JUNE-2012) (A.U.NOV-2011)

4.

With circuit and waveforms explain the working operation of SUMMER or ADDER amplifier
(A.U.JUNE-2012)

5.

Draw the circuit of a symmetrical differential amplifier and derive CMRR (A.U.JUNE-2012)
(A.U.APRIL-2011)

6.

List the six characteristics of ideal op amp and explain in detail using practical op amp
(A.U.JUNE-2013)

7.

Determine the output voltage Vo and the current Io in the circuit as shown below. (A.U.JUNE2014)

8.

obtain the closed loop voltage gain Vo/Vi of the circuit shown below. (A.U.JUNE-2014)

9.

(a)(i)Consider the lossy integrator as shown in figure.2.For the component values R1=10k
Rf=100k, Cf=1nF,Determine the lower frequency limit of integration and study the response
for the inputs(10) (A.U.DEC-2014)

(1)step input
(2)square input
(3)sine input

(ii)Design an adder subractor circuit for Vo=-(2V1+5V2-10V3)(6) (A.U.DEC-2014)

10. (i)For a V-I converter shown in figure.3,Vin=5V,R=10k,V1=1V,find the load current and
output voltage Vo. Assume the op-amp is initially nulled.(6) (A.U.DEC-2014)

(ii) For a max frequency of 100Hz,design a differentiator circuit and draw the frequency response
for the same (10) (A.U.DEC-2014)
11. (a)(i) Design an op-amp circuit to give an output voltage Vo=4V1-3V2+5V3-V4 where
V1,V2,V3,V4 are input (8) (April/May 2015)
(ii)Explain voltage to current converter using operational amplifier Also explain the application of
Op-amp as integrator (8) (April/May 2015)
12. (b)(i)Explain in detail about the methods of frequency compensation used in operational
amplifier (10) (April/May 2015)
(ii)What is slew rate and how it can be removed?(6) (April/May 2015)
13. (a)(i) What is slew rate?List the causes of the slew rate and explain its significance in
applications.(10) (A.U.DEC-2015)
(ii) Briefly explain the methods used for frequency compensation.(6) (A.U.DEC-2015)
14. (b)(i)Draw and explain the operation of a current to voltage converter.(8) (A.U.DEC-2015)

(ii)What are the limitations of an ordinary op-amp differentiator? Draw the circuit of a
practical differentiator that will eliminate these limitations.(8) (A.U.DEC-2015)
15. (a). Discuss the frequency response characteristics and compensation of an operational
amplifier.(16) (April/May 2016)
16. (b)(i). Explain the application of Op-Amp as differentiator (8) (April/May 2016)
(ii). Find Vo for the given circuit (8) (April/May 2016)