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CHAPTER -1

1.1.

VENDING MACHINE

Vending Machines are used to dispense various products like Coffee, Snacks, and Cold Drink
etc. When money is inserted into it. Vending Machines have been in existence since 1880s.
The first commercial coin operated machine was introduced in London and England used for
selling postcards. The vending machines are more accessible and practical than the
convention purchasing method.
Nowadays, these can be found everywhere like at railway stations selling train tickets, in
schools and offices vending drinks and snacks , in banks as ATM machine and provides even
diamonds and platinum jewellers to customers. Previous CMOS and SED based machines are
more time consuming than the FPGA based machines .The FPGA based machine is also
more flexible, programmable and can be re-programmed. But in microcontroller based
machine, if one wants to enhance the design, he has to change the whole architecture again
but in FPGA user can easily increase the number of products.

1.2 . FIELD-PROGRAMMABLE GATE ARRAY


A field-programmable gate array (FPGA) is an integrated circuit designed to be configured
by a customer or a designer after manufacturinghence "field-programmable". The FPGA
configuration is generally specified using a hardware description language (HDL), similar to
that used for an application-specific integrated circuit (ASIC) (circuit diagrams were
previously used to specify the configuration, as they were for ASICs, but this is increasingly
rare). Contemporary FPGAs have large resources of logic gates and RAM blocks to
implement complex digital computations.
As FPGA designs employ very fast I/Os and bidirectional data buses it becomes a challenge
to verify correct timing of valid data within setup time and hold time. Floor planningenables
resources allocation within FPGA to meet these time constraints. FPGAs can be used to
implement any logical function that an ASIC could perform. The ability to update the
functionality after shipping, partial re-configuration of a portion of the design and the low
non-recurring engineering costs relative to an ASIC design (notwithstanding the generally
higher unit cost), offer advantages for many applications.
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In 2010, Xilinx Inc introduced the first All Programmable System on a Chip branded
Zynq-7000 that fused features of an ARM high-end microcontroller (hard-core
implementations of a 32-bit processor, memory, and I/O) with an FPGA fabric to make
FPGAs easier for embedded designers to use.
By incorporating the ARM processor-based platform into a 28 nm FPGA family, the
extensible processing platform enables system architects and embedded software developers
to apply a combination of serial and parallel processing to their embedded system designs, for
which the general trend has been to progressively increasing complexity.
The high level of integration helps to reduce power consumption and dissipation, and the
reduced parts count vs. using an FPGA with a separate CPU chip leads to a lower parts cost, a
smaller system, and higher reliability since most failures in modern electronics occur on
PCBs in the connections between chips instead of within the chips themselves.
The design flow in FPGA system is as given below:

Fig 1.1

1.3. NEXYS 2 BOARD:


The Nexys-2 is a powerful digital system design platform built around a Xilinx Spartan 3E
FPGA. With 16Mbytes of fast SDRAM and 16Mbytes of Flash ROM, the Nexys-2 is ideally
suited to embedded processors like Xilinx's 32-bit RISC Microblaze. The on-board highspeed USB2 port, together with a collection of I/O devices, data ports, and expansion
connectors, allow a wide range of designs to be completed without the need for any
additional components.
The Nexys2 circuit board is a complete, ready-to-use circuit development platform
based on a Xilinx Spartan 3E FPGA. Its onboard high-speed USB2 port, 16Mbytes of
RAM and ROM, and several I/O devices and ports make it an ideal platform for digital
systems of all kinds, including embedded processor systems based on Xilinxs
MicroBlaze. The USB2 port provides board power and a programming interface, so the
Nexys2 board can be used with a notebook computer to create a truly portable design
station.

The block diagram of Nexys 2 board is as below:

Fig 1.2

Power Supplies
The Nexys2 board input power input bus can be driven from a USB cable, from a 5VDC15VDC,center positive, 2.1mm wall-plug supply, or from a battery pack. A shorting block
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loaded on thepower select jumper selects the power source. The USB circuitry is always
powered from the USB cable if no USB cable is attached, the USB circuitry is left
unpowered.

Fig 1.3
Features of a Nexys 2 board are
1) 500K-gate Xilinx Spartan 3E FPGA
2) USB2-based FPGA configuration and high-speed data transfers (using the free Adept
Suite Software)
3) USB-powered (batteries and/or wall-plug can also be used)
4) 16MB of Micron PSDRAM &16MB of Intel StrataFlash ROM
5) Xilinx Platform Flash for nonvolatile FPGA configurations
6) Efficient switch-mode power supplies (good for battery powered applications)
7) 50MHz oscillator plus socket for second oscillator
8) 60 FPGA I/Os routed to expansion connectors (one highspeed Hirose FX2
connector and four 6-pin headers)
9) 8 LEDs, 4-digit 7-seg display, 4 buttons, 8 slide switches
10) Ships in a plastic carry case with USB cable

And a Nexys 2 board is as shown below:

Fig 1.4
The steps to implement the design are listed below:
1. Create Verilog design input file(s) using template driven editor.
2. Compile and implement the Verilog design file(s).
3. Create the test-vectors and simulate the design (functional simulation) without using a PLD
(FPGA or CPLD).
4. Assign input/output pins to implement the design on a target device.
5. Download bitstream to an FPGA or CPLD device.
6. Test design on FPGA/CPLD device

1.4. Finite State Machine

A finite state machine (FSM) is a digital sequential circuit that consists on number of
pre-defined states that are controlled by one or more inputs.

The finite state machine remain stable until the inputs changes. There are two types of
finite state machines 1- Synchronous FSMs

2-Asynchronous FSMs.

Synchronous FSMs have a clock input and are also called Mealy machines, while
asynchronous FSMs are without clock input and are also called Moore machines

.The proposed algorithm for FPGA based vending machine is a sequential circuit
which is based on Mealy Model.

In a Moore machine Model the output of the machine totally depend on the present
state, while in a Mealy machine Model the output is depend on the present state as
well as the previous input.

In a Finite State Machine the circuits output is defined in a different set of states i.e.
each output is a state.

Any Sequential digital circuit can be converted into a state machine using a state
diagram.

In a State machine the circuits output is defined in a different set of states ie. each
output is a state.

There is a State Register to hold the state of the machine and a nextstate logic to
decode the nextstate.

There is also a output register that defines the output of the machine.

The nextstate logic is the sequential part of the machine and the Output and
Currentstate are the Register part of the logic.

There are two types of state machines: 1. MOORE 2. MEALY

MOORE MODEL:
In a moore machine the output state is totally dependent on the present state. The diagram
shows the information.

Fig 2.1
MEALY MODEL:
In a mealy machine the output depends on the input as well as the present state.

Fig 2.2

CHAPTER-2
2.1. COMPONENTS REQUIRED:

Software Used
For Synthesis : Xilinx ISE
For Simulation : Modelsim
For implementation: Nexys 2 FPGA board.

2.2. FLOW CHART

Fig 3.1

2.3. STATE DIAGRAM


The State Diagram of the Vending Machine is given here. It has the following states:

1. State 0: reset
2. State 5: Five
3. State 10: Ten
4. State 15: Fifteen
The next state is the Reset state again. The diagram is given below

Fig 3.2

CHAPTER-3

3.1. OPERATION OF VENDING MACHINE

When the user puts in money, money counter tells the control unit, the amount of
money inserted in the Vending Machine.

When the user presses the button to purchase the item that he wants, the control unit
turns on the motor and dispenses the product if correct amount is inserted.

If there is any change, machine will return it to the user.

The machine will demand for servicing when the products are not available inside the
Machine.

3.2. SYNTHESIS RESULTS


a.RTL SCHEMATIC

Fig 4.1

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b.TECHNOLOGY SCHEMATIC

Fig 4.2

3.3. SIMULATION RESULTS


FOR COINS=2b00, 2b10, 2b10

FOR COINS=2b00, 2b01, 2b01, 2b01

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FOR COINS=2b00, 2b10, 2b01

FOR ALL COMBINATIONS

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CHAPTER-4
4.1. IMPLEMENTATION RESULTS
TRUTH TABLE

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IF COIN IS 2b00

4.2. TIPS FOR SUCCESSFULLY IMPLEMENTING VENDING


STANDARDS:
1.Price

Beverages and foods that meet nutrition standards should be priced competitively (e.g., at or
below) to similar items that do not meet the nutrition standards (if you chose a phased in
approach).

2.Placement

Beverages and foods that meet nutrition standards should be as or more visible than similar
items that do not meet the nutrition standards (for example, they
should be closer to eye level).
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3.Promotion

Promotional space on vending machines (e.g., sides and front panel), including but not
limited to language and graphics, should promote only products that meet the nutrition
standards.

4.Hold taste tests

Partner with vendors to offer taste testing of a variety of snack and beverage options that
meet the nutrition standards. Have survey cards handy and tally up votes. Share results of
taste testing and keep vending machines stocked with favorite items.

5. Administer online surveys

Provide online surveys in addition to or in lieu of inperson taste testing. Use online surveys
as opportunities to promote healthy options in vending
machines.

6. Provide education and promote program

Work with nutrition committee or health team to provide education to leadership and
employees about the benefits of offering and choosing healthy foods and beverages. Use
available methods to promote healthy options, cultivate support for the program, and promote
educational events, taste testing, etc. Promotional methods might include posters, flyers,
ecards, emails to staff, newsletter articles, postings on bulletin boards, or signage near
vending machines. Work with leadership from outset for strong buyin and have leaderships
message and signature on promotional materials and messages.

7. Announce to community

Share information with the public to increase acceptance of the program and make healthier
snacking the norm. Share information with the public through press releases, social media,
etc.

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CHAPTER-5
5.1. FUTURE SCOPE OF VENDING MACHINE
a.VENDING MACHINE TECHNOLOGY
The Vending Machine technology has been employed in many governmental and school
settings. The following suggestions are provided to ensure a successful application:
Make sure everyone is aware of and educated about the installation and use of these units,
including local drink vendors, building managers, and users. Even though Coke and Pepsi
corporate management have approved the use of the Vending Machine, local reps may not be
informed.
Coordinate any moves of vending machines. The units use a photo sensor that is
permanently mounted to the wall or ceiling over the vending machines.
Be careful not to overload a circuit, where multiple vending machines are plugged into one
circuit. Repeaters are available that stagger the starts of multiple machines on one circuit.
Some facility managers suggest that Vending- Miser not be used with machines that
dispense dairy products.

b.VENDING MACHINE POWER SENSORS

Efforts should be made to incorporate the use of vending machine power sensors
(built-in or add-on devices) in all future contracts with beverage and snack machine
vendors. VendingMiser (add-on) products are now available on state contract for
NC agencies.

New refrigerated vending machines are making advances in energy efficiency,


through improvements in compressors, insulation, lighting, use sensors, and
programmable logic controllers. Request the highest energy efficient machines in new
contracts. Request that existing machines be upgraded.

c.NON REFRIGERATED VENDING MACHINE

Organizations can also substantially reduce the energy costs of non-refrigerated


vending machines by delamping or using occupancy controllers.

A typical snack machine can draw almost 100 Watts, costing $79 per year.
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5.2. APPLICATIONS

In railway stations this can be used to sell the train tickets.

In banks it can be used in ATM machines.

This can be implemented to vend soft drinks and snacks

5.3. ADVANTAGES

Convenient at any place

Low power consumption

Faster response

Less ouput delay

Easy to understand by an ordinary person

5.4. DISADVANTAGES

The stored items in Vending machine results for low nutrition and high calories
Which results health problems like heart diseases and over weight

Vending machines are insecured at some places

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5.5. CONCLUSION
It was observed through different scenarios, that FPGA based vending machine give fast
response and also show low power consumption and easy to use by an ordinary person.
FPGA based solution increases the efficiency and accuracy of vending machines. Also we
can monitor the FPGA based vending machine with the main frame computer. Its algorithm
is very flexible and reliable as the vendor can easily enhance the algorithm for large number
of products and coins of different denominations at low cost as compared to microprocessor
based vending machine. The present FPGA based vending machine controller is implemented
using FSMs with the help of Xilinx ISE Design Suite 13.2. The design is verified on the
DIGILENT NEXYS-8 XC3S500 FPGA development board. State machines based vending
Systems enhances productivity, reduces system development cost, and accelerates time to
market.

BIBLIOGRAPHY
1) Digital design using digilent FPGA boards verilog and active HDL
2)

Introduction to digital design using digilent FPGA boards

REFERENCES
http://www.electronicstoday.com
http://www. Eleccircuit.com
http://www.EngineersGarage.com
http://www.bayviewtech.com

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APPENDIX:
VERILOG CODE:
module vendingmachine(out,coin,clk,rst,change
);
output reg out;
output reg [1:0]change;
input [1:0] coin;
input

clk,rst;

reg [1:0] state,next_state;


reg [2:0] count;
parameter s0=2'd0,
s5=2'd1,
s10=2'd2,
s15=2'd3;
parameter x0=2'd0,
x5=2'd1,
x10=2'd2,
x15=2'd3;
always @ (posedge clk)
begin

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if(rst)
begin
state=s0;
end
else
state=next_state;
end
always@(state,coin)
begin
case(state)
s0:begin
count=3'd0;
if(coin==x5)
begin
next_state<=s5;
out=0;
count=count+3'd1;
end
else if(coin==x0)
begin

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next_state=s0;
count=count+3'd0;
out=0;
end
else if(coin==x10)
begin
next_state=s10;
count=count+3'd2;
out=0;
end
end // case: s0
s5:begin
if(coin==x0)
begin
next_state=s5;
out=0;
count=count+3'd0;
end
else if(coin==x5)
begin

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next_state=s10;
out=0;
count=count+3'd2;
end
else if(coin==x10)
begin
next_state=s15;
out=0;
count=count+3'd2;
end
end // case: s5
s10:
begin
if(coin==x0)
begin
next_state=s10;
out=0;
count=count+3'd0;
end
else if(coin==x5)

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begin
next_state=x15;
out=0;
count=count+3'd1;
end
else if(coin==x10)
begin
next_state=s15;
out=0;
count=count+3'd2;
end
end // case: s10
s15:
begin
if(count==3'd4&&coin==x10)
change=x5;
else
change=x0;
out=1;
next_state=s0;

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end
endcase
end // always @ (state,coin)
endmodule

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TEST BENCH:
coin = 2'b00;
clk = 0;
rst = 1;
#35;
clk = 1;
#35;
// 5,10
coin = 2'b01;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b10;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;

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//10,5
coin = 2'b00;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b10;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b01;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
//5,5,5

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coin = 2'b00;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b01;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b01;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b01;
clk = 0;

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rst = 0;
#35;
clk = 1;
#35;
//10,10
coin = 2'b00;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b10;
clk = 0;
rst = 0;
#35;
clk = 1;
#35;
coin = 2'b10;
clk = 0;
rst = 0;

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#35;
clk = 1;
#35;

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