Compal QCL51 Schematics Document

A
Compal Confidential
QCL51 Schematics Document
AMD Comal Platform

AMD Trinity APU / Hudson FCH / ATI Chelsea Pro M2
Muxless/UMA / PX 4.0 / PX 5.0
3
2011-10-26
LA-8712P REV: 0.1
2011/07/08
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2015/07/08
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Cover Page
Document Number
Rev
0.1
QCL51 LA-8712P
Monday, November 28, 2011
Sheet
E
of
56
Compal Confidential
Model Name : QCL51 AMD
Board Name : LA-8712P
1
64M x16
128M x 16
VRAM DDR3page
19, 20
AMD Comal
DDR3
Thermal Sensor
ATI Chelsea Pro M2
GFX x 16
Gen2
ADM1032
page 14
uFCBGA-962
Page 13~18
APU HDMI
(UMA / Muxless)
AMD FS1R2 APU

Trinity
DP2
DP0
Memory BUS(DDR3/DDR3L)
204pin DDRIII-SO-DIMM X2
Dual Channel
Page 11,12
BANK 0, 1, 2, 3
1.5V DDRIII 1333/1600MHz
uPGA-722 Package
HDMI Conn.
page 23
1 CH
1 CH
LVDS Conn.
page 22
Page 6~10
DP1
LVDS
Translator
ANX3112
P_GPP x 3
GEN1
page 21
DP x 4
(DP1 TXP/N 0~4)
Daughter board
UMI
ML for FCH VGA
CRT Conn.
USB20
Sub/B*1
USB Charger
USB30
Sub*1
Repeater
page 40
page 40
page 24
MINI Card 1
(Wireless LAN with BT)
USB 2.0 Port 8
FCH
Hudson-M3
GPP0
Card Reader/Gbe Lan

Realtek RTL8411
page 32
page 31
SATA
HD Audio
FP
Gen3 6Gb/s
Gen2 3Gb/s
port 0
port 1
SATA HDD
ENE
KBC932
page
LED
page 39
Touch Pad
page 39
page 38
HDA Codec
IDT 92HD91 page
37
Fan Control
SPK
33
page 36
Int.KBD
page 38
HP Amp
page 35
Sub Woofer
Amp page 34
BIOS ROM
page 38
SYS BIOS (4M)

Combo
jack page
FAN/LED
4
page 30
Daughter board
Daughter board
Power/B with LED
page 39
SATA ODD
page 30
Power On/Off CKT.
USB 2.0 Port 10,11
LPC BUS
page 31
Daughter board
page 39
page 26
36
Sub Woofer
page 34
EC BIOS (256K)
page 30
DC/DC
Interface CKT.page
page 38
42
Power Circuit
Compal Secret Data
2011/07/08
Issued Date
2015/07/08
Deciphered Date
Title
Size
B
page 44~56
Date:
USB 3.0 Port 0,1
USB
Page 25~29
page 25
Port 5
Port 1
Transformer / RJ45
RTC CKT.
page 41
USB 2.0 Port 12
uFCBGA-656
page 31
SD slot
USB30
M/B*2
page 22
USB 3.0 Port 2
Port 0
GPP1
CMOS
Camera
Block Diagrams
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
of
56
CLOCK DISTRIBUTION
DISPLAY OUTPUT
A_SODIMM
B_SODIMM
AMD
ATI VGA
DDRA_CLK0P/N
DDRA_CLK1P/N
1066~1866MHz
DDRB_CLK0P/N
DDRB_CLK1P/N
1066~1866MHz
Chelsea Pro
LVDS CONN
APU_TXOUT[0:2]+/APU_TXOUT_CLK+/APU_LVDS_CLK/DATA
CLK_PEG_VGAP/N
100MHz
APU_DISP_CLKP/N
C
AMD
AMD
100MHz
CPU FS1 SOCKET
APU_CLKP/N
100MHz
LVDS_OUT
RTD2132
FCH
Hudson-M2/M3
Internal CLK GEN
DP_IN
GPP_CLK
DP0_AUX
100MHz
32.768KHz 25MHz
LVDS Transtator
X5
X1
DP0_TXP/N0
DP0_AUXP/N
GPP2
WLAN
Mini PCI Socket
GPP3
APU
GbE LAN/
Card reader
DP1
DP0
PCIE_GFX[0:15]
DPE
DPF
PCIE_GFX[0:15]
DP2
VGA
DAC1
DPA
25MHz
YL1
FCH
CRT CONN
HDMI CONN
2011/07/08
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
CLOCK / DISPLAY DISTRIBUTION
Size
Document Number
Custom QCL51 LA-8712P
Date:
Rev
0.1
Sheet
1
of
56
ZZZ1
Voltage Rails
Power Plane
Description
SIGNAL
S1
S3
S5
STATE
+VALW
+V
+VS
Full ON
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+APU_CORE
Core voltage for CPU
ON
OFF
OFF
+APU_CORE_NB
Voltage for On-die VGA of APU
ON
OFF
OFF
+VGA_CORE
0.95-1.2V switched power rail
ON
OFF
OFF
+VDDCI
0.95-1.2V switched power rail
ON
OFF
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
ON
OFF
+0.935VGS
0.935V switched power rail for VGA
ON
OFF
OFF
1.1V switched power rail for FCH
ON
ON
ON*
1.1V switched power rail for FCH
ON
OFF
OFF
+1.2VS
1.2V switched power rail for APU
ON
OFF
OFF
Vcc
Ra/Rb
+1.5V
1.5V power rail for CPU VDDIO and DDR
ON
ON
OFF
Board ID
+1.5V_PCIE
1.5V switched power rail
ON
OFF
OFF
OFF
0
1
2
3
4
5
6
7
ON
OFF
+2.5VS
2.5V for CPU_VDDA
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+LAN_VDD_3V3
3.3V power rail for LAN
ON
ON
ON
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Clock
PCB
Part Number = DA80000SH00

PCB 0OH LA-8712P REV0 M/B
Board ID / SKU ID Table for AD channel
+1.1ALW
+1.1VS
+1.8VGS
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
3.3V +/- 5%
100K +/- 5%
Ra / Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
BOARD ID Table
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
BOM Option Table

BOM
Structure
Description
PX@
PX function
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
DB
BOM Config
UMA
PX
V
x = 1 is read cmd, x= 0 is writee cmd.
External PCI Devices

Device
IDSEL#
REQ#/GNT#
Interrupts
EC SM Bus1 address
EC SM Bus2 address
Device
Address
HEX
Device
Address
HEX
Smart Battery
0001 011X b
16H
ADI ADM1032 (GPU)
1001 101X b
9AH
SB-TSI (APU)
1001 100X b
98H
LVDS TR
1010 100X b
A8H
VGA Internal Thermal
1000 001X b
82H
FCH (S0)
SM Bus 0 address
FCH (S0~S5)
SM Bus 1 address
Device
Address
HEX
Device
DDR DIMM1
1010 000X b
A0
Touch pad
DDR DIMM2
1010 001X b
A2
Address
HEX
2011/07/08
Issued Date
Compal Secret Data
Amplifier
2015/07/08
Deciphered Date
Title
Size
B
Date:
Notes List
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
of
56
AMD APU FS1R2

BATTERY
12.6V
PU2000
ISL6277HRTZ-T
PU101
CHARGER
BQ24738ARGRR
BATT+
+APU_CORE
+APU_CORE
+APU_CORE_NB
+2.5VS
+APU_CORE_NB
+2.5VS
AC ADAPTOR
19V 90W
PU501
RT8207MZQW
VIN
+1.5V
+1.5V
+0.75VS
+1.2VS
PU702
APL5508
0.7~1.475V
VDD CORE 60A
0.7~1.475V
VDDNB 44A
+2.5VS
VDDA 0.5A
+1.5V
VDDIO 3.2A
+1.2VS
VDDR 8.5A
RAM DDRIII SODIMMX2

PU701
RT8237EZQW
B+
+1.2VS
+1.5V
+0.75VS
+1.5V
VDD_MEM 4A
+0.75VS
VTT_MEM 0.5A
VGA ATI
Chelsea Pro
+VGA_CORE
PU900
ADP3211MNR2G
+VGA_CORE
0.85~1.1V
VDDC 28A
0.9~1.0V
VDDCI 4.6A
+0.935VGS
+0.935VGS
DPLL_VDDC: 125 mA
SPV10: 100 mA
PCIE_VDDC: 1100 mA
DP[A:E]_VDD10: 880 mA
+1.5VGS
+1.5VGS
VDDR1: 1200 mA
+VDDCI
PU1000
SY8033BDBC
+VDDCI
+0.935VGS
PU935
SY8809DFC
+1.5V_PCIE
+1.5VGS
PU1501
SY8036DBC
PU801
SY8809DFC
UV19
AO4430L
+1.1VALW
+1.5VGS
PU301
RT8205LZQW
VRAM 512/1GB/2GB
64M / 128Mx16 * 4 / 8
+3VALW
U40
SI4800
PU401
+1.8VGS
SY8033BDBC
+1.8VGS
QV16
AP2301GN
+3VSG
+1.8VGS
+INVPWR_B+
+3VS
+5VALW
2.4 A
PLL_PVDD: 75 mA
TSVDD: 5 mA
AVDD: 70 mA
VDD1DI: 45 mA
VDD_CT: 17mA
PCIE_VDDR: 440 mA
DP[A:F]_VDD18: 990 mA
SPV18: 50mA
MPV18: 150mA
+3VS
U38
SI4800
+3VSG
B+ 300mA
U39
AO4430L
+3.3 350mA
+1.1VS
+1.1VS
+1.1VS
VDDPL_11_DAC: 7 mA
VDDAN_11_ML: 226 mA
VDDCR_11: 1007 mA
VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
+1.1VALW
VDDAN_11_USB_S: 140 mA
VDDCR_11_USB_S: 42 mA
VDDAN_11_SSUSB_S: 282 mA
VDDCR_11_SSUSB_S: 424 mA
VDDCR_11_S: 187 mA
VDDPL_11_SYS: 70 mA
VDDCR_11_GBE_S:63mA
+5VS
FAN Control
APL5607
+1.1VALW
+5VS 500mA
RM13
U54
AP2301MPG
+USB3_VCCA
+5VALW
+3VS
+3VS
+USB_BS
+5V
Dual+1
2.5A
U61
TPS2540RTER
+3VALW
USB3.0 X1
USB2.0 X1
+5V
Dual+1
2.5A
+3VS
+1.5VS_WLAN
USB3.0 X2
+3VALW
+3VALW
SATA
HDD*1
ODD*1
+5V 3A
Audio Codec
IDT 92HD91
+5V 45mA
+3.3VS 25mA
VDDR3: 60 mA
FCH AMD Hudson M3
+5VS
LCD panel
15.6"
+3VGS
JUMP @
EC
ENE KB932
LAN /Card reader

RTL8411
+3.3VALW 30mA
+3.3VS 3mA
+3.3VALW 201mA
Mini Card
WLAN
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA
RTC
Bettary
VDDIO_33_PCIGP: 102 mA
VDDPL_33_SYS: 47 mA
VDDPL_33_DAC: 20 mA
VDDPL_33_ML: 12 mA
VDDAN_33_DAC: 30 mA
VDDPL_33_PCIE: 11 mA
VDDPL_33_SATA: 12 mA
VDDPL_33_USB_S: 14 mA
VDDPL_33_SSUSB_S: 11 mA
VDDIO_AZ_S: 26 mA
VDDAN_33_USB_S: 470 mA
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
VDDAN_33_HWM_S: 12 mA
VDDIO_GEB_S: 145mA
VDDIO_33_GBE_S: 2mA
GND
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
RTC BAT
VDDBT_RTC_G
2011/07/08
Deciphered Date
2015/07/08
Title
POWER DELIVERY CHART

Size
Document Number
Custom QCL51 LA-8712P
Date:
Compal Secret Data
Issued Date
Rev
0.1

1
Sheet
of
56
13
PCIE_GTX_C_FRX_P[0..15]
PCIE_FTX_C_GRX_P[0..15]
13
13
PCIE_GTX_C_FRX_N[0..15]
PCIE_FTX_C_GRX_N[0..15]
13
JCPU1A
GLAN/Card reader
WLAN
UMI
3
31
31
32
32
PCIE_DTX_C_FRX_P0
PCIE_DTX_C_FRX_N0
PCIE_DTX_C_FRX_P1
PCIE_DTX_C_FRX_N1
25
25
25
25
25
25
25
25
UMI_MTX_C_FRX_P0
UMI_MTX_C_FRX_N0
UMI_MTX_C_FRX_P1
UMI_MTX_C_FRX_N1
UMI_MTX_C_FRX_P2
UMI_MTX_C_FRX_N2
UMI_MTX_C_FRX_P3
UMI_MTX_C_FRX_N3
+1.2VS
AE5
AE6
AD8
AD7
AC9
AC8
AC5
AC6
AG8
AG9
AG6
AG5
AF7
AF8
AE8
AE9
1
R539
2
P_ZVDDP AG11
196_0402_1%
P_ZVDDP W/S=8/12 mil, <3000mil
PCI EXPRESS
P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
P_GFX_RXP3
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
P_GFX_RXP6
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
P_GFX_RXP9
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P_GFX_RXP12
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15
GRAPHICS
GPU
AB8
AB7
AA9
AA8
AA5
AA6
Y8
Y7
W9
W8
W5
W6
V8
V7
U9
U8
U5
U6
T8
T7
R9
R8
R5
R6
P8
P7
N9
N8
N5
N6
M8
M7
P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3
P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3
GPP
PCIE_GTX_C_FRX_P0
PCIE_GTX_C_FRX_N0
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
PCIE_GTX_C_FRX_P2
PCIE_GTX_C_FRX_N2
PCIE_GTX_C_FRX_P3
PCIE_GTX_C_FRX_N3
PCIE_GTX_C_FRX_P4
PCIE_GTX_C_FRX_N4
PCIE_GTX_C_FRX_P5
PCIE_GTX_C_FRX_N5
PCIE_GTX_C_FRX_P6
PCIE_GTX_C_FRX_N6
PCIE_GTX_C_FRX_P7
PCIE_GTX_C_FRX_N7
PCIE_GTX_C_FRX_P8
PCIE_GTX_C_FRX_N8
PCIE_GTX_C_FRX_P9
PCIE_GTX_C_FRX_N9
PCIE_GTX_C_FRX_P10
PCIE_GTX_C_FRX_N10
PCIE_GTX_C_FRX_P11
PCIE_GTX_C_FRX_N11
PCIE_GTX_C_FRX_P12
PCIE_GTX_C_FRX_N12
PCIE_GTX_C_FRX_P13
PCIE_GTX_C_FRX_N13
PCIE_GTX_C_FRX_P14
PCIE_GTX_C_FRX_N14
PCIE_GTX_C_FRX_P15
PCIE_GTX_C_FRX_N15
UMI
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVDDP
P_ZVSS
AB2
AB1
AA3
AA2
Y5
Y4
Y2
Y1
W3
W2
V5
V4
V2
V1
U3
U2
T5
T4
T2
T1
R3
R2
P5
P4
P2
P1
N3
N2
M5
M4
M2
M1
PCIE_FTX_GRX_P0
PCIE_FTX_GRX_N0
PCIE_FTX_GRX_P1
PCIE_FTX_GRX_N1
PCIE_FTX_GRX_P2
PCIE_FTX_GRX_N2
PCIE_FTX_GRX_P3
PCIE_FTX_GRX_N3
PCIE_FTX_GRX_P4
PCIE_FTX_GRX_N4
PCIE_FTX_GRX_P5
PCIE_FTX_GRX_N5
PCIE_FTX_GRX_P6
PCIE_FTX_GRX_N6
PCIE_FTX_GRX_P7
PCIE_FTX_GRX_N7
PCIE_FTX_GRX_P8
PCIE_FTX_GRX_N8
PCIE_FTX_GRX_P9
PCIE_FTX_GRX_N9
PCIE_FTX_GRX_P10
PCIE_FTX_GRX_N10
PCIE_FTX_GRX_P11
PCIE_FTX_GRX_N11
PCIE_FTX_GRX_P12
PCIE_FTX_GRX_N12
PCIE_FTX_GRX_P13
PCIE_FTX_GRX_N13
PCIE_FTX_GRX_P14
PCIE_FTX_GRX_N14
PCIE_FTX_GRX_P15
PCIE_FTX_GRX_N15
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
AD5
AD4
AD2
AD1
AC3
AC2
AB5
AB4
PCIE_FTX_DRX_P0
PCIE_FTX_DRX_N0
PCIE_FTX_DRX_P1
PCIE_FTX_DRX_N1
C950
C951
C952
C953
1
1
1
1
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
AG2
AG3
AF4
AF5
AF1
AF2
AE2
AE3
UMI_FTX_MRX_P0
UMI_FTX_MRX_N0
UMI_FTX_MRX_P1
UMI_FTX_MRX_N1
UMI_FTX_MRX_P2
UMI_FTX_MRX_N2
UMI_FTX_MRX_P3
UMI_FTX_MRX_N3
C956
C957
C958
C959
C960
C961
C962
C963
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
AH11
P_ZVSS
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
1
R540
C917
C918
C919
C920
C921
C922
C923
C924
C925
C926
C927
C928
C929
C930
C931
C932
C933
C934
C936
C937
C938
C939
C940
C941
C942
C943
C944
C945
C946
C947
C948
C949
PCIE_FTX_C_GRX_P0
PCIE_FTX_C_GRX_N0
PCIE_FTX_C_GRX_P1
PCIE_FTX_C_GRX_N1
PCIE_FTX_C_GRX_P2
PCIE_FTX_C_GRX_N2
PCIE_FTX_C_GRX_P3
PCIE_FTX_C_GRX_N3
PCIE_FTX_C_GRX_P4
PCIE_FTX_C_GRX_N4
PCIE_FTX_C_GRX_P5
PCIE_FTX_C_GRX_N5
PCIE_FTX_C_GRX_P6
PCIE_FTX_C_GRX_N6
PCIE_FTX_C_GRX_P7
PCIE_FTX_C_GRX_N7
PCIE_FTX_C_GRX_P8
PCIE_FTX_C_GRX_N8
PCIE_FTX_C_GRX_P9
PCIE_FTX_C_GRX_N9
PCIE_FTX_C_GRX_P10
PCIE_FTX_C_GRX_N10
PCIE_FTX_C_GRX_P11
PCIE_FTX_C_GRX_N11
PCIE_FTX_C_GRX_P12
PCIE_FTX_C_GRX_N12
PCIE_FTX_C_GRX_P13
PCIE_FTX_C_GRX_N13
PCIE_FTX_C_GRX_P14
PCIE_FTX_C_GRX_N14
PCIE_FTX_C_GRX_P15
PCIE_FTX_C_GRX_N15
GPU
PCIE_FTX_C_DRX_P0
PCIE_FTX_C_DRX_N0
PCIE_FTX_C_DRX_P1
PCIE_FTX_C_DRX_N1
UMI_FTX_C_MRX_P0
UMI_FTX_C_MRX_N0
UMI_FTX_C_MRX_P1
UMI_FTX_C_MRX_N1
UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2
UMI_FTX_C_MRX_P3
UMI_FTX_C_MRX_N3
31
31
32
32
25
25
25
25
25
25
25
25
GLAN/Card reader
WLAN
UMI
2
196_0402_1%
P_ZVSS W/S=8/12 mil, <3000mil
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
Size
B
Date:
AMD FS1R2 PCIE / GFX / UMI

Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
of
56
JCPU1C
JCPU1B
11
11
11
11
11
DDRA_SMA[15..0]
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SDM[7..0]
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
11
11
DDRA_CKE0
DDRA_CKE1
11
11
DDRA_ODT0
DDRA_ODT1
11
11
DDRA_SCS0#
DDRA_SCS1#
11
11
11
11
11
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
U24
U21
L23
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
11
11
11
11
U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
L24
AA25
L21
L20
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
MEM_MA_RST#
MEM_MA_EVENT#
G14
H14
G18
H18
J21
H21
E27
E26
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
T21
T22
R23
R24
DDRA_CKE0
DDRA_CKE1
H28
H27
DDRA_ODT0
DDRA_ODT1
Y25
AA27
DDRA_SCS0#
DDRA_SCS1#
V22
AA26
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
V21
W24
W23
MEM_MA_RST#
MEM_MA_EVENT#
H25
T24
W20
+MEM_VREF
1
R541
+1.5V
E14
J17
E21
F25
AD27
AC23
AD19
AC15
2 M_ZVDDIO
39.2_0402_1%
W21
MEMORY CHANNEL A
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1
MA_ODT0
MA_ODT1
MA_CS_L0
MA_CS_L1
MA_RAS_L
MA_CAS_L
MA_WE_L
MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
12
E13
J13
H15
J15
H13
F13
F15
E15
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
H17
F17
E19
J19
G16
H16
H19
F19
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
H20
F21
J23
H23
G20
E20
G22
H22
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
G24
E25
G27
G26
F23
H24
E28
F27
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDQ[63..0]
DDRB_SMA[15..0]
11
12
12
12
12
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SDM[7..0]
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
12
12
12
12
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
12
12
DDRB_CKE0
DDRB_CKE1
12
12
DDRB_ODT0
DDRB_ODT1
12
12
DDRB_SCS0#
DDRB_SCS1#
12
12
12
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
12
12
MEM_MB_RST#
MEM_MB_EVENT#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
T27
P24
P25
N27
N26
M28
M27
M24
M25
L26
U26
L27
K27
W26
K25
K24
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
U27
T28
K28
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
D14
A18
A22
C25
AF25
AG22
AH18
AD14
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C15
B15
E18
D18
E22
D22
B26
A26
AG24
AG25
AG21
AF21
AG17
AG18
AH14
AG14
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
R26
R27
P27
P28
DDRB_CKE0
DDRB_CKE1
J26
J27
DDRB_ODT0
DDRB_ODT1
W27
Y28
DDRB_SCS0#
DDRB_SCS1#
V25
Y27
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
V24
V27
V28
MEM_MB_RST#
MEM_MB_EVENT#
J25
T25
MEMORY CHANNEL B
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CKE0
MB_CKE1
MB_ODT0
MB_ODT1
MB_CS_L0
MB_CS_L1
MB_RAS_L
MB_CAS_L
MB_WE_L
MB_RESET_L
MB_EVENT_L
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
A14
B14
D16
E16
B13
C13
B16
A16
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
C17
B18
B20
A20
E17
B17
B19
C19
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
C21
B22
C23
A24
D20
B21
E23
B23
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
E24
B25
B27
D28
B24
D24
D26
C27
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRB_SDQ[63..0]
12
CONN@
M_ZVDDIO W/S=8/12 mil, <1000mil

CONN@
0.75V reference voltage
+1.5V
+1.5V
+MEM_VREF 15mil
Close to JCPU1
R542
1K_0402_1%
EVENT# pull high
+MEM_VREF
2
2 1K_0402_5% MEM_MA_EVENT#
R545 1
2 1K_0402_5% MEM_MB_EVENT#
R543
1K_0402_1%
1
R544 1
C964
1000P_0402_50V7K
C965
.1U_0402_16V7K
Compal Secret Data
2011/07/08
Issued Date
2015/07/08
Deciphered Date
Title
AMD FS1 DDRIII I/F
Size Document Number
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
E
of
56
DP0_TXP1
DP0_TXN1
K2
K1
DP0_TXP2
DP0_TXN2
J3
J2
DP0_TXP3
DP0_TXN3
APU_SIC
2 1K_0402_5%
APU_SID
R791 1
2 1K_0402_5%
ALERT_L
R604 2
1 1K_0402_5%
R577 2
26
26
ALLOW_STOP
To HDMI
1 1K_0402_5%
@
Allow_STOP leakage issue

+1.5V_PCIE
1 @
R613
1
R616
2
+1.5V
2
11/14
0_0402_5%
2
0_0402_5%
R578 2
1 300_0402_5%
R580 2
APU_RST#
1 300_0402_5%
APU_PWRGD
2 1K_0402_5%
APU_SVC
R576 1
2 1K_0402_5%
APU_SVD
2 1K_0402_5%
APU_SVT
R92
100MHz
NSS
C38
2
C36
2
C35
APU_HDMI_TXD2+
APU_HDMI_TXD2-
23
23
APU_HDMI_TXD1+
APU_HDMI_TXD1-
23
23
APU_HDMI_TXD0+
APU_HDMI_TXD0-
23
23
APU_HDMI_TXC+
APU_HDMI_TXC25
25
25
25
1
122P_0402_50V8J
22P_0402_50V8J
1
122P_0402_50V8J
22P_0402_50V8J
DP1_TXP1
DP1_TXN1
H2
H1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP1_TXP2
DP1_TXN2
G3
G2
C980 1
C981 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
DP1_TXP3
DP1_TXN3
F2
F1
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
DP2_TXP0
DP2_TXN0
DP2_TXP1
DP2_TXN1
K8
K7
DP2_TXP2
DP2_TXN2
J6
J5
APU_CLKP
APU_CLKN
APU_DISP_CLKP
APU_DISP_CLKN
54
2
C4702
2
C4703
2
2
C4704
C4705
2 .1U_0402_16V7K
2 .1U_0402_16V7K
C978 1
C979 1
DP1_TXP0
DP1_TXN0
L5
L6
APU_CLKP
APU_CLKN
AE11
AD11
APU_DISP_CLKP
APU_DISP_CLKN
AB11
AA11
APU_SVC
SB-TSI (S5 Domain)

APU_RST#
R598 1
APU_PWRGD R615 1
ALLOW_STOP
R623 1 @
APU_CLKP
APU_CLKN
DISP_CLKIN_H
DISP_CLKIN_L
T18
Internal PU when no use HDT
11/15 RF
T17
APU_VDDNB_SEN
T21
54 APU_VDD_SEN
RESET_L
PWROK
DMAACTIVE_L
PROCHOT_L
THERMTRIP_L
ALERT_L
B4
C5
A4
A5
C4
B5
APU_VDDNB_SEN
APU_VDD_SEN
DP4_AUXP
DP4_AUXN
DP5_AUXP
DP5_AUXN
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_BL
DP_AUX_ZVSS
TEST6
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST32_H
TEST32_L
SIC
SID
H10
J10
F10
G10
F9
G9
H9
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
APU_VDD_RUN_FB_L
54
SVC
SVD
SVT
2 0_0402_5% APU_RST#_APU
AF10
2 0_0402_5% APU_PWRGD_APU AB12
AC12
2 0_0402_5%
APU_PROCHOT# AC10
APU_THERMTRIP# AE12
AF12
ALERT_L
APU_DISP_CLKP
APU_DISP_CLKN
54
CLKIN_H
CLKIN_L
AG12
AH12
APU_SIC
APU_SID
DP3_AUXP
DP3_AUXN
DP2_TXP3
DP2_TXN3
B3
A3
C3
APU_SVC
APU_SVD
APU_SVT
25 APU_RST#
25,54 APU_PWRGD
25 ALLOW_STOP
45 H_PROCHOT#
APU_RST#
33P_0402_50V8J
APU_PWRGD
33P_0402_50V8J
1
APU_PROCHOT#
22P_0402_50V8J
1
APU_THERMTRIP#
22P_0402_50V8J
C969 1
C970 1
H5
H4
L9
L8
SVI 2.0
54 APU_SVD
(0 ohm
54 APU_SVT
at Power Side)
For ESD request close APU side
C40
ML_VGA_TXP3
ML_VGA_TXN3
23
23
100MHz
Reserve
R575 1
ML_VGA_TXP2
ML_VGA_TXN2
DP1_TXP0
DP1_TXN0
TEST
2 1K_0402_5%
R581 1
ML_VGA_TXP1
ML_VGA_TXN1
26
26
2 .1U_0402_16V7K
2 .1U_0402_16V7K
TEST4
TEST5
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST35
TEST25_H
TEST25_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE
TEST31
D1
D2
DP0_AUXP
DP0_AUXN
C972 1
C974 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
E1
E2
ML_VGA_AUXP
ML_VGA_AUXN
C975 1
C976 1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
D5
D6
DP0_AUXP_C
DP0_AUXN_C
ML_VGA_AUXP_C
ML_VGA_AUXN_C
APU_HDMI_CLK
APU_HDMI_DATA
To LVDS Translator
21
21
26
26
APU_HDMI_CLK
23
APU_HDMI_DATA
23
To FCH
1
1
1.8K_0402_5%
1.8K_0402_5%
1
1.8K_0402_5%
1
1.8K_0402_5%
To HDMI
E5
E6
1
F5
F6
G5
G6
D3
E3
D7
E7
F7
G7
DP0_HPD
DP1_HPD
DP2_HPD
C6
B6
A6
DP_ENBKL
C1
DP_AUX_ZVSS R569 1
DP0_HPD
DP1_HPD
DP2_HPD
LVDS/eDP
CRT
HDMI
10
10
23
LA-8124 no use this DP_ENBKL.

Del DP_ENVDD
DP_INT_PWM
DP_ENBKL
10
2 150_0402_1%
AD12
L10
M10
P19
R19
T19
N19
VDDIO level
Need Level shift
10
DP_INT_PWM
DP_AUX_ZVSS W/S=8/12 mil, <3000mil
T16
T15
P18
R18
M18
N18
F11
G11
H11
J11
T6
T7
T8
T9
T10
T11
T12
T13
F12
G12
J12
H12
APU_TEST18
APU_TEST19
APU_TEST20
APU_TEST24
R582
R583
R584
R574
1
1
1
1
AA12
TEST35
AE10
AD10
TEST25_H
TEST25_L
R558
R559
R557
R548
1
1
1
1
K22
M_TEST
R564 1
R567 1
W10
FS1R2
R571 1
2
2
2
2
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
2
2
2
2
300_0402_5%
300_0402_5%
510_0402_1%
510_0402_1%
+1.5V
2 39.2_0402_1%
2 39.2_0402_1%
+1.5V
2 10K_0402_5%
+3VALW
TEST35 change to PU for

HDMI can not output
20110126
+1.2VS
RSVD1
RSVD2
RSVD3
RSVD4
+1.5V
Y10
AA10
Y12
K21
CONN@
Route as differential with APU_VDD_RUN_FB_L
2
R554
DP0_AUXN
11/14 Change net name

FS1R2
RSVD
R579 1
26
26
C977 1
C968 1
DISPLAY PORT 1
To FCH
VGA ML
ML_VGA_TXP0
ML_VGA_TXN0
DP2_AUXP
DP2_AUXN
DISPLAY PORT 2
+1.5V
26
26
DP1_AUXP
DP1_AUXN
CLK
Del DP0_TXP1/N1
DISPLAY PORT
MISC.
K5
K4
DP0_AUXP
DP0_AUXN
DISPLAY PORT
0
DP0_TXP0
DP0_TXN0
2
R555
2
ML_VGA_AUXP
R547
2
ML_VGA_AUXN
R556
DP0_AUXP
ANALOG/DISPLAY/MISC
L3
L2
DP0_TXP0
DP0_TXN0
SER.
2 .1U_0402_16V7K
2 .1U_0402_16V7K
CTRL
To LVDS
Translator
JCPU1D
C971 1
C973 1
DP0_TXP0_C
DP0_TXN0_C
JTAG
21
21
Place near APU
Close to APU (JCPU1)
SENSE
Close to Header
R592 1
2 1K_0402_5%
APU_TDI
R593 1
2 1K_0402_5%
APU_TCK
R594 1
2 1K_0402_5%
APU_TMS
R595 1
2 1K_0402_5%
APU_TRST#
R596 1
2 1K_0402_5%
APU_DBREQ#
10/27 300 ohm??

+3VS
31.6K_0402_1%
30K_0402_1%
When APU High -> MOS OFF (Vgs < 0.4V )

APU Low -> MOS ON (Vgs > 1.3V)
R587
10K_0402_5%
R591
Q11
1
0_0402_5%
+1.5V
EC_SMB_DA2
EC_THERM#
Vg = 1.607 V
Q9
EC_SMB_DA2
14,21,37
EC_SMB_CK2
14,21,37
THERMTRIP shutdown
temperature: 115 degree
25,37,45,54
MMBT3904_SOT23-3
11/10 del debug connector
Indicates to the FCH that a thermal trip

has occurred. Its assertion will cause the FCH
to transition the system to S5 immediately
R610
1K_0402_5%
EC_SMB_CK2
R609
10K_0402_5%
2 2
Q10
3
S
APU_SIC
BSH111_SOT23-3
APU_PROCHOT#
APU_SID
R588
10K_0402_5%
1 R536
+3VS
2 2
B
R586
1K_0402_5%
1 R535
HDT Debug conn
2 0.1U_0402_16V4Z
+1.5V
C935 1
Asserted as an input to
force processor into
HTC-active state
BSH111, the Vgs is:

min = 0.4V
Max = 1.3V
CPU TSI interface level shift
APU_THERMTRIP#
BSH111_SOT23-3
Q12
1
C
MMBT3904_SOT23-3
1
R611
1
R612
2
0_0402_5%
2
0_0402_5%
H_THERMTRIP#
MAINPWON
27
Compal Secret Data
Issued Date
45,46
2011/07/08
Deciphered Date
2015/07/08
Title
AMD FS1 Display / MISC / HDT
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet

E
of
56
VDD
+CPU_CORE
60A
VDDNB
+CPU_CORE_NB
37A
+CPU_CORE Decoupling
JCPU1F
VDDIO
+1.5V
On power team page
5A / 3.5A
VDDA
+2.5VS
J20
L4
R7
W18
A15
AB17
AC22
AE21
AF24
AH23
AH25
B7
C14
C16
C2
C20
C22
C24
C26
C28
D13
D15
D17
D19
D23
D25
D27
E4
E9
F14
F16
F18
F20
F22
F26
F28
G13
G15
G17
G19
G21
G23
G25
G4
J22
J24
J4
J7
K11
K14
K9
AC11
L19
L7
M11
AF11
V19
V9
W16
W4
W7
Y11
Y20
Y22
Y9
A17
A13
K16
F24
G8
H7
J8
330uF x 4 @ x1
22uF x 10
0.22uF x2
0.01uF x3
180pF x2 @ x1
3.2A
VDDP / VDDR
+1.2VS
0.75A
+CPU_CORE_NB Decoupling
+CPU_CORE-->+APU_CORE
180P_0402_50V8J
180P_0402_50V8J
VDDP Decoupling
Close JCPU1.AH3~7
C1038
+1.2VS
C1035
10uF x3
0.22uF x2
1000pF x1
180pF x2
C1034
C50
C1037
C1036
C6
C7
C8
C51
VDDR Decoupling
Close JCPU1.AG10,AH8,AH9,AH10
0.22U_0402_10V4Z
0.22U_0402_10V4Z
330U_D2_2V_Y
330uF x1
22uF x4
4.7uF x4
0.22uF x6
180pF x1 @x1
+1.5V
C1030
+1.5V / VDDIO Decoupling
C1029
C1028
C1027
C5
180P_0402_50V8J
180P_0402_50V8J
C1025
C1024
0.22U_0402_10V4Z
0.22U_0402_10V4Z
C1023
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
C1022
C1045
1000P_0402_50V7K
C1044
C1048
0.22U_0402_10V4Z
C1053
0.22U_0402_10V4Z
10U_0603_6.3V6M
C1052
C52
10U_0603_6.3V6M
10U_0603_6.3V6M
C53
C1021
0.22U_0402_10V4Z
0.22U_0402_10V4Z
C1020
0.22U_0402_10V4Z
C1019
C1018
4.7U_0603_6.3V6K
C17
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
22U_0805_6.3V6M
22U_0805_6.3V6M
C16
C15
C14
C55
C56
+
2
FBMA-L11-201209-221LMA30T_0805
L1
1
180P_0402_50V8J
3300P_0402_50V7-K
C1043
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W14
P11
C7
E8
K18
W12
CONN@
+APU_VDDA
C1040
+1.2VS
0.22U_0402_10V4Z
47U_0805_4V6
VDDIO: 3200mA
C1041
C18
+1.5V
22uF x1
10uF x3
0.22uF x2
1000pF @x1
180pF x2
220uF x1
Northbridge Power Pins

for Remote Decoupling
AG10
AH8
AH9
AH10
180P_0402_50V8J
180P_0402_50V8J
+2.5VS
1000P_0402_50V7K
0.22U_0402_10V4Z
0.22U_0402_10V4Z
10U_0603_6.3V6M
T23
T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W22
W25
W28
Y24
G28
10U_0603_6.3V6M
VDDNB_CAP
10U_0603_6.3V6M
22U_0805_6.3V6M
K13
K12
180P_0402_50V8J
VDDR_1
VDDR_2
VDDR_3
VDDR_4
+1.2VS
C1026
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
+CPU_CORE_NB-->+APU_CORE_NB
22U_0805_6.3V6M
AB10
+APU_VDDA
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
+APU_CORE_NB
22U_0805_6.3V6M
AH6
AH5
AH4
AH3
AH7
+1.2VS
VDDP: 5000mA
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
C11
C12
D9
D8
D12
D11
B11
A12
B10
E12
B9
C1003
H26
K20
J28
K23
K26
L22
L25
L28
M20
M23
M26
N22
N25
N28
P20
P23
P26
AA28
+1.5V
3
+1.2VS
C1002
VDDNB_CAP_1
VDDNB_CAP_2
+1.5V
C54
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
Decoupling between CPU and DIMMs

across VDDIO and VSS split
22U_0805_6.3V6M
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
R11
T10
H8
G1
U11
W11
W13
W15
W17
W19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11
22U_0805_6.3V6M
C8
D10
B8
B12
C9
A9
A10
A8
A11
E10
E11
C10
+APU_CORE_NB
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
C1013
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
C1012
F8
H6
J1
J14
P6
P10
J16
J18
J9
K19
K3
K17
M3
K6
V10
V18
V3
F3
L18
V6
W1
T18
Y14
AA1
AB6
AC1
R1
P3
K10
H3
M19
330uF x2
22uF x2 @ x2
10uF x1
0.22uF x2
180pF x3
+APU_CORE
JCPU1E
POWER
+APU_CORE
On power team page
220U_6.3V_M
Consumption
GND
Power Name
VDDA Decoupling
Power Sequence of APU
47uF x1
0.22uF x1
3300pF x1
180pF x1
+1.5V
+2.5VS
Group A
VDDR: 3500mA
+1.5VS
VDDA
+CPU_CORE
VDDA: 750mA
CONN@
Group B
+CPU_CORE_NB
4
Decoupling Caps.
Pop / @
+1.2VS
330uF 220uF 47uF 22uF 10uF 4.7uF 0.22uF 0.01uF 3300pF 1nF
Pumori 2.0
19/11 7
17
1/1
180pF
13/3
Comal
7/2
19/11 7
17
1/1
14/2
P5WS5
7/2
13
19
16
2011/07/08
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
AMD FS1R2 PWR / GND
Custom
Date:
Rev
0.1
QCL51 LA-8712P
Sheet
E
of
56
Panel ENBKL
HPD
LA-8124 no use this DP_ENBKL.

+3VS
Del reserved NMOS
R614
4.7K_0402_5%
DP0_HPD
R617
100K_0402_5%
LVDS_HPD
LVDS_HPD
R86
2 0_0402_5%
@
1
APU_PCIE_RST#
13,21,25,31,32
RB751V-40_SOD323-2
DP_ENBKL
2
Q15
2
2
2.2K_0402_5% B
Q14
2N7002K_SOT23-3
G
S
R620
100K_0402_5%
1
R619
2
MMBT3904_SOT23-3
21
D16
2
From Translator or Conn.
DP0_HPD
Translator and eDP HPD
R624 1 @
DP_ENBKL
ENBKL
21,37
Del VGA_ENBKL
CRT HPD
DP1_HPD
From FCH
26
ENBKL
Reserved R624
Del reserved NMOS
2 0_0402_5%
eDP Panel ENVDD
FCH_CRT_HPD
FCH_CRT_HPD
Del eDP panel control

R88
2 0_0402_5%
+3VS
Panel PWM
R636
4.7K_0402_5%
2
R635
47K_0402_5%
21
APU_INVT_PWM
D
2
S
C
Q20
2N7002K_SOT23-3
2
B
Q21
E
MMBT3904_SOT23-3
DP_INT_PWM
1
G
R637
2.2K_0402_5%
1
2
R638
4.7K_0402_5%
Compal Secret Data
Issued Date
2011/07/08
2015/07/08
Deciphered Date
Title
AMD FS1R2 Singal Level Shifter
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
1
10
of
56
+VREF_DQA
+1.5V
DDRA_SDQ26
DDRA_SDQ27
7
2
DDRA_CKE0
DDRA_SBS2#
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
7
7
DDRA_CLK0
DDRA_CLK0#
7
7
DDRA_SBS0#
DDRA_SCS1#
DDRA_SMA13
DDRA_SCS1#
7
7
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
7
7
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
R643
10K_0402_5%
1
2
+3VS
+3VS
1
C1080
2.2U_0603_6.3V4Z
205
R645
1
C1081
0.1U_0402_16V4Z
10K_0402_5%
G1
G2
C1067
1
0.1U_0402_16V4Z
DDRA_SDQ22
DDRA_SDQ23
0.1U_0402_16V4Z
2
C1068
1
C1069
C1070
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1071
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1072
1
C1073
C1074
1
0.1U_0402_16V4Z
C1075
1
0.1U_0402_16V4Z
C1076
1
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQS3# 7
DDRA_SDQS3 7
+0.75VS
DDRA_SDQ30
DDRA_SDQ31
+1.5V
0.1U_0402_16V4Z
2
C1077
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDRA_CKE1
DDRA_CKE1
1
0.1U_0402_16V4Z
C1078
1
C1106
2
0.1U_0402_16V4Z
C1079
2
4.7U_0603_6.3V6K
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4

+VREF_CA
DDRA_SMA2
DDRA_SMA0
DDRA_CLK1
DDRA_CLK1#
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
+VREF_DQA
DDRA_CLK1 7
DDRA_CLK1# 7
DDRA_SBS1#
DDRA_SRAS#
7
7
+VREF_DQA
+VREF_CA
DDRA_SDQ36
DDRA_SDQ37
+VREF_CA 15mil
C1066
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
C1061
2
+VREF_CA 15mil
R639
1K_0402_1%
+VREF_DQ 15mil
15mil
DDRA_SCS0# 7
DDRA_ODT0 7
DDRA_ODT1
+1.5V
+1.5V
R641
1K_0402_1%
+VREF_CA
C1064
R640
1K_0402_1%
C1065
R642
1K_0402_1%
C1062
1000P_0402_50V7K
3
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# 7
DDRA_SDQS5 7
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# 7
DDRA_SDQS7 7
DDRA_SDQ62
DDRA_SDQ63
MEM_MA_EVENT#
MEM_MA_EVENT# 7
FCH_SDATA0 12,27,32,35
FCH_SCLK0 12,27,32,35
+0.75VS
4
206
LCN_DAN06-K4406-0102
2011/07/08
Issued Date
Compal Secret Data
DIMM_A REV H:4mm
2015/07/08
Deciphered Date
Title
DDRIII SO-DIMM 1
Custom
<Address: 00>
Rev
0.1
QCL51 LA-8712P
Date:
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
DDRA_SDM2
C1060
DDRA_SDQ32
DDRA_SDQ33
+1.5V
DDRA_SDQ20
DDRA_SDQ21
C1063
DDRA_SWE#
DDRA_SCAS#
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
Place near DIMM1
MEM_MA_RST# 7
DDRA_SDQ14
DDRA_SDQ15
4.7U_0603_6.3V6K
DDRA_SWE#
DDRA_SCAS#
DDRA_SMA10
DDRA_SBS0#
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
DDRA_SDM1
MEM_MA_RST#
4.7U_0603_6.3V6K
DDRA_CLK0
DDRA_CLK0#
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM3
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ18
DDRA_SDQ19
DDRA_SMA[0..15]
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SMA[0..15]
1000P_0402_50V7K
7
7
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQS0# 7
DDRA_SDQS0 7
DDRA_SDM[0..7]
0.1U_0402_16V4Z
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ[0..63]
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ8
DDRA_SDQ9
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
DDRA_SDQ2
DDRA_SDQ3
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1000P_0402_50V7K
DDRA_SDM0
DDRA_SDQS1#
DDRA_SDQS1
+1.5V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDRA_SDQ0
DDRA_SDQ1
7
7
JDIMM1
+VREF_DQ 15mil
0.1U_0402_16V4Z
Sheet
E
11
of
56
+VREF_DQB
+1.5V
+1.5V
JDIMM2
DDRB_SDQ8
DDRB_SDQ9
7
7
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
7
7
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ[0..63]
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQS0# 7
DDRB_SDQS0 7
DDRB_SDM[0..7]
DDRB_SMA[0..15]
DDRB_SMA[0..15]
DDRB_SDQ6
DDRB_SDQ7
1
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
MEM_MB_RST#
MEM_MB_RST# 7
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
Place near DIMM2
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
+1.5V
DDRB_SDQ28
DDRB_SDQ29
0.1U_0402_16V4Z
2
C1089
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQS3# 7
DDRB_SDQS3 7
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1090
C1091
1
0.1U_0402_16V4Z
C1093
1
0.1U_0402_16V4Z
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
7
7
7
DDRB_CLK0
DDRB_CLK0#
DDRB_SBS0#
7 DDRB_SWE#
7 DDRB_SCAS#
7
DDRB_SCS1#
DDRB_CLK0
DDRB_CLK0#
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA13
DDRB_SCS1#
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
7
7
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
R646
10K_0402_5%
1
2
+3VS
R648
G1
G2
C1096
1
0.1U_0402_16V4Z
2
C1097
C1098
1
0.1U_0402_16V4Z
C1099
DDRB_SMA11
DDRB_SMA7
1
0.1U_0402_16V4Z
C1100
1
C1107
+1.5V
2
0.1U_0402_16V4Z
1
+
C1101
2
4.7U_0603_6.3V6K
@
C9
330U_D2_2V_Y
Change To D2 Type 20110905
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_CLK1
DDRB_CLK1#
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1
DDRB_CLK1 7
DDRB_CLK1# 7
DDRB_SBS1#
DDRB_SRAS#
7
7
DDRB_ODT1
+VREF_DQB
15mil
+VREF_CB
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
+1.5V
+VREF_DQ 15mil
+VREF_CA 15mil
C1088
1000P_0402_50V7K
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
+1.5V
DDRB_SCS0# 7
DDRB_ODT0 7
+VREF_DQB
C1083
R649
1K_0402_1%
+VREF_CB
+VREF_CA 15mil
C1084
+VREF_CB
R650
1K_0402_1%
C1086
R647
1K_0402_1%
C1087
R644
1K_0402_1%
DDRB_SDQS5# 7
DDRB_SDQS5 7
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQS7# 7
DDRB_SDQS7 7
DDRB_SDQ62
DDRB_SDQ63
MEM_MB_EVENT#
MEM_MB_EVENT# 7
FCH_SDATA0 11,27,32,35
FCH_SCLK0 11,27,32,35
+0.75VS
4
206
LCN_DAN06-K4406-0102
10K_0402_5%
205
C1085
DDRB_SDQ40
DDRB_SDQ41
+1.5V
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRB_SMA15
DDRB_SMA14
C1082
DDRB_SDQ34
DDRB_SDQ35
4.7U_0603_6.3V6K
DDRB_SDQS4#
DDRB_SDQS4
DDRB_CKE1
0.1U_0402_16V4Z
DDRB_SDQS4#
DDRB_SDQS4
DDRB_CKE1
4.7U_0603_6.3V6K
7
7
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDRB_SMA12
DDRB_SMA9
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
C1095
1
0.1U_0402_16V4Z
DDRB_SBS2#
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
DDRB_SBS2#
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDRB_CKE0
1000P_0402_50V7K
DDRB_CKE0
0.1U_0402_16V4Z
2
C1094
DDRB_SDQ30
DDRB_SDQ31
+0.75VS
7
0.1U_0402_16V4Z
2
C1092
DDRB_SDQ2
DDRB_SDQ3
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
DDRB_SDM0
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
DDRB_SDQ0
DDRB_SDQ1
+VREF_DQ 15mil
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1000P_0402_50V7K
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
2011/07/08
Issued Date
Compal Secret Data
DIMM_B REV H:8mm
2015/07/08
Deciphered Date
Title
DDRIII SO-DIMM 2
Custom
<Address: 01>
Date:
Rev
0.1
QCL51 LA-8712P
Sheet
E
12
of
56
LVDS Interface
UVG1G
6
PART 7 0F 9
VARY_BL
LVDS CONTROL
UVG1A
DIGON
AK27
AJ27
PART 1 0F 9
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
PCIE_FTX_C_GRX_P0
PCIE_FTX_C_GRX_N0
AA38
Y37
PCIE_RX0P
PCIE_TX0P
PCIE_RX0N
PCIE_TX0N
PCIE_FTX_C_GRX_P1
PCIE_FTX_C_GRX_N1
Y35
W36
PCIE_RX1P
PCIE_TX1P
PCIE_RX1N
PCIE_TX1N
Y33 PCIE_GTX_FRX_P0
Y32 PCIE_GTX_FRX_N0
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV1
1 CV2
PX@
PX@
PCIE_GTX_C_FRX_P0
PCIE_GTX_C_FRX_N0
W33 PCIE_GTX_FRX_P1
W32PCIE_GTX_FRX_N1
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV3
1 CV4
PX@
PX@
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
W38
V37
PCIE_RX2P
PCIE_TX2P
PCIE_RX2N
PCIE_TX2N
PCIE_FTX_C_GRX_P3
PCIE_FTX_C_GRX_N3
V35
U36
PCIE_RX3P
PCIE_TX3P
PCIE_RX3N
PCIE_TX3N
PCIE_FTX_C_GRX_P4
PCIE_FTX_C_GRX_N4
U38
T37
PCIE_RX4P
PCIE_TX4P
PCIE_RX4N
PCIE_TX4N
U33 PCIE_GTX_FRX_P2
U32 PCIE_GTX_FRX_N2
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV5
1 CV6
PX@
PX@
PCIE_GTX_C_FRX_P2
PCIE_GTX_C_FRX_N2
U30 PCIE_GTX_FRX_P3
U29 PCIE_GTX_FRX_N3
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV7
1 CV8
PX@
PX@
PCIE_GTX_C_FRX_P3
PCIE_GTX_C_FRX_N3
T33 PCIE_GTX_FRX_P4
T32 PCIE_GTX_FRX_N4
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV9
PX@
1 CV10 PX@
PCIE_GTX_C_FRX_P4
PCIE_GTX_C_FRX_N4
TXOUT_U3P
TXOUT_U3N
LVTMDP
PCIE_FTX_C_GRX_P2
PCIE_FTX_C_GRX_N2
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
PCIE_FTX_C_GRX_P5
PCIE_FTX_C_GRX_N5
T35
R36
PCIE_RX5P
PCIE_TX5P
PCIE_RX5N
PCIE_TX5N
PCIE_FTX_C_GRX_P6
PCIE_FTX_C_GRX_N6
R38
P37
PCIE_RX6P
PCIE_TX6P
PCIE_RX6N
PCIE_TX6N
T30 PCIE_GTX_FRX_P5
T29 PCIE_GTX_FRX_N5
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV11 PX@
1 CV12 PX@
PCIE_GTX_C_FRX_P5
PCIE_GTX_C_FRX_N5
P33 PCIE_GTX_FRX_P6
P32 PCIE_GTX_FRX_N6
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV13 PX@
1 CV14 PX@
PCIE_GTX_C_FRX_P6
PCIE_GTX_C_FRX_N6
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
PCIE_FTX_C_GRX_P7
PCIE_FTX_C_GRX_N7
P35
N36
PCIE_RX7P
PCIE_TX7P
PCIE_RX7N
PCIE_TX7N
PCIE_FTX_C_GRX_P8
PCIE_FTX_C_GRX_N8
N38
M37
PCIE_RX8P
PCIE_TX8P
PCIE_RX8N
PCIE_TX8N
PCIE_FTX_C_GRX_P9
PCIE_FTX_C_GRX_N9
M35
L36
PCIE_RX9P
PCIE_TX9P
PCIE_RX9N
PCIE_TX9N
P30 PCIE_GTX_FRX_P7
P29 PCIE_GTX_FRX_N7
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV15 PX@
1 CV16 PX@
PCIE_GTX_C_FRX_P7
PCIE_GTX_C_FRX_N7
N33 PCIE_GTX_FRX_P8
N32 PCIE_GTX_FRX_N8
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV17 PX@
1 CV18 PX@
PCIE_GTX_C_FRX_P8
PCIE_GTX_C_FRX_N8
N30 PCIE_GTX_FRX_P9
N29 PCIE_GTX_FRX_N9
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV19 PX@
1 CV20 PX@
PCIE_GTX_C_FRX_P9
PCIE_GTX_C_FRX_N9
TXOUT_L3N
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37
2160834000A10CHELSE_FCBGA962
2
2
1 CV21 PX@
1 CV22 PX@
PCIE_GTX_C_FRX_P10
PCIE_GTX_C_FRX_N10
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV23 PX@
1 CV24 PX@
PCIE_GTX_C_FRX_P11
PCIE_GTX_C_FRX_N11
RV143
1
PCIE_TX11P
PCIE_TX11N
PCIE_FTX_C_GRX_P12
PCIE_FTX_C_GRX_N12
J38
H37
PCIE_RX12P
PCIE_RX12N
PCIE_TX12N
PCIE_FTX_C_GRX_P13
PCIE_FTX_C_GRX_N13
H35
G36
PCIE_RX13P
PCIE_TX13P
PCIE_RX13N
PCIE_TX13N
PCIE_FTX_C_GRX_P14
PCIE_FTX_C_GRX_N14
G38
F37
PCIE_RX14P
PCIE_TX14P
PCIE_RX14N
PCIE_TX14N
PCIE_TX12P
K33 PCIE_GTX_FRX_P12
K32 PCIE_GTX_FRX_N12
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV25 PX@
1 CV26 PX@
PCIE_GTX_C_FRX_P12
PCIE_GTX_C_FRX_N12
J33 PCIE_GTX_FRX_P13
J32 PCIE_GTX_FRX_N13
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV27 PX@
1 CV28 PX@
PCIE_GTX_C_FRX_P13
PCIE_GTX_C_FRX_N13
K30 PCIE_GTX_FRX_P14
K29 PCIE_GTX_FRX_N14
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV29 PX@
1 CV30 PX@
PCIE_GTX_C_FRX_P14
PCIE_GTX_C_FRX_N14
F35
E37
PCIE_RX15P
PCIE_TX15P
PCIE_RX15N
PCIE_TX15N
H33 PCIE_GTX_FRX_P15
H32 PCIE_GTX_FRX_N15
.1U_0402_16V7K
.1U_0402_16V7K
2
2
1 CV31 PX@
1 CV32 PX@
AB35
AA36
CLK_PEG_VGA
CLK_PEG_VGA#
1.69K_0402_1% 1
PX@
2 RV29
PCIE_CALR_TX
Y30
1.27K_0402_1% 1
2@ RV3
PCIE_CALR_RX
Y29
1
1K_0402_5%
2
PX@RV5
PX@
RV5
+0.935VGS
PCIE_GTX_C_FRX_P15
PCIE_GTX_C_FRX_N15
0_0402_5%
AA30
2
+DPLL_PVDD AM32
DPLL_PVDD
+DPLL_VDDC AN31
DPLL_VDDC
AN32
DPLL_PVSS
+DPLL_VDDC
H7
H8
MPLL_PVDD
+SPV18
AM10
SPLL_PVDD
+SPV10
AN9
SPLL_VDDC
AN10
SPLL_PVSS
+MPV18
+1.0VGS-->+0.935VGS
XTALIN
AV33
XTALIN
XTALOUT
AU34
XTALOUT
MPLL_PVDD
LV9
PX@
1
2
MCK1608471YZF 0603
PERSTB
PX@
RV6
100K_0402_5%
PART 9 0F 9
+1.8VGS
For Chelsea non staff
+0.935VGS
GPU_RST#
TEST_PG
XO_IN
AW34
@ RV146
2
1
0_0402_5%
XO_IN2
AW35
@ RV147
2
1
0_0402_5%
+MPV18
10U_0603_6.3V6M
PX@
CV149
PX@
1 AH16
RV4 2
1K_0402_5%
UVG1I
For Chelsea only
CALIBRATION
+DPLL_PVDD
125mA
PCIE_REFCLKP
PCIE_REFCLKN
RV144
CLOCK
25
25
+0.935VGS
1
PCIE_FTX_C_GRX_P15
PCIE_FTX_C_GRX_N15
75mA
0_0402_5%
PLLS/XTAL
.1U_0402_16V7K
.1U_0402_16V7K
L30 PCIE_GTX_FRX_P11
L29 PCIE_GTX_FRX_N11
0.1U_0402_16V7K
PX@
CV42
L33 PCIE_GTX_FRX_P10
L32 PCIE_GTX_FRX_N10
0.1U_0402_16V7K
PX@
CV45
PCIE_RX11N
PCIE_TX10N
0.1U_0402_16V7K
PX@
CV151
PCIE_RX11P
PCIE_TX10P
1U_0402_6.3V6K
PX@
CV41
PCIE_RX10N
1U_0402_6.3V6K
PX@
CV44
PCIE_RX10P
1U_0402_6.3V6K
PX@
CV150
K35
J36
10U_0603_6.3V6M
PX@
CV40
L38
K37
PCIE_FTX_C_GRX_P11
PCIE_FTX_C_GRX_N11
10U_0603_6.3V6M
PX@
CV43
PCIE_FTX_C_GRX_P10
PCIE_FTX_C_GRX_N10
PCI EXPRESS INTERFACE
+1.8VGS
1
@ RV141
+DPLL_PVDD 2
2
@ RV148
0_0402_5%
1AF30
1AF31
0_0402_5%
CLKTESTA
NC_XTAL_PVDD
CLKTESTB
AK10
AL10
NC_XTAL_PVSS
+1.8VGS
LV10 PX@
1
2
BLM15BD121SN1D_0402
+0.935VGS
+SPV10
10U_0603_6.3V6M
PX@
CV166
PX@
CV49
18P_0402_50V8J
1
2
@
RV70
51.1_0402_1%
route 50ohms single-ended/100ohms diff

and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil
Compal Secret Data

2011/06/30
Deciphered Date
2013/06/30
Title
ATI_SeymourXT_M2_PCIE/LVDS
Size
C
Date:
@
RV69
51.1_0402_1%
CV50 PX@
18P_0402_50V8J
5
@
CV171
0.1U_0402_16V7K
Issued Date
27MHZ_16PF_X5H027000FG1H
LV11 PX@
1
2
MCK1608471YZF 0603
GPU_RST#
PX@
MC74VHC1G08DFT2G SC70 5P
@
CV170
0.1U_0402_16V7K
XTALIN
PX@
1M_0402_5%
YV2 PX@
2
1
0.1U_0402_16V7K
PX@
CV154
UV1
Y
RV28
XTALOUT
0.1U_0402_16V7K
PX@
CV169
PX_GPU_RST#
APU_PCIE_RST#
25,27
+3VGS
10,21,25,31,32
+SPV18
1U_0402_6.3V6K
PX@
CV153
1 0_0402_5%
1U_0402_6.3V6K
PX@
CV168
10U_0603_6.3V6M
PX@
CV152
RV1
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
13
of
56
CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
UVG1B
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
PART 2 0F 9
TXCAP_DPA3P
GENLK_VSYNC
TXCAM_DPA3N
TX0P_DPA2P
SWAPLOCKA
TX0M_DPA2N
DPA
SWAPLOCKB
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
DVPCNTL_MVP_1
TX2M_DPA0N
DVPCNTL_1
TXCBP_DPB3P
DVPCNTL_2
TXCBM_DPB3N
DVPDATA_0
TX3P_DPB2P
DVPDATA_1
TX3M_DPB2N
DPB
DVPDATA_2
DVPDATA_3
TX4P_DPB1P
DVPDATA_4
TX4M_DPB1N
DVPDATA_6
TX5P_DPB0P
DVPDATA_7
TX5M_DPB0N
DVPDATA_9
TXCCP_DPC3P
DVPDATA_10
TXCCM_DPC3N
DVPDATA_12
TX0P_DPC2P
DVPDATA_13
TX0M_DPC2N
DVPDATA_14
DPC
DVPDATA_15
TX1P_DPC1P
DVPDATA_16
TX1M_DPC1N
DVPDATA_18
TX2P_DPC0P
DVPDATA_19
TX2M_DPC0N
DVPDATA_21
TXCDP_DPD3P
DVPDATA_22
GPU_VID1
56
56
GPU_VID3
GPU_VID2
+3VGS
@ RV17
T60
1
56
GPU_VID4
@ RV131
10K_0402_5%
TXCDM_DPD3N
DPD
SMBCLK
TX4P_DPD1P
SMBus
SMBDATA
TX4M_DPD1N
SCL
AVSSN#1
GPIO_1
GPIO_2
AVSSN#2
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
AVSSN#3
DAC1
GPIO_8_ROMSO
2
B
1
1
1
@
@
@
2 RV18
2 RV19
2 RV20
GPIO24_TRSTB
GPIO25_TDI
GPIO27_TMS
10K_0402_5%
2 RV21
GPIO26_TCK
RSVD
GPIO2
Advertises PCIE speed when compliance test
0: 2.5GT/s
1: 5GT/s
RSVD
GPIO8
RSVD
H2SYNC
RSVD
GPIO21
BIOS_ROM_EN
GPIO_22_ROMCSB
ENABLE EXTERNAL BIOS ROM
ROMIDCFG(2:0)
GPIO[13:11]
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
HSYNC
VSYNC
0
Internal use only.This Pad has an internal PD and Must be 0V at reset.
0
The pad may be left unconnected.
0
AT15
AR14
AU16
AV15
V2SYNC
IGNORE VIP DEVICE STRAPS
GPIO9
VGA ENABLED
AU20
AT19
RSVD
GENERICC
AUD[1]
HSYNC
AUD[0]
VSYNC
AT21
AR20
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
AU22
AV21
AT23
AR22
AMD RESERVED CONFIGURATION STRAPS
AD39
AD37
T61
AE36
AD35
T62
AF37
AE38
T63
AC36
AC38
T64
T65
GPIO21
AB34
RV14 1 PX@
AVDD
AD34
AE34
+AVDD
H2SYNC
2 499_0402_1%
AVSSQ
VDD1DI
VSS1DI
AC33
AC34
+VDD1DI
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
NC#1
GPIO_21
NC#2
GPIO_22_ROMCSB
NC#3
CLKREQB
NC#4
GPIO_29
NC#7
GPIO_30
NC#8
V13
U13
AC31
AD30
AC32
AD32
AF32
AA29
AG21
(1.8V@65mA AVDD)
GPIO_15_PWRCNTL_0
GPIO_17_THERMAL_INT
GENERICC
GPIO2
2
+1.8VGS
LV2 PX@
BLM15BD121SN1D_0402
(1.8V@100mA VDD1DI)
1
GPIO8
TX_PWRS_ENB
Transmitter Power Saving Enable

GPIO0 0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
TX_DEEMPH_EN
PCI Express Transmitter De-emphasis Enable

GPIO1 0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
2
LV1 PX@
BLM15BD121SN1D_0402
Internal VGA Thermal Sensor
+3VGS
PX@RV22
PX@
RV22
100K_0402_5%
+3VGS
PX@ RV23
PX@RV23
100K_0402_5%
VGA_SMB_CK2
GENERICA
QV1A PX@
DMN66D0LDW-7_SOT363-6
4
GENERICB
GENERICC
NC_TSVSSQ
AF33
@ RV142
1
2
0_0402_5%
PS_0
AM34
RV140 @
2
1
0_0402_5%
PS_1
AD31
GENERICD
GENERICE_HPD4
GENERICF_HPD5
VGA_SMB_DA2
CEC_1
AK24
HPD1
1 RV24
@
MLPS
@
1 499_0402_1%
+VREFG_GPU
AH13
VREFG
AL21
PX_EN
PS_2
AG31
PS_3
AD33
21,37,8
B
EC_SMB_DA2
21,37,8
2 0_0402_5%
For Chelsea non staff
+1.8VGS
PX@
2 RV25
PX@
2 RV26
EC_SMB_CK2
QV1B PX@
GENERICG_HPD6
AC30
11
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET
RSET
GPIO_16
XXX
BIF_VGA DIS
GPIO_12
GPIO_14_HPD2
VIP_DEVICE_STRAP_ENA
+1.8VGS
GPIO_13
0: disable
1: enable
AT17
AR16
GPIO_10_ROMSCK
GPIO_11
GPIO13,12,11(config 2,1,0): internal PD.

Memory apertures
a)If BIOS_ROM_EN=1,the config[2:0] defines the ROM type.
config[3:0]
b)If BIOS_ROM_EN=0,the config[2:0] defines the primary aperture size.
128MB 000
256MB 001
64MB 010
GPIO_9_ROMSI
NC#9
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
AU14
AV13
10K_0402_5%
10K_0402_5%
10K_0402_5%
GPIO_0
NC#6
AG32
AG33
AT33
AU32
I2C
SDA
NC#5
PEG_CLKREQ#
Update net name
0: disable
1: enable
Base on AMD Check list

GPIO_23_CLKREQB should be reserve
56
RV13 GPU_GPIO11
RV15 GPU_VID1
RV16 GPU_GPIO13
PCIE TRANSMITTER DE-EMPHASIS
11/16 add
2
2
2
PCIE TRANSMITTER Power Saving Enable
GPIO1
2
10K_0402_5%
PX@
@
@
GPIO0
TX_DEEMPH_EN
1
@
1
1
1
+3VGS
0: 50% swing
1: Full swing
TX_PWRS_ENB
ACIN
53 VDDCI_VID
RV132
10K_0402_5%
10K_0402_5%
10K_0402_5%
AR32
AT31
10U_0603_6.3V6M
PX@
CV35
37,42,47
AV31
AU30
DVPDATA_23
AH17
AJ17
AK17
AJ13
GPU_GPIO8
AH15
GPU_GPIO9
AJ16
AK16
GPU_GPIO11
AL16
GPU_VID1
AM16
GPU_GPIO13
AM14
AM13
GPU_VID3
AK14
GPU_VID2
AG30
AN14
10K_0402_5%
2 GPIO_19_CTF
AM17
AL13
GPU_VID4
AJ14
GPIO21_BBEN
AK13
GPIO22_ROMCSB
PEG_CLKREQ# AN13
RV10 GPU_GPIO5
RV31 GPIO21_BBEN
RV32 GPIO22_ROMCSB
RV11 GPU_GPIO8
RV12 GPU_GPIO9
DVPDATA_20
2GPU_GPIO5
VDDCI_VID
2
2
2
2
2
1U_0402_6.3V6K
PX@
CV34
RB751V_SOD323
DV1 @ 1
@
@
@
@
@
DVPDATA_17
GENERAL PURPOSE I/O
AH20
AH18
AN16
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
1
1
1
1
1
RV9 SMT-->@
RECOMMENDED
SETTINGS
DESCRIPTION OF DEFAULT SETTINGS <all internal PD>
DVPDATA_11
TX5M_DPD0N
11/15 AMD suggest
AR30
AT29
DVPDATA_8
TX5P_DPD0P
AK26
AJ26
100K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
RV7 GPU_GPIO0
RV8 GPU_GPIO1
RV9 GPU_GPIO2
DVPDATA_5
T66
T67
AT27
AR26
1
2
@
1 PX@
2
1 @
2
R1.0
DVPCLK
TX3P_DPD2P
AJ23
AH23
AU26
AV25
DVPCNTL_0
TX3M_DPD2N
VGA_SMB_CK2
VGA_SMB_DA2
10K_0402_5%
10K_0402_5%
10K_0402_5%
0.1U_0402_16V7K
PX@
CV33
VRAM_ID0
VRAM_ID1
VRAM_ID2
DVPCNTL_MVP_0
AT25
AR24
10U_0603_6.3V6M
PX@
CV38
16
16
16
VRAM ID
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
PIN
+3VGS
1U_0402_6.3V6K
PX@
CV37
AJ21
AK21
AU24
AV23
GENLK_CLK
0.1U_0402_16V7K
PX@
CV36
AD29
GENLK_CLK
GENLK_VSYNC AC29
T53
T54
STRAPS
STRAPS
MUTI GFX
1 RV27
2 0_0402_5%
1 249_0402_1%
BACO
2
1
CV39 0.1U_0402_16V7K
PX@
+3VGS
RV149
PX@
1
1
RV66
DEBUG
2 5.11K_0402_5%
@
2
TESTEN
1K_0402_5%
DDC/AUX
DDC1CLK
DDC1DATA
AD28
TESTEN
AUX1P
AUX1N
T52
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
AM23
AN23
AK23
AL24
AM24
Use Internal Thermal Sensor

External VGA Thermal Sensor: No stuff
AM26
AN26
JTAG_TRSTB
JTAG_TDI
DDC2CLK
DDC2DATA
AM27
AL27
AM19
AL19
UV13
JTAG_TMS
AUX2P
JTAG_TDO
AUX2N
AN20
AM20
2
CV271
THERM_D+
DDCCLK_AUX3P
DDCDATA_AUX3N
THERMAL
+3VGS
PX@
CV48
0.1U_0402_16V4Z
+TSVDD
PX@
CV47
1U_0402_6.3V6K
PX@
LV5
1
2
BLM15BD121SN1D_0402
PX@
CV46
10U_0603_6.3V6M
+1.8VGS
AF29
AG29
THERM_D+
THERM_D-
DPLUS
DDCCLK_AUX4P
DDCDATA_AUX4N
AK32
GPIO_28_FDO
AL31
TS_A
DDCCLK_AUX6P
DDCDATA_AUX6N
(1.8V@20mA TSVDD)
DDCVGACLK
AJ32
AJ33
CV272
1
2
AL29
AM29
2200P_0402_50V7K
2
1
+3VGS
VDD
SCLK
D+
SDATA
D-
ALERT#
THERM#
GND
VGA_SMB_CK2
VGA_SMB_DA2
6
@
2
RV134
1
2.2K_0402_5%
TSVDD
DDCVGADATA
AN21
AM21
RV133
2.2K_0402_5%
AK30
AK29
AJ30
AJ31
T69
T70
Issued Date
Compal Secret Data
TSVSS
2011/06/30
Deciphered Date
2013/06/30
ADM1032ARMZ-2REEL_MSOP8
@
Title
ATI_SeymourXT_M2_Main_MSIC
Size
C
Date:
+3VGS
DMINUS
DDCDATA_AUX5N
AL30
AM30
1
1
0.1U_0402_16V4Z
2
THERM_D-
DDCCLK_AUX5P
PX@ RV30
1
2 GPIO_28_FDO
10K_0402_5%
+3VGS
JTAG_TCK
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
14
of
56
11/10 follow Lotus
GPU_Reset
PWREN
+3.3VS TO +3.3VGS
+3VGS
+3VS
J2
@
1
10U_0603_6.3V6M
1U_0603_10V6K
1
PX@
RV35
100K_0402_5%
2MM
CV56
PX@
PXS_PWREN#_R
3
CV57
PX@
RV34 @
470_0603_5%
+3VALW
PXS_PWREN_R
2
G
PX@
RV36
PX@
RV37
20K_0402_5%
20K_0402_5%
1 PX@
CV58
0.1U_0603_25V7K
PXS_PWREN=FCH GPIO192=PE_GPIO1
PX@
QV2B
2
PXS_PWREN#_R 1
@ RV38
PXS_PWREN_R
QV16 PX@
AP2301GN-HF_SOT23-3
@
QV7B
QV8
2N7002K_SOT23-3
PX@
PXS_PWREN
1 RV145 2 0_0402_5%
PX@
25,27,48,52,53,56
PXS_PWREN
+5VALW
0_0402_5%
2
Add +1.5VGS DC DC
+1.5V_PCIE TO +1.5VGS
+1.5V_PCIE
+1.5VGS
J9
Del +1.8VGS DC DC
1
2MM
UV19 PX@
AO4430L_SO8
CV59
PX@
8
7
6
5
1
2
3
CV61 PX@
1U_0603_10V6K
RV39 @
470_0603_5%
CV60
PX@
10U_0603_6.3V6M
1
10U_0603_6.3V6M
+VSB
@
QV7A
2
RV43
0_0402_5%
@
PX@
QV2A
1
CV62 PX@
0.1U_0603_25V7K
PXS_PWREN_R 1 RV44 @2 0_0402_5%
PXS_PWREN#_R
RV41
1 PX@
2
200K_0402_1%
RV40 PX@
20K_0402_5%
Issued Date
Compal Secret Data
2011/06/30
Deciphered Date
2013/06/30
Title
ATI_SeymourXT_M2_BACO POWER
Size
C
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
15
of
56
UVG1D
UVG1C
PART 4 0F 9
19
GDDR5/DDR3
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
DQA0_0
MAA0_0/MAA_0
DQA0_1
MAA0_1/MAA_1
DQA0_2
MAA0_2/MAA_2
DQA0_3
MAA0_3/MAA_3
DQA0_4
MAA0_4/MAA_4
DQA0_5
MAA0_5/MAA_5
DQA0_6
MAA0_6/MAA_6
DQA0_7
MAA0_7/MAA_7
DQA0_8
MAA1_0/MAA_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
MEMORY INTERFACE A
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
WCKA0_0/DQMA_0
DQA0_18
WCKA0B_0/DQMA_1
A32
C32
D23
E22
C14
A14
E10
D9
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
DQA0_19
WCKA0_1/DQMA_2
DQA0_20
WCKA0B_1/DQMA_3
DQA0_21
WCKA1_0/DQMA_4
DQA0_22
WCKA1B_0/DQMA_5
DQA0_23
WCKA1_1/DQMA_6
DQA0_24
WCKA1B_1/DQMA_7
EDCA0_0/QSA_0
C34
D29
D25
E20
E16
E12
J10
D7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
DQA0_27
EDCA0_1/QSA_1
DQA0_28
EDCA0_2/QSA_2
DQA0_29
EDCA0_3/QSA_3
DQA0_30
EDCA1_0/QSA_4
DQA0_31
EDCA1_1/QSA_5
DQA1_0
EDCA1_2/QSA_6
DQA1_1
EDCA1_3/QSA_7
DDBIA0_0/QSA_0B
DQA1_4
DDBIA0_1/QSA_1B
DQA1_5
DDBIA0_2/QSA_2B
DQA1_6
DDBIA0_3/QSA_3B
DQA1_7
DDBIA1_0/QSA_4B
DQA1_8
DDBIA1_1/QSA_5B
DQA1_9
DDBIA1_2/QSA_6B
DQA1_10
DDBIA1_3/QSA_7B
A34
E30
E26
C20
C16
C12
J11
F8
DQMA#[7..0]
QSA[7..0]
19
ADBIA0/ODTA0
DQA1_13
ADBIA1/ODTA1
DQA1_14
DQA1_15
CLKA0
DQA1_16
CLKA0B
H27 CLKA0
G27 CLKA0#
DQA1_17
DQA1_18
CLKA1
DQA1_19
CLKA1B
J14 CLKA1
H14 CLKA1#
MAB[12..0]
B_BA[2..0]
19
RV56
RV59
RV57
RV58
RV60
RV61
1
1
1
1
1
1
X76@
X76@
X76@
X76@
X76@
X76@
2
2
2
2
2
2
QSA#[7..0]
19
Vendor
128M16 (2G)
64M16 (1G)
64M16 (1G)
ODTA0
ODTA1
19
19
VRAM_ID0
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
B_BA[2..0]
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
20
20
VRAM_ID1
VRAM_ID2
VRAM_ID0
14
VRAM_ID1
14
VRAM_ID2
14
VRAM_ID0 VRAM_ID1 VRAM_ID2
128M16 (2G) H5TQ2G63DFR-11C
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
J21 ODTA0
G19 ODTA1
MAB[12..0]
19
A_BA[2..0]
19
DQA1_11
DQA1_12
MDB[0..63]
MDB[0..63]
+1.8VGS
DQA1_2
DQA1_3
MAA[12..0]
A_BA[2..0]
DQA0_25
DQA0_26
20
MAA[12..0]
DQA0_16
DQA0_17
MDA[0..63]
MDA[0..63]
RV56
Hynix 2GB
PN:SA00003YO70
K4W2G1646C-HC11
Samsung 2GB
PN:SA000047Q00
H5TQ1G63DFR-11C
Hynix 1GB
PN:SA000041S20
K4W1G1646G-BC11
Samsung 1GB
PN:SA00004GS20
RV58
RV56
RV57
1
RV59
RV57
1
RV60
1
RV59
RV61
0
RV58
RV61
RV60
1
CLKA0 19
CLKA0# 19
CLKA1 19
CLKA1# 19
DQA1_20
DQA1_21
RASA0B
DQA1_22
RASA1B
K23 RASA0#
K19 RASA1#
DQA1_23
DQA1_24
CASA0B
DQA1_25
CASA1B
K20 CASA0#
K17 CASA1#
DQA1_26
DQA1_27
CSA0B_0
DQA1_28
CSA0B_1
K24 CSA0#_0
K27
RASA0#
RASA1#
19
19
CASA0#
CASA1#
19
19
CSA0#_0
19
DQA1_29
DQA1_30
CSA1B_0
DQA1_31
CSA1B_1
M13 CSA1#_0
K16
CSA1#_0
19
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
GDDR5/DDR3
DQB0_0
MAB0_0/MAB_0
DQB0_1
MAB0_1/MAB_1
DQB0_2
MAB0_2/MAB_2
DQB0_3
MAB0_3/MAB_3
DQB0_4
MAB0_4/MAB_4
DQB0_5
MAB0_5/MAB_5
DQB0_6
MAB0_6/MAB_6
DQB0_7
MAB0_7/MAB_7
DQB0_8
MAB1_0/MAB_8
DQB0_9
MAB1_1/MAB_9
DQB0_10
MAB1_2/MAB_10
DQB0_11
MAB1_3/MAB_11
DQB0_12
MAB1_4/MAB_12
DQB0_13
MAB1_5/BA2
DQB0_14
MAB1_6/BA0
DQB0_15
MAB1_7/BA1
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
+1.5VGS
MVREFDA
CKEA0
MVREFSA
CKEA1
K21 CKEA0
J20 CKEA1
CKEA0
CKEA1
19
19
WEA0#
WEA1#
19
19
+VDD_MEM15_REFDB Y12
+VDD_MEM15_REFSB AA12
DQB0_26
EDCB0_0/QSB_0
DQB0_27
EDCB0_1/QSB_1
DQB0_28
EDCB0_2/QSB_2
DQB0_29
EDCB0_3/QSB_3
DQB0_30
EDCB1_0/QSB_4
DQB0_31
EDCB1_1/QSB_5
DQB1_0
EDCB1_2/QSB_6
DQB1_1
2 240_0402_1%
L27
2 240_0402_1% N12
2 240_0402_1% AG12
NC_MEM_CALRN0
WEA0B
NC_MEM_CALRN1
WEA1B
K26 WEA0#
L15 WEA1#
NC_MEM_CALRN2
EDCB1_3/QSB_7
DQB1_3
DDBIB0_0/QSB_0B
DQB1_4
DDBIB0_1/QSB_1B
DQB1_5
DDBIB0_2/QSB_2B
DQB1_6
DDBIB0_3/QSB_3B
DQB1_7
DDBIB1_0/QSB_4B
DQB1_8
DDBIB1_1/QSB_5B
DQB1_9
DDBIB1_2/QSB_6B
DQB1_10
2 240_0402_1% M12
2 120_0402_5% M27
2 120_0402_5% AH12
NC_MEM_CALRP1
MAA0_8/MAA_13
MEM_CALRP0
MAA1_8/MAA_14
MEM_CALRP2
MAA0_9/MAA_15
MAA1_9/RSVD
H23 MAA13
J19
M21
M20
MAA13
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
T7
W7
ODTB0
ODTB1
L9
L8
CLKB0
CLKB0#
DQMB#[7..0]
QSB[7..0]
QSB#[7..0]
DDBIB1_3/QSB_7B
20
20
20
DQB1_11
DQB1_12
ADBIB0/ODTB0
DQB1_13
ADBIB1/ODTB1
ODTB0
ODTB1
DQB1_14
DQB1_15
CLKB0
DQB1_16
CLKB0B
DQB1_18
CLKB1
DQB1_19
CLKB1B
AD8 CLKB1
AD7 CLKB1#
RASB0B
DQB1_22
RASB1B
T10
Y10
RASB0#
RASB1#
DQB1_23
DQB1_24
CASB0B
DQB1_25
CASB1B
CLKB1 20
CLKB1# 20
DQB1_20
DQB1_21
20
20
CLKB0 20
CLKB0# 20
DQB1_17
W10 CASB0#
AA10 CASB1#
RASB0#
RASB1#
20
20
CASB0#
CASB1#
20
20
DQB1_26
DQB1_27
CSB0B_0
DQB1_28
CSB0B_1
P10
L10
CSB0#_0
CSB0#_0
20
DQB1_29
DQB1_30
CSB1B_0
DQB1_31
CSB1B_1
MVREFDB
CKEB1
AD10 CSB1#_0
AC10
CSB1#_0
U10 CKEB0
AA11 CKEB1
MVREFSB
WEB1B
MAB0_8/MAB_13
@ RV65 1
RV67 1
RV68 1
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQB1_2
WEB0B
@ RV62 1
@ RV63 1
@ RV64 1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
DQB0_25
CKEB0
+VDD_MEM15_REFDA L18
+VDD_MEM15_REFSA L20
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
DQB0_16
MEMORY INTERFACE B
PART 3 0F 9
MAB1_8/MAB_14
19
MAB0_9/MAB_15
MAB1_9/RSVD
For Chelsea
RV60,RV61,RV62,RV63 non staff
RV65,RV66 from 240ohm
change to 120ohm
DRAM_RST
N10 WEB0#
AB11 WEB1#
20
20
WEB0#
WEB1#
20
20
T8
MAB13
W8
U12
V12
AH11
20
CKEB0
CKEB1
MAB13
20
DRAM_RST#_R
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These

Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
+1.5VGS
1
RV74
40.2_0402_1%
PX@
DRAM_RST#_R
RV75
40.2_0402_1%
PX@
PX@
RV81
100_0402_1%
CV175
0.1U_0402_16V7K
PX@
+VDD_MEM15_REFSB
RV82
100_0402_1%
PX@
+VDD_MEM15_REFDB
PX@
RV80
4.99K_0402_1%
PX@
CV174
120P_0402_50V9
1
RV79
100_0402_1%
PX@
CV173
0.1U_0402_16V7K
PX@
1
RV78
100_0402_1%
PX@
CV172
0.1U_0402_16V7K
PX@
1 RV77
2
10_0402_5%
PX@
+VDD_MEM15_REFSA
1 RV76
2
51.1_0402_1%
PX@
+VDD_MEM15_REFDA
DRAM_RST#
19,20
+1.5VGS
1
+1.5VGS
RV73
40.2_0402_1%
PX@
2
RV72
40.2_0402_1%
PX@
RV71
4.7K_0402_5%
@
CV176
0.1U_0402_16V7K
PX@
+1.5VGS
+1.5VGS
Issued Date
Compal Secret Data
2011/06/30
Deciphered Date
2013/06/30
Title
ATI_SeymourXT_M2_MEM IF
Size
C
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
16
of
56
VDD_CT
0.1u
1u
10u
CRB
1
3
1
Design
1
3
1
+1.8VGS
+VDDC_CT
NC_BIF_VDDC
VDDR1
NC_BIF_VDDC
VDDR1
PCIE_PVDD
VDDR1
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
VDDR1
BACO
BIF_VDDC
BIF_VDDC
VDDR1
VDDR1
CORE
VDDC
VDDC
VDDR1
VDDC
VDDR1
VDDC
VDDR1
VDDC
VDDR1
VDDC
Design
1
1
1
SPV10
0.1u
1u
10u
CRB
1
1
1
Design
1
1
1
0.1U_0402_16V7K
PX@
CV126
1U_0402_6.3V6K
PX@
CV125
1U_0402_6.3V6K
PX@
CV124
1U_0402_6.3V6K
PX@
CV123
10U_0603_6.3V6M
PX@
CV122
AF26
AF27
AG26
AG27
LEVEL
TRANSLATION
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDDC
VDDC
VDDC
I/O
AF23
AF24
AG23
AG24
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDC
+1.8VGS
DVP
PX@
LV8
1
2
BLM15BD121SN1D_0402
+VDDR4
10U_0603_6.3V6M
PX@
CV145
CRB
1
1
1
VDDC
0.1U_0402_16V7K
PX@
CV144
SPV18
0.1u
1u
10u
1U_0402_6.3V6K
PX@
CV143
Design
1
1
1
1U_0402_6.3V6K
PX@
CV142
CRB
2
2
1
Design
1
1
AD12
AF11
AF12
AF13
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDC
AF15
AG11
AG13
AG15
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDC
VDDC
VDDC
11/16 add
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
53
VDDCI_SEN
56
VSS_GPU_SENSE
AF28
FB_VDDC
AG28
FB_VDDCI
AH29
FB_GND
VDDCI
VDDCI
ISOLATED
CORE I/O
VOLTAGE
SENESE
VCC_GPU_SENSE
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VCC_GPU_SENSE & VSS_GPU_SENSE

needs to be routed as differential pair
Change power rail same as PCIE_VDDC
+0.935VGS
Must be connected to PCIE_VDDC (0.935 V) on

"Heathrow"/"Chelsea" for both BACO and non-BACO designs
(1.0V@1920mA PCIE_VDDC)
+0.935VGS
+1.0VGS-->+0.935VGS
11/16 add
N27
T27
For Chelsea, Delete 2*1U
+VGA_CORE
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
PCIE_VDDR
0.1u
1u
10u
VDDCI
AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
VDDCI
(GDDR3/DDR3 1.12V@4A VDDCI)

(GDDR5 1.12V@16A VDDCI)
CRB
7
1
VDDC
1u
10u
22u
CRB
30
10
0
VDDCI
1u
10u
22u
Design
5 (1@)
1
Design
25
1
1
CRB
10
3
0
Design
9
2
1
VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
Deciphered Date
2013/06/30
Title
ATI_SeymourXT_M2_Power
Size
C
Date:
Compal Secret Data

2011/06/30
3
PCIE_VDDC
1u
10u
+VDDCI
On power team page
Issued Date
Design
2
1
1
CRB
2
1
1
11/09 On power team page
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
VDDCI
56
VDDR4
VDDC
VDDR1
VDDC
+3VGS
VDDR1
VDDC
VDDR1
(1.8V@110mA VDD_CT)
1
2
BLM15BD121SN1D_0402
1U_0402_6.3V6K
PX@
CV141
MPV18
0.1u
1u
10u
CRB
1
1
Design
3
1
1U_0402_6.3V6K
PX@
CV140
VDDR4
0.1u
1u
CRB
3
1
10U_0603_6.3V6M
PX@
CV139
VDDR3
1u
10u
LV7
VDDR1
VDDC
PX@
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
1U_0402_6.3V6K
PX@
CV148
NC_PCIE_VDDR
VDDR1
1U_0402_6.3V6K
PX@
CV147
NC_PCIE_VDDR
VDDR1
1U_0402_6.3V6K
PX@
CV91
VDDR1
AA31
AA32
AA33
AA34
W30
Y31
V28
W29
AB37
10U_0603_6.3V6M
PX@
CV92
NC_PCIE_VDDR
10U_0603_6.3V6M
PX@
CV108
NC_PCIE_VDDR
1U_0402_6.3V6K
PX@
CV106
Design
6
5
5
NC_PCIE_VDDR
1U_0402_6.3V6K
PX@
CV105
NC_PCIE_VDDR
VDDR1
1U_0402_6.3V6K
PX@
CV104
VDDR1
1U_0402_6.3V6K
PX@
CV103
VDDR1
PCIE
0.1U_0402_16V7K
PX@
CV102
0.1U_0402_16V7K
PX@
CV101
0.1U_0402_16V7K
PX@
CV99
0.1U_0402_16V7K
PX@
CV100
0.1U_0402_16V7K
PX@
CV98
1U_0402_6.3V6K
PX@
CV86
1U_0402_6.3V6K
PX@
CV97
1U_0402_6.3V6K
PX@
CV85
1U_0402_6.3V6K
PX@
CV84
1U_0402_6.3V6K
PX@
CV96
10U_0603_6.3V6M
PX@
CV83
VDDR1
0.1U_0402_16V7K
PX@
CV90
CRB
6
10
6
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
0.1U_0402_16V7K
PX@
CV89
VDDR1
0.1u
1u
10u
10U_0603_6.3V6M
PX@
CV95
10U_0603_6.3V6M
PX@
CV94
10U_0603_6.3V6M
PX@
CV93
10U_0603_6.3V6M
PX@
CV82
220U_B2_2.5VM_R35
CV87
0.1U_0402_16V7K
PX@
CV88
MEM I/O
0.1U_0402_16V7K
PX@
CV81
+PCIE_VDDR
PART 5 0F 9
For DDR3/GDDR5, MVDDQ = 1.5V
+1.8VGS
PX@ LV6
2
1
MBK1608121YZF_0603
(1.8V@504mA PCIE_VDDR)
UVG1E
+1.5VGS
10U_0603_6.3V6M
PX@
CV155
1U_0402_6.3V6K
@
CV107
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
17
of
56
UVG1F
PART 6 0F 9
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
UVG1H
PART 8 0F 9
+1.8VGS
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
0.1U_0402_16V7K
PX@ CV63
1U_0402_6.3V6K
PX@ CV64
10U_0603_6.3V6M
PX@ CV65
DP_VDDR
DP_VDDR
2
DP GND
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
CALIBRATION
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AW28
DPAB_CALR
DP_VSSR
DP_VSSR
DP_VSSR
PX@ RV50
PX@RV50
2
1
150_0402_1%
DP_VSSR
AW18
DPCD_CALR
DP_VSSR
DP_VSSR
DP_VSSR
PX@ RV55
PX@RV55
2
1
150_0402_1%
DP_VSSR
AM39
PX@
2
11/14 1% to 5%
DPEF_CALR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AN27
AP27
AP28
AW24
AW26
AN29
AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14
AW16
AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
GND
DP_VDDR
DP_VSSR
PX@ RV51
PX@RV51
2
1
150_0402_1%
AL33
AM33
AK33
AK34
DP_VDDR
DP_VSSR
AH34
AJ34
AF34
AG34
AM37
AL38
0_0603_5%
DP_VDDR
DP_VDDC
AP20
AP21
AP22
AP23
AU18
AV19
10U_0603_6.3V6M
PX@ CV72
DP_VDDR
AP13
AT13
AP14
AP15
1 RV48
GND
GND
GND
GND
GND
GND
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
10U_0603_6.3V6M
PX@ CV78
DP_VDDC
1U_0402_6.3V6K
PX@ CV73
DP_VDDR
1U_0402_6.3V6K
PX@ CV79
PX@
PX@ CV77
0.1U_0402_16V7K
11/14 1% to 5%
PX@
PX@ CV76
1U_0402_6.3V6K
PX@
PX@ CV75
10U_0603_6.3V6M
CV68
0.1U_0402_16V7K
PX@
CV67
1U_0402_6.3V6K
0_0603_5%
DP_VDDR
0.1U_0402_16V7K
PX@ CV74
AN24
AP24
AP25
AP26
AU28
AV29
+DP_VDDR18
+DP_VDDC
0.1U_0402_16V7K
PX@ CV80
2
CV66
10U_0603_6.3V6M
1 RV47
AP31
AP32
AN33
AP33
1U_0402_6.3V6K
PX@ CV70
DP_VDDC
10U_0603_6.3V6M
PX@ CV71
DP_VDDC
PX@ CV69
0.1U_0402_16V7K
DP_VDDR
+0.935VGS
PCIE_VSS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VSS_MECH
GND
VSS_MECH
GND
VSS_MECH
A39
AW1
AW39
MECH#1
MECH#2
MECH#3
T55 PAD
T56 PAD
T57 PAD
A
Issued Date
Compal Secret Data
2011/06/30
Deciphered Date
2013/06/30
Title
ATI_SetmourXT_M2_PWR_GND
Size
C
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
18
of
56
MDA[0..63]
UV5
UV8
DQSL
DQSU
RESET
ZQ/ZQ0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
QSA5
QSA4
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#5
DQMA#4
E7
D3
QSA#5
QSA#4
G3
B7
DRAM_RST# T2
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
RV86
240_0402_1%
PX@
MDA47
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
96-BALL
SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96
PX@
1
2
VREFD_Q3
RV105
4.99K_0402_1%
PX@
PX@
VREFC_A4
RV106
4.99K_0402_1%
PX@
PX@
VREFD_Q4
CV186
2
1
VREFC_A3
RV104
4.99K_0402_1%
PX@
RV96
4.99K_0402_1%
PX@
2
PX@
RV95
4.99K_0402_1%
PX@
RV101
4.99K_0402_1%
PX@
PX@
CV182
1
1
2
CV180
1
2
PX@
RV94
4.99K_0402_1%
PX@
VREFD_Q2
RV103
4.99K_0402_1%
PX@
+1.5VGS
0.1U_0402_16V7K
PX@
RV93
4.99K_0402_1%
PX@
VREFC_A2
RV102
4.99K_0402_1%
PX@
+1.5VGS
0.1U_0402_16V7K
PX@
RV92
4.99K_0402_1%
PX@
VREFC_A1
RV100
4.99K_0402_1%
PX@
+1.5VGS
0.1U_0402_16V7K
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
0.1U_0402_16V7K
ZQ/ZQ0
K1
L2
J3
K3
L3
+1.5VGS
0.1U_0402_16V7K
RV91
4.99K_0402_1%
PX@
VREFD_Q1
CV179
0.01U_0402_16V7K
PX@
RESET
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
96-BALL
SDRAM DDR3
RV90
4.99K_0402_1%
PX@
2
RV89
4.99K_0402_1%
PX@
RV99
4.99K_0402_1%
PX@
DQSL
DQSU
J1
L1
J9
L9
RV85
240_0402_1%
PX@
+1.5VGS
0.1U_0402_16V7K
2
40.2_0402_1%
G3
B7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A1
A8
C1
C9
D2
E9
F1
H2
H9
MDA45
MDA42
+1.5VGS
0.1U_0402_16V7K
CLKA1# 1
PX@RV98
PX@RV98
QSA#6
QSA#7
DML
DMU
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E7
D3
DRAM_RST# T2
+1.5VGS
0.1U_0402_16V7K
2
40.2_0402_1%
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VGS
Change to 40.2ohm by AMD suggested

CLKA1 1
PX@RV97
PX@
RV97
ZQ/ZQ0
DQMA#6
DQMA#7
96-BALL
SDRAM DDR3
CV177
0.01U_0402_16V7K
PX@
J1
L1
J9
L9
RESET
2
40.2_0402_1%
RV84
240_0402_1%
PX@
DQSL
DQSU
CLKA0# 1
PX@ RV88
PX@RV88
2
40.2_0402_1%
L8
96-BALL
SDRAM DDR3
Change to 40.2ohm by AMD suggested

CLKA0 1
PX@RV87
PX@
RV87
DRAM_RST# T2
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
G3
B7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
J7
K7
K9
MDA32
MDA36
MDA33
MDA39
MDA35
MDA38
MDA34
MDA37
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CV185
1
J1
L1
J9
L9
RV83
240_0402_1%
PX@
QSA#1
QSA#2
DML
DMU
F3
C7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
CLKA1
CLKA1#
CKEA1
+1.5VGS
D7
C3
C8
C2
A7
A2
B8
A3
MDA40
+1.5VGS
BA0
BA1
BA2
L8
E7
D3
QSA6
QSA7
ODT/ODT0
CS/CS0
RAS
CAS
WE
M2
N8
M3
MDA42
MDA44
MDA47
MDA40
MDA46
MDA41
MDA45
MDA43
T2
DRAM_RST#
QSA#0
QSA#3
DQMA#1
DQMA#2
K1
L2
J3
K3
L3
A_BA0
A_BA1
A_BA2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
G3
B7
DQMA#0
DQMA#3
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
CK
CK
CKE/CKE0
B2
D9
G7
K2
K8
N1
N9
R1
R9
QSA#0
QSA#3
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
16
16
16
16
16
J7
K7
K9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
QSA#1
QSA#2
DML
DMU
F3
C7
CLKA1
CLKA1#
CKEA1
BA0
BA1
BA2
E7
D3
QSA1
QSA2
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
16
16
16
MDA57
VREFCA
VREFDQ
DQMA#0
DQMA#3
QSA0
QSA3
ODT/ODT0
CS/CS0
RAS
CAS
WE
+1.5VGS
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDA58
CV184
1
DQMA#1
DQMA#2
DQSL
DQSU
K1
L2
J3
K3
L3
CK
CK
CKE/CKE0
M2
N8
M3
A_BA0
A_BA1
A_BA2
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
+1.5VGS
F3
C7
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
MDA63
MDA59
MDA62
MDA56
MDA60
MDA57
MDA61
MDA58
M8
H1
QSA0
QSA3
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
J7
K7
K9
BA0
BA1
BA2
D7
C3
C8
C2
A7
A2
B8
A3
VREFC_A4
VREFD_Q4
QSA1
QSA2
ODT/ODT0
CS/CS0
RAS
CAS
WE
CLKA0
CLKA0#
CKEA0
+1.5VGS
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA54
MDA53
MDA55
MDA50
MDA49
MDA48
MDA52
MDA51
K1
L2
J3
K3
L3
+1.5VGS
M2
N8
M3
MDA25
MDA31
MDA27
MDA28
MDA26
MDA30
MDA24
MDA29
MDA20
MDA19
MDA23
MDA18
MDA22
MDA16
MDA21
MDA17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
CK
CK
CKE/CKE0
A_BA0
A_BA1
A_BA2
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
CV183
1
16
16
16
16
16
J7
K7
K9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
VREFCA
VREFDQ
CLKA0
CLKA0#
CKEA0
BA0
BA1
BA2
D7
C3
C8
C2
A7
A2
B8
A3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
M8
H1
16
16
16
+1.5VGS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
VREFC_A3
VREFD_Q3
A_BA0
A_BA1
A_BA2
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDA5
MDA0
MDA6
MDA1
MDA4
MDA2
MDA7
MDA3
MDA13
MDA14
MDA9
MDA11
MDA15
MDA12
MDA8
MDA10
16,20
M2
N8
M3
16
16
16
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
UV7
VREFCA
VREFDQ
QSA#[7..0]
MDA20
MDA19
MDA23
MDA18
MDA22
MDA16
MDA21
MDA17
MDA25
MDA31
MDA27
MDA28
MDA26
MDA30
MDA24
MDA29
M8
H1
QSA#[7..0]
D7
C3
C8
C2
A7
A2
B8
A3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VREFC_A2
VREFD_Q2
16
QSA[7..0]
QSA[7..0]
MDA10
MDA14
MDA9
MDA11
MDA15
MDA12
MDA8
MDA13
DQMA#[7..0]
DQMA#[7..0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MDA5
MDA1
MDA6
MDA3
MDA4
MDA0
MDA7
MDA2
CV178
1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
16
UV6
VREFCA
VREFDQ
M8
H1
VREFC_A1
VREFD_Q1
CV181
1
16
MAA[13..0]
MAA[13..0]
16
16
MDA[0..63]
+1.5VGS
+1.5VGS
1U_0402_6.3V6K
PX@
CV223
1U_0402_6.3V6K
PX@
CV222
1U_0402_6.3V6K
PX@
CV221
1U_0402_6.3V6K
PX@
CV220
1U_0402_6.3V6K
PX@
CV219
1U_0402_6.3V6K
PX@
CV218
1U_0402_6.3V6K
PX@
CV217
1U_0402_6.3V6K
PX@
CV216
1U_0402_6.3V6K
PX@
CV215
1U_0402_6.3V6K
PX@
CV214
1U_0402_6.3V6K
PX@
CV213
1U_0402_6.3V6K
PX@
CV212
1U_0402_6.3V6K
PX@
CV211
1U_0402_6.3V6K
PX@
CV210
1U_0402_6.3V6K
PX@
CV209
1U_0402_6.3V6K
PX@
CV208
1U_0402_6.3V6K
PX@
CV207
1U_0402_6.3V6K
PX@
CV206
+1.5VGS
1U_0402_6.3V6K
PX@
CV205
1U_0402_6.3V6K
PX@
CV204
10U_0603_6.3V6M
PX@
CV203
10U_0603_6.3V6M
PX@
CV202
10U_0603_6.3V6M
PX@
CV201
10U_0603_6.3V6M
PX@
CV200
0.1U_0402_16V7K
PX@
CV199
0.1U_0402_16V7K
PX@
CV198
0.1U_0402_16V7K
PX@
CV197
0.1U_0402_16V7K
PX@
CV196
0.1U_0402_16V7K
PX@
CV195
0.1U_0402_16V7K
PX@
CV194
0.1U_0402_16V7K
PX@
CV193
0.1U_0402_16V7K
PX@
CV192
0.1U_0402_16V7K
PX@
CV191
0.1U_0402_16V7K
PX@
CV190
0.1U_0402_16V7K
PX@
CV189
0.1U_0402_16V7K
PX@
CV188
0.1U_0402_16V7K
CV187
PX@
+1.5VGS
Compal Secret Data
Issued Date
2011/06/30
Deciphered Date
2013/06/30
Title
Size
C
Date:

ATI_SeymourXT_M2_VRAM_A
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
Sunday, November 27, 2011

1
19
of
56
16
DQMB#[7..0]
DQMB#[7..0]
16
QSB[7..0]
16
QSB#[7..0]
16
16
16
QSB[7..0]
QSB#[7..0]
M2
N8
M3
B_BA0
B_BA1
B_BA2
16
16
16
CLKB0
CLKB0#
CKEB0
16
16
16
16
16
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
J7
K7
K9
K1
L2
J3
K3
L3
QSB2
QSB1
F3
C7
DQMB#2
DQMB#1
E7
D3
QSB#2
QSB#1
G3
B7
Change to 40ohm by AMD suggested

C
CLKB0# 1
PX@RV108
PX@RV108
2
40.2_0402_1%
T2
DRAM_RST#
L8
J1
L1
J9
L9
RV109
240_0402_1%
PX@
2
40.2_0402_1%
MDB16
MDB15
MDB11
MDB14
MDB10
MDB12
MDB9
MDB13
MDB8
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
M2
N8
M3
CLKB0
CLKB0#
CKEB0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
K1
L2
J3
K3
L3
QSB0
QSB3
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#0
DQMB#3
E7
D3
QSB#0
QSB#3
G3
B7
+1.5VGS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
B_BA0
B_BA1
B_BA2
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
MDB4
MDB3
MDB5
MDB0
MDB6
MDB1
MDB7
MDB2
VREFC_A3_B
VREFD_Q3_B
M8
H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDB26
MDB27
MDB24 MDB28
MDB31
MDB28 MDB24
MDB29
MDB25
MDB30
+1.5VGS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
J1
L1
J9
L9
RV110
240_0402_1%
PX@
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DRAM_RST# T2
96-BALL
SDRAM DDR3
1
CLKB1# 1
PX@RV114
PX@
RV114
2
40.2_0402_1%
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Change to 40ohm by AMD suggested

CLKB1 1
PX@ RV113
PX@RV113
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
UV11
VREFCA
VREFDQ
MDB17
+1.5VGS
BA0
BA1
BA2
16,19
CV224
0.01U_0402_16V7K
PX@
2
40.2_0402_1%
CLKB0 1
PX@RV107
PX@RV107
D7
C3
C8
C2
A7
A2
B8
A3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
M8
H1
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
M2
N8
M3
B_BA0
B_BA1
B_BA2
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
16
16
16
CLKB1
CLKB1#
CKEB1
16
16
16
16
16
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
J7
K7
K9
K1
L2
J3
K3
L3
QSB4
QSB7
QSB6
QSB5
F3
C7
DQMB#5
DQMB#7
DQMB#6
DQMB#5
E7
D3
QSB#4
QSB#7
QSB#6
QSB#5
G3
B7
DRAM_RST# T2
L8
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
RV111
240_0402_1%
PX@
UV12
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
96-BALL
SDRAM DDR3
E3
F7
F2
F8
H3
H8
G2
H7
MDB55
MDB50
MDB54
MDB51
MDB53
MDB48
MDB52
MDB49
MDB33
MDB38
MDB39
MDB36
MDB35
MDB34
MDB37
MDB32
D7
C3
C8
C2
A7
A2
B8
A3
MDB40
MDB47
MDB42
MDB46
MDB43
MDB45
MDB41
MDB44
MDB62
MDB58
MDB63
MDB56
MDB61
MDB57
MDB60
MDB59
VREFC_A4_B
VREFD_Q4_B
M8
H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VGS
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
B_BA0
B_BA1
B_BA2
M2
N8
M3
CLKB1
CLKB1#
CKEB1
J7
K7
K9
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
K1
L2
J3
K3
L3
QSB6
QSB5
QSB4
QSB7
F3
C7
DQMB#6
DQMB#5
DQMB#4
DQMB#7
E7
D3
QSB#6
QSB#5
QSB#4
QSB#7
G3
B7
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DRAM_RST# T2
L8
1
MAB[13..0]
MAB[13..0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
VREFC_A2_B
VREFD_Q2_B
16
D
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDB19
MDB21
MDB16
MDB18
MDB20
MDB22
MDB17
MDB23
MDB[0..63]
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
16
MDB[0..63]
UV10
VREFCA
VREFDQ
UV9
VREFC_A1_B M8
VREFD_Q1_B H1
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
RV112
240_0402_1%
PX@
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
96-BALL
SDRAM DDR3
E3
F7
F2
F8
H3
H8
G2
H7
MDB33
MDB38
MDB39
MDB36
MDB35
MDB34
MDB37
MDB32
MDB55
MDB50
MDB54
MDB51
MDB53
MDB48
MDB52
MDB49
D7
C3
C8
C2
A7
A2
B8
A3
MDB62
MDB58
MDB63
MDB56
MDB61
MDB57
MDB60
MDB59
MDB40
MDB47
MDB42
MDB46
MDB43
MDB45
MDB41
MDB44
+1.5VGS
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
+1.5VGS
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
96-BALL
SDRAM DDR3
CV225
0.01U_0402_16V7K
PX@
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
1
VREFD_Q4_B
1
RV130
4.99K_0402_1%
PX@
1
RV129
4.99K_0402_1%
PX@
0.1U_0402_16V7K
PX@
CV233
VREFC_A4_B
0.1U_0402_16V7K
PX@
CV232
0.1U_0402_16V7K
PX@
CV231
VREFD_Q3_B
RV127
4.99K_0402_1%
PX@
2
0.1U_0402_16V7K
PX@
CV230
RV122
4.99K_0402_1%
PX@
2
RV128
4.99K_0402_1%
PX@
RV121
4.99K_0402_1%
PX@
VREFC_A3_B
1
0.1U_0402_16V7K
PX@
CV229
RV126
4.99K_0402_1%
PX@
RV120
4.99K_0402_1%
PX@
VREFD_Q2_B
1
1
2
RV125
4.99K_0402_1%
PX@
1
2
RV119
4.99K_0402_1%
PX@
VREFC_A2_B
0.1U_0402_16V7K
PX@
CV227
1
1
0.1U_0402_16V7K
PX@
CV226
VREFC_A1_B
RV124
4.99K_0402_1%
PX@
2
0.1U_0402_16V7K
PX@
CV228
VREFD_Q1_B
RV123
4.99K_0402_1%
PX@
RV118
4.99K_0402_1%
PX@
RV117
4.99K_0402_1%
PX@
RV116
4.99K_0402_1%
PX@
RV115
4.99K_0402_1%
PX@
+1.5VGS
+1.5VGS
Compal Secret Data
Issued Date
2011/06/30
Deciphered Date
2013/06/30
Title

ATI_SeymourXT_M2_VRAM_B
Size
C
Date:
1U_0402_6.3V6K
PX@
CV270
1U_0402_6.3V6K
PX@
CV269
1U_0402_6.3V6K
PX@
CV268
1U_0402_6.3V6K
PX@
CV267
1U_0402_6.3V6K
PX@
CV266
1U_0402_6.3V6K
PX@
CV265
1U_0402_6.3V6K
PX@
CV264
1U_0402_6.3V6K
PX@
CV263
1U_0402_6.3V6K
PX@
CV262
1U_0402_6.3V6K
PX@
CV261
1U_0402_6.3V6K
PX@
CV260
1U_0402_6.3V6K
PX@
CV259
1U_0402_6.3V6K
PX@
CV258
1U_0402_6.3V6K
PX@
CV257
1U_0402_6.3V6K
PX@
CV256
1U_0402_6.3V6K
PX@
CV255
1U_0402_6.3V6K
PX@
CV254
1U_0402_6.3V6K
PX@
CV253
+1.5VGS
1U_0402_6.3V6K
PX@
CV252
1U_0402_6.3V6K
PX@
CV251
10U_0603_6.3V6M
PX@
CV250
10U_0603_6.3V6M
PX@
CV249
10U_0603_6.3V6M
PX@
CV248
10U_0603_6.3V6M
PX@
CV247
0.1U_0402_16V7K
PX@
CV246
0.1U_0402_16V7K
PX@
CV245
0.1U_0402_16V7K
PX@
CV244
0.1U_0402_16V7K
PX@
CV243
0.1U_0402_16V7K
PX@
CV242
0.1U_0402_16V7K
PX@
CV241
0.1U_0402_16V7K
PX@
CV240
0.1U_0402_16V7K
PX@
CV239
0.1U_0402_16V7K
PX@
CV238
0.1U_0402_16V7K
PX@
CV237
0.1U_0402_16V7K
PX@
CV236
0.1U_0402_16V7K
PX@
CV235
0.1U_0402_16V7K
PX@
CV234
+1.5VGS
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
Sunday, November 27, 2011

1
20
of
56
UT1
+3VS
1
APU_LVDS_DAT
APU_LVDS_CLK
RT6
+AVDD12
2
4.7K_0402_5%
2
4.7K_0402_5%
RT5
4
16
19
35
+AVDD33
+1.2VS
+DVDD12
20mil
+DVDD12
5
25
+DVDD33
8
22
1
LT1 2
FBMA-L11-201209-221LMA30T_0805
CT5
2.2U_0603_6.3V4Z
CT4
.01U_0402_16V7K
CT3
.01U_0402_16V7K
CT2
0.1U_0402_16V4Z
CT1
0.1U_0402_16V4Z
CT19
0.1U_0402_16V4Z
CT20
0.1U_0402_16V4Z
8
8
22
+AVDD12
20mil
CT11
2.2U_0603_6.3V4Z
CT10
.01U_0402_16V7K
CT9
.01U_0402_16V7K
CT8
0.1U_0402_16V4Z
CT7
0.1U_0402_16V4Z
CT21
0.1U_0402_16V4Z
CT22
0.1U_0402_16V4Z
DP0_TXP0_C
DP0_TXN0_C
9
7
APU_PCIE_RST#
22
22
1
LT2 2
FBMA-L11-201209-221LMA30T_0805
2
3
DP0_TXP0_C
DP0_TXN0_C
TL_ENVDD
10,13,25,31,32
+1.2VS
AVDD12
ANX3112
LVDS_L0_N
LVDS_L0_P
AVDD25
AVDD25
AVDD25
AVDD25
LVDS_L1_N
LVDS_L1_P
DVDD12
DVDD12
LVDS_L2_N
LVDS_L2_P
APU_LVDS_CLK
APU_LVDS_DAT
10
32
1
2
RT17
100K_0402_5%
33
DP0_AUXN_C
34
DP0_AUXP_C
LVDS_HPD
1
8
8
28
29
APU_LVDS_CLK
APU_LVDS_DAT
DP0_AUXN_C
DP0_AUXP_C
10
11
APU_TXOUT0APU_TXOUT0+
APU_TXOUT0- 22
APU_TXOUT0+ 22
12
13
APU_TXOUT1- 22
APU_TXOUT1+ 22
14
15
APU_TXOUT2- 22
APU_TXOUT2+ 22
TEST_EN
DVDD25
DVDD25
2
10K_0402_5%
17
18
LVDS_CLKL_N
LVDS_CLKL_P
1
RT21
1
R_BIAS
21
TL_BKOFF#
30
CSCL
31
CSDA
DIGON
BL_EN
2
RT22
36
APU_TXOUT_CLK- 22
APU_TXOUT_CLK+ 22
2
100P_0402_50V8J
1
12K_0402_1%
CT6
R_BIAS
1:test mode
0:normal mode
APU_TXOUT_CLKAPU_TXOUT_CLK+
DPRX_LN0_P
DPRX_LN0_N
RESET_L
CFG_SCL
DDC_CLK
DDC_DATA
CFG_SDA
DPRX_HPD
PROG_SCL
PROG_SDA
23
T31
24
T33
DPRX_AUX_N
DPRX_AUX_P
2
22
10
TL_INVT_PWM
APU_INVT_PWM
1 RT18
1 RT19
2
0_0402_5%
2
0_0402_5%
26
27
VARY_BL
20
AVSS
CPU_VARY_BL
37
Epad
ANX3112_QFN36_6X6
+DVDD33
20mil
+3VS
1
LT3 2
FBMA-L11-201209-221LMA30T_0805
CT13
2.2U_0603_6.3V4Z
CT12
0.1U_0402_16V4Z
@
RT23
DP0_AUXP_C
1M_0402_5%
@
RT24
1M_0402_5%
B
+3VS
Place via on each trace bus and let resistor very close the via
DP0_AUXN_C
+3VS
+AVDD33
20mil
1
LT4 2
FBMA-L11-201209-221LMA30T_0805
TL_BKOFF#
ENBKL
10,37
CSDA
QT1A
@
6
DISPOFF#
22
4
CSCL
CT18
2.2U_0603_6.3V4Z
CT17
.01U_0402_16V7K
CT16
.01U_0402_16V7K
CT15
0.1U_0402_16V4Z
CT14
0.1U_0402_16V4Z
CT23
0.1U_0402_16V4Z
BKOFF#
BKOFF#
1
2
0_0402_5%
EC_SMB_DA2
14,37,8
EC_SMB_CK2
14,37,8
QT1B
@
3
EC_SMB_CK2
2
A
Compal Secret Data
Issued Date
2011/07/08
Deciphered Date
2015/07/08
Title
Size
B
Date:
EC_SMB_DA2
RT20
37
RT14
1
2
0_0402_5%
RT15
1 @
2
0_0402_5%
+3VS
LVDS Translator - ANX3112X

Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
1
21
of
56
+LCDVDD
Panel +LCDVDD Control
+3VS
60mils
+3VALW
R707
300_0603_5%
6 2
R708
10K_0402_5%
2
R709
4
R713
100K_0402_5%
1
Del APU_ENVDD
C1152
.047U_0402_16V7K
C1155
680P_0402_50V7K
2
1
L36
40mils
1
2
FBMA-L11-201209-221LMA30T_0805
40mils
+LCDVDD
60mils
1
C1149
+INVPW R_B+
Q29
AP2301GN-HF_SOT23-3
4.7U_0603_6.3V6K
2 0_0402_5%
Del VGA_ENVDD
B+
2
1
Q28B
R712 1
1
1K_0402_5%
TL_ENVDD
C1153
4.7U_0603_6.3V6K
2
3
Q28A
DMN66D0LDW -7_SOT363-6
21
C1156
68P_0402_50V8J
C1154
0.1U_0402_16V4Z
DISPOFF#
INVT_PW M
1
C1163
1
C1164
2
220P_0402_50V7K
2
220P_0402_50V7K
Panel Backlight Control

Modify and change to page 21
LVDS Connector
JLVDS1
D_MIC_CLK
D_MIC_DATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
D1
SCA00001L00
31
32
33
34
35
+LCDVDD
21
21
37
EC_INVT_PW M
EC_INVT_PW M
1 @
R716
2
0_0402_5%
INVT_PW M
R719
100K_0402_5%
Del
TL_INVT_PW M
TL_INVT_PW M
1
R721
2
0_0402_5%
21 APU_TXOUT2+
21 APU_TXOUT221 APU_TXOUT_CLK+
21 APU_TXOUT_CLK-
21
21 APU_TXOUT1+
21 APU_TXOUT1-
<Translator LVDS Output>
Panel PWM Control
APU_LVDS_CLK
APU_LVDS_DAT
21 APU_TXOUT0+
21 APU_TXOUT0-
21
DISPOFF#
USB20_N5_R
USB20_P5_R
DISPOFF#
INVT_PW M
+INVPW R_B+
B
+3VS
USB20_N5_R
33
33
OCE2012120YZF_4P
3
USB20_P5_R
D_MIC_CLK
D_MIC_DATA
0_0402_5%
R975
USB20_P5
L90 @
4
0_0402_5%
27
USB20_N5
27
R972
PESD5V0U2BT
GND
GND
GND
GND
GND
STARC_111H30-000000-G4-R
CONN@
USB20_P5_R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
3
3
no updated.
11/10 follow QCL50

1
PESD5V0U2BT
USB20_N5_R
D6
SCA00001L00
@
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
LVDS/eDP Connector
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
1
22
of
56
+3VS
+3VS
+HDMI_5V_OUT
JHDMI1
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_CK-
1
2
HDMI_SDATA
HDMI_SCLK
R750
2K_0402_1%
R749
2K_0402_1%
R748
0_0402_5%
R746
4.7K_0402_5%
R745
4.7K_0402_5%
Combine with HDMI
HDMI_HPD
+HDMI_5V_OUT
APU_HDMI_CLK
5
Q32B
2N7002KDW_SOT363-6
8
APU_HDMI_DATA
HDMI_R_D0+
HDMI_R_D1-
HDMI_SCLK
HDMI_R_D1+
HDMI_R_D2-
Q32A
2N7002KDW_SOT363-6
3
HDMI_SDATA
HDMI_R_D2+
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2GND
D2_shield GND
D2+
GND
23
22
21
20
TYCO_2041343-1~D
CONN@
1
0_0402_5%
HDMI_C_CLK+
R756 1
5
Q96A
HDMI_HPD
2
Q96B
For APU_HDMI_HPD
1
@ L38
WCM2012F2S-900T04_0805
4
4
2
R771
DP2_HPD
2
1
8
R74
4.7K_0402_5%
R73
1K_0402_5%
Del VGA_HDMI_DET
C
11/05 update footprint.
+5VS
+3VS
HDMI_C_CLKR75
100K_0402_5%
0_0402_5%
2
3
HDMI_R_CK-
0_0402_5%
R769 1
1
1
@ L39
WCM2012F2S-900T04_0805
4
4
1
HDMI_C_TX0-
0_0402_5%
2
3
8
8
APU_HDMI_TXD1APU_HDMI_TXD1+
8
8
8
8
APU_HDMI_TXCAPU_HDMI_TXC+
HDMI_C_TX2HDMI_C_TX2+
R784 1
R786 1
2 604_0402_1%
2 604_0402_1%
C1168 2
C1169 2
1 .1U_0402_16V7K
1 .1U_0402_16V7K
R788 1
R790 1
2 604_0402_1%
2 604_0402_1%
C1170 2
C1171 2
1 .1U_0402_16V7K
1 .1U_0402_16V7K
R792 1
R795 1
2 604_0402_1%
2 604_0402_1%
C1172 2
C1173 2
1 .1U_0402_16V7K
1 .1U_0402_16V7K
HDMI_C_CLKHDMI_C_CLK+
R797 1
R799 1
2 604_0402_1%
2 604_0402_1%
R781 1
+HDMI_5V_OUT
Q35
2N7002K_SOT23-3
2
G
3
HDMI_R_D0-
0_0402_5%
2
3
C4709
33P_0402_50V8J
HDMI_R_D1+
C4710
33P_0402_50V8J
HDMI_R_D1-
R782
HDMI_C_TX2+
0_0402_5%
R783 1
1
1
@ L41
WCM2012F2S-900T04_0805
4
4
100K_0402_5%
HDMI_C_TX2R794
C4711
33P_0402_50V8J
S
R801
HDMI_C_TX1-
1 .1U_0402_16V7K
1 .1U_0402_16V7K
From APU
C1166 2
C1167 2
8
8
10/27 change to 604 ohm.
C4708
33P_0402_50V8J
0_0402_5%
1
1
@ L40
WCM2012F2S-900T04_0805
4
4
Close to HDMI conn
C4707
33P_0402_50V8J
HDMI_R_D0+
R779
HDMI_C_TX1+
C4706
33P_0402_50V8J
R765
HDMI_C_TX0+
HDMI_R_CK+
0_0402_5%
2
3
HDMI_R_D2+
C4712
33P_0402_50V8J
2
3
HDMI_R_D20_0402_5%
C4713
33P_0402_50V8J
11/15 EMI
Near connector
A
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
Size
B
Date:
HDMI Connector
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
1
23
of
56
+CRT_VCC
T19
1
2
+CRT_VCC
2
2
L45 1
FCM2012CF-800T06_2P
R808
FCH_CRT_HSYNC
FCH_CRT_HSYNC
10K_0402_5%
U23
74AHCT1G125GW_SOT353-5
4
CRT_HSYNC_1
T20
11/20 update footprint

2
FCH_CRT_DDC_SDA
C1183
10P_0402_50V8J
CRT_VSYNC_2
1
C1185 2
68P_0402_50V8J
FCH_CRT_DDC_SCL
1
C1184
10P_0402_50V8J
C1186
68P_0402_50V8J
5
P
3
OE#
2 0.1U_0402_16V4Z
FCH_CRT_VSYNC
FCH_CRT_VSYNC
16
17
C-H_13-12201503CP
CONN@
100P_0402_50V8J
26
C1181
+CRT_VCC
C1187 1
G
G
CRT_HSYNC_2
2
L46 1
FCM2012CF-800T06_2P
26
OE#
2
5
1
2
C1182 0.1U_0402_16V4Z
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
2
1
CRT Connector
JCRT1
C1180
10P_0402_50V8J
C1179
10P_0402_50V8J
C1178
C1177
C1176
C1175
R807
150_0402_1%
R806
150_0402_1%
R805
150_0402_1%
10P_0402_50V8J
CRT_B_2
10P_0402_50V8J
2
L44 1
FCM2012CF-800T06_2P
10P_0402_50V8J
FCH_CRT_B
10P_0402_50V8J
CRT_G_2
FCH_CRT_B
2
L43 1
FCM2012CF-800T06_2P
26
FCH_CRT_G
FCH_CRT_G
CRT_R_2
26
2
L42 1
FCM2012CF-800T06_2P
FCH_CRT_R
FCH_CRT_R
26
W=40mils
Combine with HDMI
@
D21
PJDLC05C_SOT23-3
1
@
D20
PJDLC05C_SOT23-3
1
CRT_VSYNC_1
U24
74AHCT1G125GW_SOT353-5
+CRT_VCC
11/08 Combine with HDMI

1
1
2
F1
1.1A_6V_SMD1812P110TF
+HDMI_5V_OUT
FCH_CRT_DDC_SDA
26
FCH_CRT_DDC_SCL
FCH_CRT_DDC_SDA
R813
4.7K_0402_5%
FCH_CRT_DDC_SCL
W=40mils
+CRT_VCC
C1174
0.1U_0402_16V4Z
26
D63
RB751V_SOD323
1
D22
RB751V_SOD323
+CRT_VCC
R812
4.7K_0402_5%
+5VS
W=40mils
C1165
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
Size
B
Date:
CRT Connector
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
24
of
56
U25A
C1188 1
2 150P_0402_50V8J
HUDSON-2
Del GPP PCI-E
AA27
AA26
W27
V27
V26
W26
W24
W23
ABO connect to USB3.0 PHY.
R833 1
+1.1VS_CKVDD
2 2K_0402_1% CLK_CALRN
F27
G30
G28
For "EXT" CLK mode, input to PCIE,
SS
8
8
APU DISP
R26
T26
APU_DISP_CLKP
APU_DISP_CLKN
APU_DISP_CLKP
APU_DISP_CLKN
H33
H31
NSS
8
8
APU
13
13
VGA
APU_CLKP
APU_CLKN
CLK_PEG_VGA
CLK_PEG_VGA#
2
2
C4714
C4715
APU_CLKP
APU_CLKN
T24
T23
CLK_PEG_VGA
CLK_PEG_VGA#
J30
K29
1
122P_0402_50V8J
22P_0402_50V8J
H27
H28
J27
K26
11/15 RF
Wireless LAN
32
32
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
Ethernet LAN
31
31
CLK_PCIE_LAN
CLK_PCIE_LAN#
SS
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
F33
F31
CLK_PCIE_LAN
CLK_PCIE_LAN#
E33
E31
M23
M24
M27
M26
Del MIN2,Card reader, USB 3.0 IC
N25
N26
R23
R24
N27
R27
J26
25M_X1 and 25M_X1_R=50ohm, 4mil

25M_X2=50ohm, 4mil
1
2
C1200
27P_0402_50V8J
25M_X1_R
1
1
R856
2
25M_X1
0_0402_5%
C31
25M_X2
C33
R858
1M_0402_5%
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
CLK_CALRN
PCIE_RCLKP
PCIE_RCLKN
DISP_CLKP
DISP_CLKN
DISP2_CLKP
DISP2_CLKN
APU_CLKP
APU_CLKN
SLT_GFX_CLKP
SLT_GFX_CLKN
GPP_CLK0P
GPP_CLK0N
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
GPP_CLK1P
GPP_CLK1N
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
GPP_CLK4P
GPP_CLK4N
LPCCLK0
GPP_CLK5P
GPP_CLK5N
GPP_CLK6P
GPP_CLK6N
1
2
C1201
27P_0402_50V8J
1
2
C1206
15P_0402_50V8J
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
VGA_PWRGD_R Change to GPIO51
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
DDR3L_EN
R826
8.2K_0402_5%
NC
OSC
NC
3
2
APU_PCIE_RST#
10,13,21,31,32
U26
NC7SZ08P5X_NL_SC70-5
40
Reserved BIOS setting

2
1
R835
CRCLK_REQ#
2
8.2K_0402_5%
+3VS
Del USB3.0_CLKREQ# PH.

GPIO0
@
@
2 0_0402_5%
2 0_0402_5%
20mils
Update net name
CRCLK_REQ#
R854 1
R873 1
+RTCBATT
11/20 add
37
Reserved for card reader
JRTC1
1
2
3
4
PX_GPU_RST# 13,27
PXS_PWREN 15,27,48,52,53,56
T24
1
2
G1
G2
ACES_50273-0020N-001
CONN@
LPC_CLK0_EC
1
R58
2
1
10_0402_5% C44
2
@ 10P_0402_50V8J
For EMI Requirement Close to U25

B25
LPC_CLK0_EC
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
LPC_CLK1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
G25
E28
E26
G26
F26
ALLOW_STOP
EC_THERM_R#
APU_PWRGD
LPC_CLK0_EC
28,32,37
APU_PG/APU_RST#/LDT_STP# : OD pin
DMA_ACTIVE# : IN/OD, 0.8V threshold
PROCHOT# : IN, 0.8V threshold
LDT_STP : No use, NC
DMA active. The FCH drives the DMA_ACTIVE# to
APU to notify DMA activity. This will cause the APU
to reestablish the UMI link quicker.
LPC_CLK1 28
LPC_AD0 32,37
LPC_AD1 32,37
LPC_AD2 32,37
LPC_AD3 32,37
LPC_FRAME# 32,37
Del USB3.0_CLKREQ#
SERIRQ
SERIRQ
37
32K_X1
H7
F1
F3
E6
1
@
R853
2
0_0402_5%
APU_RST#
APU_RST#
33P_0402_50V8J
APU_RST#
ALLOW_STOP 8
EC_THERM# 37,45,54,8
APU_PWRGD 54,8
C42
33P_0402_50V8J
for ESD Close FCH Side
RTC_CLK_R
1
R855
2
22_0402_5%
+RTCBATT
RTCVCC_R
G2
32K_X1
G4
32K_X2
RTC_CLK
R857
1K_0402_5%
28,37
RTC_CLK_R=50ohm, 4mil
RTC_CLK=50ohm, 4mil
W>=15mils
W>=15mils
C1202
0.1U_0402_16V4Z
+RTCVCC
W>=15mils
1
R859
D23
2
2
510_0402_5%
C1203
1U_0402_6.3V6K
R860
3
C1204
0_0603_5%
R860 for Clear CMOS
X5
OSC
Y
A
49
HDDHALT_LED#
25MHZ_20PF_7A25000012
28
28
28
28
28
25M_X2
32K_X2
5
T26
32K_X1
R861
20M_0402_5%
2
C1195
150P_0402_50V8J
C1205,C1206
Change for G3
RTC timing issue
<improve amplitude>
2 33_0402_5%
2
R829 1
APU_PCIE_RST#_C
AF18
AE18
AC16
AD18
HUDSON-M2_FCBGA656
1
2
C1205
15P_0402_50V8J
C1193
1
2
0.1U_0402_16V4Z
C41
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
14M_25M_48M_OSC
25M_X1
+3VALW
For PCIE device reset on FS1

(GFX,GLAN,WLAN,LVDS Travis)
APU_PWRGD
GPP_CLK7P
GPP_CLK7N
GPP_CLK8P
GPP_CLK8N
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
X1
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
PCIE_CALRP R=50ohm, 4mil,<1000mil

PCIE_CALRN R=50ohm, 4mil,<1000mi
PCIE_CALRP
PCIE_CALRN
28
28
AB5
V33
V31
W30
W32
AB26
AB27
AA24
AA23
28
PCI_CLK3
PCI_CLK4
0.1U_0402_16V4Z
AF29
AF31
PCI_CLK1
2 590_0402_1% PCIE_CALRP
2 2K_0402_1% PCIE_CALRN
UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
AF3
AF1
AF5
AG2
AF6
AB33
AB31
AB28
AB29
Y33
Y31
Y28
Y29
UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
R827 1
R828 1
+PCIE_VDDR_FCH
UMI_FTX_C_MRX_P0
UMI_FTX_C_MRX_N0
UMI_FTX_C_MRX_P1
UMI_FTX_C_MRX_N1
UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2
UMI_FTX_C_MRX_P3
UMI_FTX_C_MRX_N3
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PCI CLKS
UMI_FTX_C_MRX_P0
UMI_FTX_C_MRX_N0
UMI_FTX_C_MRX_P1
UMI_FTX_C_MRX_N1
UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2
UMI_FTX_C_MRX_P3
UMI_FTX_C_MRX_N3
AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
PCI INTERFACE
6
6
6
6
6
6
6
6
UMI_MTX_FRX_P0
UMI_MTX_FRX_N0
UMI_MTX_FRX_P1
UMI_MTX_FRX_N1
UMI_MTX_FRX_P2
UMI_MTX_FRX_N2
UMI_MTX_FRX_P3
UMI_MTX_FRX_N3
PCIE_RST#
A_RST#
LPC
UMI_MTX_C_FRX_P0
UMI_MTX_C_FRX_N0
UMI_MTX_C_FRX_P1
UMI_MTX_C_FRX_N1
UMI_MTX_C_FRX_P2
UMI_MTX_C_FRX_N2
UMI_MTX_C_FRX_P3
UMI_MTX_C_FRX_N3
2
2
2
2
2
2
2
2
AE2
AD5
APU
6
6
6
6
6
6
6
6
C1189 1
C1190 1
C1191 1
C1192 1
C1196 1
C1197 1
C1198 1
C1194 1
APU_PCIE_RST#_C
2 33_0402_5%
S5 PLUS
R825 1
PLT_RST#
PCI EXPRESS INTERFACES
37
CLOCK GENERATOR
PCI Host Bus Reset (To EC)
+3VLP
BAV70W_SOT323-3
Update to +3VLP
D23 close to U25 (FCH)
32K_X1=50ohm, 4mil,<1500mil
32K_X2=50ohm, 4mil,<1500mil
32.768KHZ_12.5PF_Q13MC14610002
SJ100006600
32K_X2
2011/07/08
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
Hudson-M2/M3-UMI/PCI/CLOCK/LPC/RTC
Custom
Close to HUDSON-M2
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
E
25
of
56
&UH1
HUDSON-2
SATA_STX_DRX_P1
SATA_STX_DRX_N1
30
30
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
AL20
AN20
SATA_STX_DRX_P1
SATA_STX_DRX_N1
AN22
AL22
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
AH20
AJ20
AJ22
AH22
AM23
AK23
AH24
AJ24
AN24
AL24
AL26
AN26
AJ26
AH26
AN29
AL28
AK27
AM27
AL29
AN31
AL31
AL33
AH33
AH31
AJ33
AJ31
SATA_CALRP=35ohm,<1000mil
SATA_CALRN=35ohm,<1000mi
+AVDD_SATA
1K_0402_1% 2
1 R899
SATA_CALRP
AF28
931_0402_1%2
1 R900
SATA_CALRN
AF27
SATA_TX0P
SATA_TX0N
SATA_RX0N
SATA_RX0P
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_CD/GPIO75
SD_WP/GPIO76
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80
SD CARD
30
30
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
SATA_TX1P
SATA_TX1N
SATA_RX1N
SATA_RX1P
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
GBE LAN
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TX5P
SATA_TX5N
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/SPI_WP#/GPIO161
SPI ROM
SATA_STX_DRX_P0
SATA_STX_DRX_N0
30
30
SATA_RX5N
SATA_RX5P
NC6
NC7
VGA_RED
NC8
NC9
VGA_GREEN
NC10
NC11
VGA_BLUE
VGA DAC
ODD
1
30
30
SERIAL ATA
HDD1
AK19
AM19
NC12
NC13
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
SATA_CALRP
SATA_CALRN
VGA_DAC_RSET
FCH Schematics Check List V1.20

SATA_LED#
SATA_LED#
R902 1
+3VS
AD22
+3VS
R30
AUX_VGA_CH_P
AUX_VGA_CH_N
2 10K_0402_5%
AF21
AG21
SATA_ACT#/GPIO67
VGA MAINLINK
40
SATA_X1
SATA_X2
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
1
BT_ON#
10K_0402_5%
11/15 EMI
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
MX25L3206EM2I-12G_SO8
11/16 Follow Q5WV8
32
BT_ON#
BT_ON#
Del W_DISABLE#_2
32
WL_OFF#
WL_OFF#
AH16
AM15
AJ16
AK15
AN16
AL16
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
VIN0/GPIO175
HW MONITOR
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
+3VALW
30
ODD_PWR
ODD_PWR
K6
VIN1/GPIO176
VIN4/SLOAD_1/GPIO179
TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180
R14
R29
10K_0402_5%
10K_0402_5%
1
K3
10K_0402_5%
R15
R16
K5
M6
10K_0402_5%
TEMPIN1/GPIO172
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
NC1
NC2
NC3
NC4
NC5
Check CS# PU R 1kor10k and pop/nopop

SCL v1.20 : If an SPI ROM is shared between
the FCH and the Embedded Controller
a 10-K pull-up resistor to +3.3V_S5 is installed.
GBE_COL / GBE_CRS / GBE_MDIO
GBE_RXERR / Left unconnected.
FCH SCL V1.20 19-35
3
7
1
6
5
FCH_SPI_MOSI
CONN@
VCC
VSS
W
HOLD
1
S
C
D
FCH_SPI_MISO
MX25L3206EM2I-12G_SO8
@ R38
1
FCH_SPI_CLK
@ C24
2
1
2
10_0402_5%
10P_0402_50V8J
Add for EMI 201011291330
GBE_PHY_INTR
L30
FCH_CRT_R
R896 1
2 150_0402_1%
FCH_CRT_R
24
L32
FCH_CRT_G
R897 1
2 150_0402_1%
FCH_CRT_G
24
M29
FCH_CRT_B
R898 1
2 150_0402_1%
FCH_CRT_B
24
R35
FCH_CRT_HSYNC
FCH_CRT_VSYNC
M33
N32
FCH_CRT_DDC_SDA
FCH_CRT_DDC_SCL
ML_VGA_AUXP_C
ML_VGA_AUXN_C
U28
AUXCAL1
R903
ML_VGA_TXP0
ML_VGA_TXN0
ML_VGA_TXP1
ML_VGA_TXN1
ML_VGA_TXP2
ML_VGA_TXN2
ML_VGA_TXP3
ML_VGA_TXN3
FCH_CRT_HPD
2
10K_0402_5%
10
+FCH_VDDAN_33_DAC_R
10K_0402_5%
10K_0402_5%
10K_0402_5%
R11
M5
1
R904
10K_0402_5%
R10
M1
AUXCAL <1000mil
8
8
8
8
8
8
8
8
10K_0402_5%
R9
P3
24
24
10K_0402_5%
R8
P1
24
24
+VDDAN_11_ML
ML_VGA_TXP0
ML_VGA_TXN0
ML_VGA_TXP1
ML_VGA_TXN1
ML_VGA_TXP2
ML_VGA_TXN2
ML_VGA_TXP3
ML_VGA_TXN3
R7
N4
+3VALW
2
10K_0402_5%
ML_VGA_AUXP_C 8
ML_VGA_AUXN_C 8
R6
L2
1
R892
Removed RGMII/MII support and updated termination

requirements for GBE_COL, GBE_CRS, GBE_RXERR
and GBE_MDIO when RGMII/MII interface is not used.
FCH DGv1.20 / SCL v1.20
FCH_CRT_DDC_SDA
FCH_CRT_DDC_SCL
2
100_0402_1%
R5
M3
GBE_PHY_INTR
2
715_0402_1%
C29 FCH_CRT_HPD
N2
FCH_SPI_CLK
FCH_CRT_HSYNC
FCH_CRT_VSYNC
1
R901
V28
V29
2 0_0402_5%
GBE_PHY_INTR
Pulled-up to +3.3V_S5 with a 10-K 5% resistor.
FCH SCL v1.20 #19-85
M28
N30
K31
@
1
10K_0402_5%
Enabled integrated pull-down/up and left unconnected.
R12
10K_0402_5%
AG16
AH10
A28
G27
L4
ODD_PWR
UH1
8
FCH_SPI_MISO
FCH_SPI_MOSI
FCH_SPI_CLK_R
FCH_SPI_CS1#
FCH_SPI_WP#
T31
T33
T29
T28
R32
R30
P29
P28
1
C4716
1
C466
2
FCH_SPI_WP#
10K_0402_5%
1 FCH_SPI_HOLD#
10K_0402_5%
2
FCH_SPI_CS1#
10K_0402_5%
FCH_SPI_CLK
V6
V5
V3
T6
V1
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
2
680P_0402_50V7K
2
0.1U_0402_16V4Z
1
R934
2
R935
1
R627
FCH_CRT_HPD
ML_VGA_HPD/GPIO229
Del WL_OFF#_2
3
4MB SPI ROM

& Non-share ROM.
+3VALW
U25B
SATA_STX_DRX_P0
SATA_STX_DRX_N0
R17
10K_0402_5%
1
HUDSON-M2_FCBGA656
11/15 AMD check list for reserved.
2011/07/08
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
Hudson-M2/M3-SATA/GBE/HWM
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
E
26
of
56
U25D
37
37
37
THERMTRIP:
Need level shift from +3VALW to +1.5V
Note: Ensure FCH internal pull-up resistor
to +3.3V S5 is disabled to prevent leakage
when APU is powered down.
31,32
31
+3VS
LAN_CLKREQ#
PC_BEEP use.
FCH_SPKR
FCH_SCLK0
FCH_SDATA0
FCH_SCLK1
FCH_SDATA1
MINI1_CLKREQ#
1ODD_DA#_1
D
ACCEL_INT#
11/08 Reserved BIOS setting
+3VS
30
ODD_PLUG#
40
41
USB_OC1#
USB_OC0#
R78
1CARD_DET_FCH
T32
CARD_DET_FCH
USB_OC1#
USB_OC0#
M7
R8
T1
P6
F5
P5
J7
T8
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD
USB 1.1
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
RSMRST#
+3VALW
33
33
Add USB_OC0#
33ohm termination
resistor at CODEC side
R868 1
R869 1
HDA_SYNC_AUDIO
HDA_RST_AUDIO#
2 33_0402_5%
2 33_0402_5%
AB3
AB1
AA2
Y5
Y3
Y1
AD6
AE4
2
100K_0402_5%
USB_OC0#
1
R54
1
R871
1
R874
1
R876
1
R877
1
R878
1
R18
1
R37
1
R942
2
100K_0402_5%
2
10K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
100K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
8.2K_0402_5%
USB_OC1#
FCH_SDATA1
13,25
15,25,48,52,53,56
PX_GPU_RST#
PXS_PWREN
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
USB_SS_TX1N
SYS_RESET#
LAN_CLKREQ#
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
+3VALW
EMBEDDED CTRL
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
LAN_CLKREQ#
1
2
WD_PWRGD
USB20_P8
USB20_N8
USB20_P8
USB20_N8
32
32
Hudson-M2/M3
EHCI CTL
DEV 19, Fn 2
Mini1-WLAN
Del USB port 7
USB20_P5
USB20_N5
USB20_P5
USB20_N5
22
22
Camera
Hudson-M2/M3
EHCI CTL
DEV 18, Fn 2
<Support Wakeup>
USB port3-->USB port0
C1
C3
USB20_P1
USB20_N1
E1
E3
USB20_P0
USB20_N0
C16
A16
USBSS_CALRP
USBSS_CALRN
USB20_P1
USB20_N1
39
39
FP
USB20_P0
USB20_N0
40
40
USB 2.0 port(Right-2)
R864 1
R865 1
2 1K_0402_1%
2 1K_0402_1%
+FCH_VDD_11_SSUSB_S
USBSS_CALRP=35ohm,<1000mil
USBSS_CALRN=35ohm,<1000mi
D15
B15
USB30_MTX_DRX_P2
USB30_MTX_DRX_N2
Hudson-M3
xHCI CTL
DEV 16, Fn 1
xHCI CTL
DEV 16, Fn 0
E14
F14
USB30RXP2
USB30RXN2
F15
G15
USB30_MTX_DRX_P1
USB30_MTX_DRX_N1
H13
G13
USB30RXP1
USB30RXN1
J16
H16
USB30_MTX_DRX_P0
USB30_MTX_DRX_N0
J15
K15
USB30RXP0
USB30RXN0
H19
G19
G22
G21
E22
H22
J22
H21
R870
R872
R90
R91
1
1
1
1
USB30_MTX_DRX_P2
USB30_MTX_DRX_N2
USB30RXP2
USB30RXN2
USB30_MTX_DRX_P1
USB30_MTX_DRX_N1
USB30RXP1
USB30RXN1
2
2
2
2
41
41
USB 3.0 port(Left-2)
41
41
USB30_MTX_DRX_P0
USB30_MTX_DRX_N0
USB30RXP0
USB30RXN0
40
40
40
40
41
41
41
41
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
EC_PWM2
EC_PWM2
28
For PCIE device reset on FS1

(GFX,GLAN,WLAN,LVDS Travis)
HUDSON-M2_FCBGA656
+3VALW
@ C1199
1
2
R44
100K_0402_5%
MINI1_CLKREQ#
Del USB port 9
K21
K22
F22
F24
E24
B23
C24
F18
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
FCH_SDATA0
R48
100K_0402_5%
2
10K_0402_5%
2
8.2K_0402_5%
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
FCH_GPIO189
FCH_GPIO190
FCH_GPIO188
FCH_SCLK0
Del MINI2_CLKREQ# PH.

1
R862
1
R940
R46
100K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
8.2K_0402_5%
TEST2
R43
2.2K_0402_5%
TEST1
TEST0
+3VS
1
R880
1
R881
1
R882
D21
C20
D23
C22
F21
E20
F20
A22
E18
A20
J18
H18
G18
B21
K18
D19
A18
C18
B19
B17
A24
D17
SMIB
R45
2.2K_0402_5%
FCH_GPIO189
FCH_GPIO190
1
1 R842
R843
Update net name
R47
2.2K_0402_5%
2 PX@
2 PX@
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
FCH_PCIE_WAKE#
0_0402_5%
0_0402_5%
41
41
C12
A12
USB_SS_TX2P
USB_SS_TX2N
PS2_DAT/SDA4/GPIO187
PS2_CLK/CEC/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
41
41
USB20_P10
USB20_N10
Hudson-M3
xHCI CTL
DEV 16, Fn 1
xHCI CTL
DEV 16, Fn 0
A14
C14
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX1P
USB_SS_RX1N
K19
J19
J21
USB20_P11
USB20_N11
Hudson-M2
EHCI CTL
DEV 22, Fn 2
<Disable CTL of M2>
C5
A5
USB_HSD2P
USB_HSD2N
EC_LID_OUT#
For FCH internal debug use

1
R887
1
R889
1
R890
FCH_GPIO188
2
RB751V-40_SOD323-2
2
RB751V-40_SOD323-2
FCH_SCLK1
H_THERMTRIP#
1 @
D45
1 @
D44
Del FCH_GPIO187
SLP_S3#
1
R104
C6
A6
USB_HSD3P
USB_HSD3N
Change GPIO fellow Pumori
USB20_P10
USB20_N10
40
40
F8
E8
USB_HSD4P
USB_HSD4N
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
USB20_P11
USB20_N11
K12
K13
A8
C8
USB_HSD5P
USB_HSD5N
HD AUDIO
HDA_BITCLK_AUDIO
HDA_SDOUT_AUDIO
HDA_SDIN0
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SYNC
HDA_RST#
G12
F12
USB20_P12
USB20_N12
H9
G9
USB_HSD6P
USB_HSD6N
USB 3.0
33
33
33
2 33_0402_5%
2 33_0402_5%
USB20_P12
USB20_N12
C10
A10
USB_HSD7P
USB_HSD7N
USB_SS_RX3P
USB_SS_RX3N
R866 1
R867 1
K10
J12
E10
F10
USB_HSD8P
USB_HSD8N
Q85
@
2N7002K_SOT23-3
Hudson-M2/M3
OHCI CTL
DEV 20, Fn 5
<Disable CTL>
B11
D11
USB_HSD9P
USB_HSD9N
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
2 11.8K_0402_1%
H10
G10
USB_HSD13P
USB_HSD13N
USB_HSD10P
USB_HSD10N
CLK_REQ4#/SATA_IS0#/GPIO64
SMARTVOLT1/SATA_IS2#/GPIO50
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0/GPIO183
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
R863 1
H6
H5
USB_FSD0P/GPIO185
USB_FSD0N
Del FCH_GPIO187 R57 R55
@ U27
2
56
VGA_PWRGD
VGA_PWRGD
0.1U_0402_16V4Z
SMIB
ODD_DA#_1
2
.1U_0402_16V7K
2 0_0402_5%
R955
10K_0402_5%
@
Del SIMB output
11/15 ESD
1
C4717
AG24
AE24
AE26
AF22
AH17
AG18
AF24
AD26
AD25
T7
R7
AG25
AG22
J2
AG26
V8
W8
Y6
V10
AA8
AF25
TEST0
TEST1/TMS
TEST2
USB_RCOMP
H1
H3
+3VS
38
U2
B9
USB_RCOMP
Y
A
Q84
2N7002K_SOT23-3
Del Card det
LAN_CLKREQ#
VGA_PWRGD_R
ODD_DA#
EC_RSMRST#
R954
10K_0402_5%
30
EC_RSMRST#
33 FCH_SPKR
11,12,32,35
FCH_SCLK0
11,12,32,35
FCH_SDATA0
39 FCH_SCLK1
39 FCH_SDATA1
32 MINI1_CLKREQ#
+3VS
AG19
R9
C26
T5
U4
SYS_RESET#
K1
FCH_PCIE_WAKE#
V7
R10
H_THERMTRIP#
AF19
WD_PWRGD
Del MINI2_CLKREQ#
FCH GEVENT (S5 domain)

with isolation circuit to avoid leakage
AE22
EC_KBRST#
EC_SCI#
EC_SMI#
EC_KBRST#
EC_SCI#
EC_SMI#
H_THERMTRIP#
37
SM bus 0-->S0 PWR domain

SM bus 1-->S5 PWR domain
T9
T10
V9
EC_GA20
EC_GA20
FCH_PCIE_WAKE#
8
TEST0
TEST1
TEST2
G8
USBCLK/14M_25M_48M_OSC
USB_FSD1P/GPIO186
USB_FSD1N
ACPI / WAKE UP EVENTS
37
SLP_S3#
SLP_S5#
PBTN_OUT#
FCH_PWRGD
PCIE_RST2#/PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
USB 2.0
37
37
37 SLP_S3#
37 SLP_S5#
PBTN_OUT#
FCH_PWRGD
EC_LID_OUT#
GPIO
EC_LID_OUT#
USB OC
37
AB6
R2
W7
T3
W2
J4
N7
T59
Del FCH_PCIE_RST#
USB MISC
HUDSON-2
FCH_PCIE_RST# IS FOR PCIE

DEVICES ON Hudson-M2/M3
1
R830
2
0_0402_5%
1
R831
2
@ 100K_0402_5%
VGA_PWRGD_R
1
R884
1
R885
1
R886
1
R888
1
R891
1
R893
2
C4718
2
C4719
@
@
@
@
@
2
2.2K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
1
22P_0402_50V8J
1
22P_0402_50V8J
NC7SZ08P5X_NL_SC70-5
EC_RSMRST#
HDA_BITCLK
1
R832
HDA_SDIN0
HDA_SDIN1
2
0_0402_5%
Project SKU ID
GPIO189 (use VGA)
HDA_SDIN2
GPIO190 (use PX)
HDA_SDIN3
GPIO188
L(NO)
R44
L(NO)
R46
TBD
H(YES)
R43
H(YES)
R45
TBD
DIS is High
DIS is High
HDA_SDOUT
HDA_BITCLK
GPIO187
(Reserved)
Issued Date
Compal Secret Data
11/15 RF
2011/07/08
Deciphered Date
2015/07/08
Title
Hudson-M2/M3-ACPI/USB/EC
Size
C
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

E
27
of
56
Change to SPI
STRAP PINS
1
PULL
HIGH
PCI_CLK1
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
ALLOW
PCIE GEN2
USE
DEBUG
STRAPS
NON_FUSION
CLOCK MODE
EC
ENABLED
CLKGEN
ENABLED
LPC ROM
DEFAULT
DEFAULT
PULL
LOW
DEFAULT
FORCE
PCIE GEN1
IGNORE
DEBUG
STRAP
FUSION
CLOCK
MODE
EC
DISABLED
DEFAULT
DEFAULT
DEFAULT
RTC_CLK
1
S5 PLUS
MODE
DISABLED
DEFAULT
SPI ROM
CLKGEN
DISABLE
S5 PLUS
MODE
ENABLED
+3VS
L47
1
2
FBMA-L11-201209-221LMA30T_0805
30mil
220 ohm
+FCH_VDDAN_33_DAC_R
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
1
2
1
2
1
2
1
2
1
2
1
2
C1210
C1209
Remove VGA_PD
@
2
LPC_CLK0_EC
25
LPC_CLK1
27
EC_PWM2
+1.1VS
1
2
1
2
1
2
1
2
1
2
1
R912
R922 2.2K_0402_5%
R921 2.2K_0402_5%
R920 10K_0402_5%
R919 10K_0402_5%
R918 10K_0402_5%
R917 10K_0402_5%
R915 10K_0402_5%
RTC_CLK
25,37
R911 10K_0402_5%
25,32,37
+3VALW
R910 10K_0402_5%
PCI_CLK4
+3VALW
R909 10K_0402_5%
25
+3VALW
R908 10K_0402_5%
PCI_CLK3
+3VALW
R907 10K_0402_5%
25
+3VS
R906 10K_0402_5%
PCI_CLK1
10K_0402_5%
25
+3VS
R905
+3VS
2
0_0402_5%
+FCH_VDDAN_11_MLDAC
30mil
DEBUG STRAPS
Remove VGA_PD
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

3
DEFAULT
PCI_AD24
25
PCI_AD23
DEFAULT
DEFAULT
USE EEPROM
PCIE STRAPS
ENABLE PCI
MEM BOOT
R930 2.2K_0402_5%
DISABLE PCI
MEM BOOT
R929 2.2K_0402_5%
R928 2.2K_0402_5%
R927 2.2K_0402_5%
R926 2.2K_0402_5%
USE DEFAULT
PCIE STRAPS
PCI_AD25
25
PCI_AD23
PCI_AD26
25
PCI_AD27
25
25
Inverted REFCLK termination
BYPASS
PCI PLL
PULL
LOW
DEFAULT
PCI_AD24
Normal REFCLK termination
USE PCI
PLL
No
external R
PCI_AD25
PCI_AD27
2011/07/08
Issued Date
Compal Secret Data
2015/07/08
Deciphered Date
Title
Hudson-M2/M3-STRAP
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
E
28
of
56
+VCC_FCH_R
U25C
PCI/GPIO I/O
CORE S0
CLKGEN I/O
PCI EXPRESS
SERIAL ATA
MAIN LINK
GBE LAN
C1247
22U_0805_6.3V6M
C1246
.1U_0402_16V7K
3.3V_S5 I/O
C1237
2.2U_0603_6.3V4Z
C1236
59mA
+VDDIO_33_S
+1.1VS
1
R25
2
0_0603_5%
1
R938
2
0_0805_5%
1
R941
2
0_0805_5%
+1.1VS
2
0_0402_5%
R26
+3VALW
10mils
G24
5mA
+VDDXL_3.3V
L28
1
2
MBK1608221YZF_2P
Del L30
C1265
K25
@
H25
Q13
1 AO3416L_SOT23-3
VSSAN_HWM
VSSXL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSPL_DAC
VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
VSSPL_SYS
EFUSE
10mils
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
VDDPL_11_SYS_S
J24
L29
70mA
+VDDPL_1.1V
C1272
1
2
MBK1608221YZF_2P
.1U_0402_16V7K
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
C1271
T13
N8
37,42,49
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.1VALW
2.2U_0603_6.3V4Z
.1U_0402_16V7K
C1270
C1269
.1U_0402_16V7K
C1268
220 ohm
10mils
T12
+VDDCR_1.1V_USB
2.2U_0603_6.3V4Z
1
2
MBK1608221YZF_2P
2
0_0603_5%
SYSON
1
R1145
1U_0402_6.3V6K
C1264
VDDCR_11_S_1
VDDCR_11_S_2
187mA
+VDDCR_1.1V
USB
+1.1VALW
10mils
N20
M20
1U_0402_6.3V6K
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
C1261
2.2U_0603_6.3V4Z
C1260
.1U_0402_16V7K
VDDXL_33_S
197mA
HUDSON-2
A3
A33
B7
B13
D9
D13
E5
E12
E16
E29
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
+3VALW
N18
L19
M18
V12
V13
Y12
Y13
W11
+1.1VALW
L59
U25E
+1.1VS
C1252
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
2.2U_0603_6.3V4Z
VDDIO_GBE_S_1
VDDIO_GBE_S_2
1337mA+AVDD_SATA
+AVDD_SATA
10mils
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
22U_0805_6.3V6M
C1230
2.2U_0603_6.3V4Z
1088mA
.1U_0402_16V7K
VDDIO_33_GBE_S
C1219
C1217
C1226
.1U_0402_16V7K
VDDAN_11_ML_1
VDDAN_11_ML_2
VDDAN_11_ML_3
VDDAN_11_ML_4
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10
2.2U_0603_6.3V4Z
C1216
.1U_0402_16V7K
C1245
.1U_0402_16V7K
C1251
C1263
U13
.1U_0402_16V7K
10mils
U12
60mils
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
C1244
1U_0402_6.3V6K
C1257
.1U_0402_16V7K
C1256
10U_0603_6.3V6M
10U_0603_6.3V6M
H8
J8
K8
K9
M9
M10
N9
N10
M12
N12
M11
.1U_0402_16V7K
C1267
.1U_0402_16V7K
C1266
2.2U_0603_6.3V4Z
C1262
220 ohm
30mils
G7
+VDDAN_11_USB_S
2.2U_0603_6.3V4Z
+3VS
140mA
1
2
MBK1608221YZF_2P
220 ohm
AA9
AA10
+1.1VALW
L57
L22
1
2
+VDDPL_33_SATA
MBK1608221YZF_2P
C1255
C1254
1U_0402_6.3V6K
C1259
.1U_0402_16V7K
C1258
2.2U_0603_6.3V4Z
C1253
L15
2
0_0402_5%
+VDDAN_33_USB
1U_0402_6.3V6K
220 ohm/3A
220 ohm
V23
V24
V25
AB10
1
R945
L54
658mA
1
2
FBMA-L11-201209-221LMA30T_0805
+3VS
1
2
+VDDPL_33_PCIE
MBK1608221YZF_2P
AB11
AA11
+3VALW
VDDPL_11_DAC
C1250
LDO_CAP
2
0_0805_5%
+PCIE_VDDR_FCH
.1U_0402_16V7K
C1249
.1U_0402_16V7K
C1248
2.2U_0603_6.3V4Z
L7
1
2 +FCH_VDDPL_33_USB_S
MBK1608221YZF_2P
+PCIE_VDDR_FCH
C1243
VDDPL_33_SATA
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
1U_0402_6.3V6K
20mils
Y22
.1U_0402_16V7K
2
0_0603_5%
+VDDAN_33_USB
220 ohm
VDDPL_33_PCIE
+VDDAN_11_ML
C1242
.1U_0402_16V7K
1
R1148
+VDDPL_11_DAC
C1235
226mA
220 ohm/2A
10mils
V21
2
0_0402_5%
.1U_0402_16V7K
C1241
4.7U_0603_6.3V6K
7mA
R24
C1234
L24
1
2
MBK1608221YZF_2P
C1240
M3 only
C1239
.1U_0402_16V7K
C1238
220 ohm
2.2U_0603_6.3V4Z
1
2 +FCH_VDDPL_33_SSUSB_S
MBK1608221YZF_2P
M31
1U_0402_6.3V6K
L6
2
2.2U_0603_6.3V4Z
340mA
50mils
VDDPL_33_USB_S
@
1
C1232
VDDPL_33_SSUSB_S
C1233
10mils
AG28
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
+1.1VS_CKVDD
1U_0402_6.3V6K
93mA
H26
J25
K24
L22
M22
N21
N22
P22
C1225
10mils
AH29
+VDDPL_33_PCIE
VDDAN_33_DAC
.1U_0402_16V7K
43mA
+FCH_VDDPL_33_USB_S
VDDPL_33_ML
C1215
10mils D7
VDDPL_33_DAC
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
1
R937
+1.1VS_CKVDD
20mils
VDDPL_33_SYS
.1U_0402_16V7K
17mA
C1224
10mils
L18
+FCH_VDDPL_33_SSUSB_S
1U_0402_6.3V6K
20mA
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA

supply for the RGB outputs
For A11: Cap = 1nF
For A12, Cap = DNI
+FCH_VDDAN_11_MLDAC
+3VALW
M3 only
VDDPL_33_SSUSB_S
For Hudson3 USB3.0 only
For Hudson2, connect to GND
T14
T17
T20
U16
U18
V14
V17
V20
Y17
C1214
2
V22
+VDDPL_33_DAC
0_0402_5%
10milsU22
2
+VDDPL_33_ML
0_0402_5%
200mA R23
10mils
T22
+FCH_VDDAN_33_DAC_R
1
50mils
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
C1223
10mils
20mA R22
HUDSON-2
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
1U_0402_6.3V6K
.1U_0402_16V7K
220 ohm
.1U_0402_16V7K
C1231
C1227
@ L4
1
2
MBK1608221YZF_2P
C1221
R19
10milsH24
20mA
+FCH_VDDPL_33_MLDAC
2 +FCH_VDDPL_33_MLDAC
0_0603_5%
2.2U_0603_6.3V4Z
+3VS
47mA
+VDDPL_3.3V
+FCH_VDDAN_33_DAC_R
1
.1U_0402_16V7K
C1220
.1U_0402_16V7K
.1U_0402_16V7K
C1229
C1222
2.2U_0603_6.3V4Z
220 ohm
C1228
+VDDPL_3.3V
22U_0805_6.3V6M
C1218
1
2
MBK1608221YZF_2P
AB17
AB18
AE9
AD10
AG7
AC13
AB12
AB13
AB14
AB16
+VDDIO_33_PCIGP
1U_0402_6.3V6K
2
0_0603_5%
R20
L3
C1213
+3VS
+3VS
+1.1VS
1007mA
10mils
1U_0402_6.3V6K
131mA
GROUND
HUDSON-M2_FCBGA656
+1.1VS
Connected to VSS through a dedicated via.
L31
1
2
@
MBK1608221YZF_2P
220 ohm
+3VALW
+FCH_VDD_11_SSUSB_S
C1473
C1281
.1U_0402_16V7K
C1280
.1U_0402_16V7K
C1279
42 ohm/4A
+VDDCR_11_SSUSB
1U_0402_6.3V6K
2
0_0603_5%
VDDCR_11_SSUSB_S_1
VDDCR_11_SSUSB_S_2
VDDCR_11_SSUSB_S_3
VDDCR_11_SSUSB_S_4
12mA
+VDDAN_33_HWM
.1U_0402_16V7K
N17
P17
M17
M8
C1472
30mils
N16
VDDAN_33_HWM_S
2.2U_0603_6.3V4Z
.1U_0402_16V7K
10mils
VDDAN_11_SSUSB_S_1
VDDAN_11_SSUSB_S_2
VDDAN_11_SSUSB_S_3
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S_5
R27
2
0_0402_5%
AMD reply:
VDDAN_33_HWM_S: Please connect
it to +3.3V_S5 directly if HWM is not used.
+3VS
10mils
VDDIO_AZ_S
AA4
1
C1276
1
C1277
HUDSON-M2_FCBGA656
R28
2
2.2U_0603_6.3V4Z
2
.1U_0402_16V7K
2
0_0402_5%
2011/07/08
VDDIO_AZ_S should be tied to

+3.3/1.5V_S5 rail if Wake on Ring
is supported
Compal Secret Data
Issued Date
26mA
+VDDIO_AZ
POWER
424mA
C1278
2
1
1
L61
R1150
FBMA-L11-201209-221LMA30T_0805
10U_0603_6.3V6M
+1.1VALW
M3 @-->SMT
C1275
.1U_0402_16V7K
Del M2 BOM option.
M14
N14
P13
P14
+VDDAN_SSUSB
C1274
40mils
C1273
For FCH M2 - BOM option

VDDAN_11_SSUSB_S / VDDAN_11_SSUSB_S
Connected to VSS.
20mils
P16
282mA
2
0_0603_5%
1U_0402_6.3V6K
1
R1149
USB SS
+FCH_VDD_11_SSUSB_S
2015/07/08
Deciphered Date
Title
Hudson-M2/M3-POWER/GND
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet

E
29
of
56
SATA HDD1 Conn.
JHDD1
1
2
3
4
5
6
7
8
9
10
11
12
100mils
+5VS_HDD1
1
26
26
SATA_STX_DRX_P0
SATA_STX_DRX_N0
26
26
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
C1283 1
C1285 1
2 .01U_0402_16V7K
2 .01U_0402_16V7K
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
C1287 1
C1289 1
2 .01U_0402_16V7K
2 .01U_0402_16V7K
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0
100mils
2
R953
+5VS
1
0_0805_5%
+5VS_HDD1
ACES_50463-0104A-001
10U_0603_6.3V6M
C1292
CONN@
1
2
3
4
5
6
7
8
9
10
GND
GND
0.1U_0402_16V4Z
1
C1293
C1294
C1295
1U_0402_6.3V6K
2
1000P_0402_50V7K
ODD conn
JODD1
S
G
26
26
26
26
R1129
470_0603_5%
SATA_STX_DRX_P1
SATA_STX_DRX_N1
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
27
Q86
SI3456BDV-T1-E3_TSOP6
C1301 1
C1300 1
2 .01U_0402_16V7K
2 .01U_0402_16V7K
C1302 1
C1303 1
2 .01U_0402_16V7K
2 .01U_0402_16V7K
R79
ODD_PLUG#
27
ODD_EN#
1
2
3
4
5
6
7
8
9
10
11
12
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
SATA_DTX_C_SRX_N1
SATA_DTX_C_SRX_P1
2 0_0402_5%
+5VS_ODD
6
5
1
2
1
C812
1U_0402_6.3V6K
2
R789
470K_0402_5%
R21
10K_0402_5%
+5VS_ODD
100mils
+VSB
+5VS
+5VS_ODD
@
R793
0_0805_5%
2
1
+5VS
100mils
R80
ODD_DA#
100mils
2 0_0402_5%
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
13
14
G
3
ODD_PWR
R785
Q91B
1.5M_0402_5%
C811
.1U_0603_25V7K
10U_0805_10V4Z
Q75
2N7002K_SOT23-3
C1304
ACES_85201-1205N
CONN@
S
1
26
ODD_EN
ODD_EN#
Q91A
0.1U_0402_16V4Z
C1305
C1306
C1307
1U_0402_6.3V6K
1000P_0402_50V7K
Screw Hole
1
2
3
4
5
C1408
1000P_0402_50V7K
JFAN1
H14
H_4P6
1
2
3
HOLEA
@
HOLEA
@
H19
H_3P3
HOLEA
H20
H_3P3
HOLEA
FD2
@
FIDUCIAL_C40M80
Issued Date
H18
H_4P0
HOLEA
HOLEA
HOLEA
@
FD4
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Compal Secret Data
GND
GND
ACES_50273-0030N-001
CONN@
H17
H_4P0
HOLEA
H16
H_4P0
HOLEA
FD3
FIDUCIAL_C40M80
2011/07/08
2015/07/08
Deciphered Date
Title
Size
B
11/09 update footprint to VT.
HDD/ODD/FAN/SCREW
Document Number
Rev
0.1
QCL51 LA-8712P
Date:
H13
H_4P6
HOLEA
@
HOLEA
@
HOLEA
@
H15
H_4P6
H11
H_2P8
FD1
40mil
+VCC_FAN1
H10
H_2P8
HOLEA
1
R1066
10K_0402_5%
2
HOLEA
@
C1407
1000P_0402_50V7K
1
2
FAN_SPEED1
H9
H_2P8
HOLEA
@
+3VS
HOLEA
@
H12
H_4P6
C1406
10U_0805_10V4Z
1
2
37
HOLEA
@
H7
H_2P8
@
APL5607KI-TRG_SO8
C1405
0.1U_0402_16V4Z
H8
H_2P8
HOLEA
@
H6
H_2P8
HOLEA
@
H5
H_2P8
2
0_0402_5% 1
1
R1065
8
7
6
5
H4
H_2P8
EN_DFAN1
GND
GND
GND
GND
H3
H_2P8
37
EN
VIN
VOUT
VSET
HOLEA
U35
1
2
3
4
+VCC_FAN1
H2
H_2P8
H1
H_2P8
10U_0805_10V4Z
2
C1404
1
+5VS
FAN

G
Sheet
30
H
of
56
W=60mils
RL3
+3VALW
@
0_1206_5%
1
2
QL1
JREAD1
0.1U_0402_16V7K
0.1U_0402_16V7K
+CR_VDD_3V3
2
1
1.5M_0402_5%
CL9
0.1U_0603_25V7K
SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R
8
9
1
2
SD_WP
SD_CD#
10
11
12
13
CL37
SD_CLK_R
+CR_VDD_3V3
CL38
3
4
5
6
7
SD_CMD_R
CL8
4.7U_0603_6.3V6K
0.1U_0402_10V7K
1
CL7
EN_WOL
QL2
RL5
SSM3K7002FU_SC70-3
1
CL6
Note:
1.The rise time of +LAN_VDD_3V3 must >1ms and <100ms for the internal LDO.
2
G
WOL_EN
1
CL5
0.1U_0402_16V7K
1
CL4
0.1U_0402_16V7K
1
CL3
RL4
470K_0402_5%
37
0.1U_0402_16V7K
0.1U_0402_16V7K
CL2
+VSB
These caps close to U1: Pin 11,12,39,58,63,64
S
G
Modify by Project
1.5A
1
AO3413L_SOT23-3
10U_0603_6.3V6M
CL1
1U_0402_6.3V6K
+LAN_VDD_3V3
W=60mils
CMD
VSS
VDD
CLK
VSS
DAT0
DAT1
DAT2
CD/DAT3
WP SW
CD SW
GND SW
GND SW
GND
GND
T-SOL_156-1000302601_NR
CONN@
CL37, CL38 close to CR socket
14
15
11/22 NPTH

Need to check RL6,RL7,RL8 Option
RL31
100K_0402_5%
PCI-Express
25
25
10,13,21,25,32
Change net name from PLT_RST# to APU_PCIE_RST#
CL11 1
CL12 1
6 PCIE_DTX_C_FRX_P0
6 PCIE_DTX_C_FRX_N0
6 PCIE_FTX_C_DRX_P0
6 PCIE_FTX_C_DRX_N0
27
28
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_LAN
CLK_PCIE_LAN#
APU_PCIE_RST#
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
37
36
LAN_CLKREQ#_R
PCIE_DTX_FRX_P0
PCIE_DTX_FRX_N0
PCIE_FTX_C_DRX_P0
PCIE_FTX_C_DRX_N0
30
31
25
26
TL1 44
TL2 42
C
1
@ RL10
10K_0402_5%
2
LAN_CLKREQ# 2
LAN_CLKREQ#
HSOP
HSON
HSIP
HSIN
EEPROM(TWSI)
SDA
SCL/LED_CR
Transceiver Interface
RL9
27
PERSTB
CLKREQB
GPO Pin
PN : SA00005B400
+LAN_VDD_3V3
Close to Chip
REFCLK_P
REFCLK_N
LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
1
2
4
5
6
7
9
10
XTLI
XTLO
59
60
LAN_CLKREQ#_R
0_0402_5%
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
DVDD33
DVDD33
AVDD33
AVDD33
AVDD33
AVDD33
DVDD10
DVDD10
CKXTAL1
CKXTAL2
Clock
AVDD10
AVDD10
AVDD10
Regulator and Reference
48
45
+LAN_VDDREG
46
47
Card_3V3
2.49K_0402_1%
51
49
43
LAN_LED0
LAN_LED1
1
RL19
2
ISOLATEB
1K_0402_5%
LED0
LED1
LED3
LEDs
SD_WP
Follow QCL50
SD_CD#_R
41
52
QL3A
2N7002KDWH_SOT363-6
+LAN_VDD_1V0
SD_CD#
13
33
53
+VDD33_18
24
32
65
+LAN_VDD_3V3
1
CL23
CL24
Close to Pin29
XTLO
LTW-110DC5-C_WHITE
1
CL25
1
CL26
RJ45_TX3+
RJ45_RX1-
RJ45_TX2-
RJ45_TX2+
RJ45_RX1+
RJ45_TX0-
RJ45_TX0+
CL18,CL19 close to Pin53
CL27
CL28
Check power rail
JLAN1
RJ45_TX3-
+LAN_VDD_1V0
+LAN_VDD_3V3
LEDL1
Close to Chip
2
RL2 1 LINK_100_1000# 1
510_0402_5%
+VDD33_18
0.1U_0402_16V7K
LEDL2
2
1
2
RL1 1 LAN_ACTIVITY#
510_0402_5%
HT-110UD_1204
White
LAN_LED1
VDD33/18 for SD UHS Mode Power
0.1U_0402_16V7K
CL22
1
3
Amber
LAN_LED0
+CR_VDD_3V3
0.1U_0402_16V7K
XTLI
0_0402_5%
YL1
25MHZ_12PF_X5H025000FC1H-H
CL21
1
2
Modify by Project
+LAN_EVDD10
0.1U_0402_16V7K
2 RL21
RL30
100K_0402_5%
3
8
61
1U_0402_6.3V6K
27P_0402_50V8J CL20
1
2
2 470P_0402_50V8J
DL2
PESD5V0U2BT
+LAN_VDD_3V3
+LAN_EVDD10
2 470P_0402_50V8J
CL14 1
RL33
100K_0402_5%
11
58
63
64
29
CL13 1
LAN_ACTIVITY#
50
12
39
0.1U_0402_16V7K
0_0603_5%
LINK_100_1000#
+LAN_VDD_3V3
CL16,CL17 Close to Pin33
0.1U_0402_16V7K
1
B
LAN_ACTIVITY#
CL10 @
5P_0402_50V8C
RL20
15K_0402_5%
+LAN_VDD_1V0
RL25
1
EMI-ESD
LINK_100_1000# 3
RTL8411-CG_QFN64_9X9
+3VS
GND
GND
GND9(Exposed Pad)
CL19
4.7U_0603_6.3V6K
RSET
QL3B
2N7002KDWH_SOT363-6
4.7U_0603_6.3V6K
VDD33/18
VDD33/18
SD_CLK
SD_CMD
SD_WP_R
SD_CD#_R
CL18
0.1U_0402_10V7K
VDDREG
VDDREG
RL32
100K_0402_5%
CL17
62
EVDD10
SD_WP_R
CL16
0.1U_0402_10V7K
REGOUT
ENSWREG_H
SD_D0
SD_D1
SD_D2
SD_D3
CL15
0.1U_0402_10V7K
RL18
1
+LAN_SROUT1.0V
ENSWREG
GPO
19
18
23
22
17
16
15
14
20
21
35
54
34
55
56
57
Card Reader
SD_D0/MS_D7/xD_D5
SD_D1/MS_CLK/xD_D6
SD_D2/xD_D7
SD_D3/MS_D2/xD_D2
SD_D4/xD_WE#
SD_D5/xD_CE#
SD_D6/MS_INS#/xD_RE#
SD_D7/xD_RDY
SD_CLK/MS_D3/xD_D4
SD_CMD/MS_D6/xD_D3
SD_WP/MS_D1/xD_WP#
SD_CD#/MS_D5/xD_ALE
MS_BS/xD_CLE
MS_D4/xD_D0
MS_D0/xD_D1
XD_CD#
ISOLATEB
LANWAKEB
38
40
ISOLATEB
LANWAKEB
@ 2 0_0402_5%
RL8
0_0402_5%
2
SD_D0_R
0_0402_5%
2
SD_D1_R
0_0402_5%
2
SD_D2_R
0_0402_5%
2
SD_D3_R
0_0402_5%
2
SD_CMD_R
0_0402_5%
21
SD_CLK_R
FCH_PCIE_WAKE#
SD_D1
27,32
RL11
1
RL12
1
RL13
1
SD_D2
RL14
1
SD_D3
RL15
SD_CMD 1
RL16
SD_CLK 1
SD_D0
2 0_0402_5%
RL7
UL1
Power Manahement/Isolation
EC_PME#
37
+CR_VDD_3V3
Close to Chip
1
2 10K_0402_5%
@
RL6
+LAN_VDD_3V3
GND
PR4GND
11
PR2PR3PR3+
PR2+
PR1GND
PR1+
GND
Place each cap. close Pin 3, 8 , 41 , 52 ,61
12
PR4+
10
9
SANTA_130460-1
11/15 Update footprint
27P_0402_50V8J
11/16 Update footprint for DB

Switching Regulator Circuit
+LAN_VDD_1V0
W=60mils
1
LAN_MDIN0
+V_DAC
+V_DAC
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
+LAN_VDD_3V3
RL24 2
The trace length from LL1 to Pin 48 (REGOUT) and

from CL29, CL30 to Lx must be within 200 mils.
+LAN_VDDREG
CL31 1
CL35
Close to Pin46,47
1
CL36
0.1U_0402_16V7K
4.7U_0603_6.3V6K
0.01U_0402_16V7K
0_0603_5%
CL39 1
2
+V_DAC
+V_DAC
10
0.1U_0402_16V7K
11/15 EMI
LAN_MDIP3
11
LAN_MDIN3
12
TD1+
TX1+
TD1-
TX1-
TDCT1
TXCT1
TDCT2
TXCT2
TD2+
TX2+
TD2-
TX2-
TD3+
TD3-
TX3+
TX3-
TDCT3
TXCT3
TDCT4
TXCT4
TD4+
TX4+
TD4-
TX4-
24
RJ45_TX0+
23
RJ45_TX0-
22
RL26
RL27
RL28
RL29
21
20
RJ45_RX1+
19
RJ45_RX1-
18
RJ45_TX2+
17
RJ45_TX2-
1
1
1
1
2
2
2
2
75_0402_5%
75_0402_5%
75_0402_5%
75_0402_5%
CL32
SE167100J80
10P_1808_3KV
16
15
14
RJ45_TX3+
13
RJ45_TX3-
DL1
SCA00001L00
@
PESD5V0U2BT
LAN_MDIP0
LL2
CL33
0.1U_0402_16V4Z
CL34
4.7U_0603_6.3V6K
A
CL30
0.1U_0402_16V7K
TS1
CL29
4.7U_0603_6.3V6K
3.3V : Enable Switching Regulator

(Default,For Power Efficiency)
0V
: Enable LDO Regulator
SHI0000AA00
LL1
2
+LAN_SROUT1.0V 1
2.2UH +-5% NLC252018T-2R2J-N
DELTA_1008HC-472EJFS-A_2P
ENSWREG
RL23 0_0402_5%
2
1
@
RL22 0_0402_5%
2
1
+LAN_VDD_3V3
100UH_SSC0301101MCF_0.18A_20%
350UH_NA0069RLF
SP050006Y00
Issued Date
Compal Secret Data
2011/06/29
2011/06/29
Deciphered Date
Title
Size
Date:
LAN&CardReader Realtek RTL8411

Document Number
Rev
0.1
QCL51 LA-8712P
Sheet

1
31
of
56
Mini Card Power Rating

Primary Power (mA)
Power
WLAN
+1.5VS_WLAN
+3V_AOAC
+3V_AOAC
27,31
2 0_0402_5%
RM14 1
2 0_0402_5%
FCH_PCIE_WAKE# RM1
FCH_PCIE_WAKE#
BT_ON
Add
27
1
3
5
7
9
11
13
15
BT_ON_L
MINI1_CLKREQ#
25 CLK_PCIE_MINI1#
25 CLK_PCIE_MINI1
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
APU_PCIE_RST#
25,28,37
LPC_CLK0_EC
6
6
PCIE_DTX_C_FRX_N1
PCIE_DTX_C_FRX_P1
6
6
PCIE_FTX_C_DRX_N1
PCIE_FTX_C_DRX_P1
E51TXD_P80DATA
E51RXD_P80CLK
0_0402_5%
RM7
37
37
RM6
0_0402_5%
2 E51TXD_P80DATA2_R
E51TXD_P80DATA 1
1
2 E51RXD_P80CLK_R
CONN@
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G2
2
4
6
8
10
12
14
16
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
RM3
MINI1_SMBCLK
MINI1_SMBDAT
1
1
RM4
RM5
1000
750
+3V
330
250
250 (wake enable)
+1.5VS
500
375
5 (Not wake enable)
Normal
LPC_FRAME# 25,37
LPC_AD3 25,37
LPC_AD2 25,37
LPC_AD1 25,37
LPC_AD0 25,37
RM2
+3VS
2 0_0402_5%
1
2 0_0603_5%
@
@
2 0_0402_5%
2 0_0402_5%
WL_OFF#
APU_PCIE_RST#
WL_OFF# 26
APU_PCIE_RST#
10,13,21,25,31
+3V_AOAC
FCH_SCLK0
FCH_SDATA0
USB20_N8
USB20_P8
FCH_SCLK0 11,12,27,35
FCH_SDATA0 11,12,27,35
USB20_N8
USB20_P8
MINI1_LED#
MINI1_LED#
27
27
2
Control by EC
37
JMINI1
Normal
RM8
4.7K_0402_5%
(9~16mA)
BELLW_80003-2021
Auxiliary Power (mA)
Peak
RM9
+3V_AOAC
2
100K_0402_5%
RM10
1K_0402_5%
1 E51RXD_P80CLK_R
BT_ON 2
D
26
BT_ON#
QM1
2N7002K_SOT23-3
Del AOAC
S
3
+3VS
+3V_AOAC
+1.5V_PCIE
RM12
0_1206_5%
2
1
60mil
1
CM2
+1.5VS_WLAN
RM13 0_0603_5%
1
2
1
CM3
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
2
2
CM4
4.7U_0603_6.3V6K
CM5
0.1U_0402_16V4Z
CM6
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
MINI1 CARD (WLAN) / MINI2 CARD (Option)
Size
B
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
32
of
56
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
RA2 0805-->0603
+VDDA_CODEC
42
RA17
10K_0402_5%
49
HDA_RST_AUDIO#
CA96
AVSS1
AVSS2
AVSS3
PAD
26
30
33
CA14
3
D
QA1
2N7002K_SOT23-3
G
S
10K_0402_5%
RA18
C209,C210,CA87,CA89 close to Codec (UA5)

Del AOAC
SPKR+
SPKRSPKL+
SPKL-
CA97
2
2 0.1U_0402_25V6
RA53 1
6
1
CA92 @1
FCH_SPKR
2 0_0805_5%
2N7002KDW_SOT363-6
2 0.1U_0402_25V6
FCH_SPKR
+5VS
UA2
W=40Mil
RA54
10K_0402_5%
CA99
0.01U_0402_16V7K
2
RA16
VOUT
BYPASS
CA104
680P_0402_50V7K
GND
TPS793475DBVR
CA100
0.1U_0402_25V6
11/15 EMI
EN
10K_0402_5%
VIN
1
2
2
CA19
10U_0805_10V6K
3.3_0402_5%
CA93 @1
27
100K_0402_5%
3.3_0402_5%
2 0.1U_0402_25V6
MONO_IN
3.3_0402_5%
CA98 @1
3.3_0402_5%
2 0.1U_0402_25V6
+VDDA_CODEC
QA2A
2 0.1U_0402_25V6
CA101 @1
RA56
2200P_0402_50V7K
BEEP#
Close to Audio Codec (UA5)
2200P_0402_50V7K
BEEP#
0.1U_0402_25V6
CA102 @1
2200P_0402_50V7K
37
2N7002KDW_SOT363-6
11/15 modified
MUTE_LED_L
RA55
10K_0402_5%
Need confirmed.
CA103
680P_0402_50V7K
11/15 EMI
GND
+AVDD_CODEC
CA18
0.1U_0402_25V6
HP_JD
R368
270_0402_1%
EAPD_L
36
21
22
34
37
CA13
PVSS
QA2B
38
34
1
MONO_IN
0.1U_0402_25V6
SUB_OUT
MONO_INR
DVSS
1
CA17
0.01U_0402_16V7K
MUTE_LED
25
HP_JD_R
RA57
10K_0402_5%
SPK
36
36
2200P_0402_50V7K
SPKR+
SPKR-
SPKL+ 36
SPKL- 36
92HD91B2X5NLGXYAX8_QFN48_7X7
RA14
4.7K_0402_5%
CAP-
SPKR+
SPKR-
CA47
SPKL+
SPKL-
+AVDD_CODEC
Place C208 close to Codec
40
41
44
43
RA43
35
17
18
15
16
CA46
+3VS_DVDD
VREFFILT
CAP2
VVREG(+2.5V)
+MIC1_VREFO_L
19
20
24
12
PLACE CLOSE TO UA5 PIN 14
Headphone
+3VS_DVDD
PCBEEP
35
35
RA42
2
CA12
2.2U_0603_16V6K
CAP+
Combo jack
HP_OUT_L
HP_OUT_R
CA45
MONO_OUT
36
+MIC1_VREFO_L
External MIC
SPDIFOUT0/GPIO3
DMIC1/GPIO0/SPDIFOUT1
36
SPK_PORTD_+R
SPK_PORTD_-R
MIC1_R
SPK_PORTD_+L
SPK_PORTD_-L
DMIC_CLK/GPIO1
DMIC0/GPIO2
2 1U_0603_25V6
+MIC1_VREFO_L
+AVDD_CODEC
If Sense_B is un-used, then pull high

Sense_B to AVDD by 10Kohm resistor
RA41
EAPD
2 10K_0402_1%
D_MIC_DATA
PORTF_L
PORTF_R
HP_OUT_L
HP_OUT_R
2 1000P_0402_50V7K
PORTE_L
PORTE_R
31
32
CA11
HDA_RST#
CA52 1
RA10
2 1000P_0402_50V7K
CA44
PORTC_L
PORTC_R
VREFOUT_C/GPIO4
HDA_SDI
MIC1_L
SENSE_B
SENSE_A
SENSE_B
RA37
11
2
EAPD_L
DH6
CH751H-40PT_SOD323-2
1
2
47
DH7
RA13
LA19
FBMA-L10-160808-301LMT_2P
1D_MIC_CLK_L 1
2
2
D_MIC_CLK_L_C
1
2
4
D_MIC_DATA_C
LA20
FBMA-L10-160808-301LMT_2P
48
46
MUTE_LED_L
HDA_SYNC
100_0402_5%
11/16 vendor review D_MIC_CLK
2
22 D_MIC_CLK
22 D_MIC_DATA
28
29
23
CA1
EAPD_A
SDIN_CODEC
SENSE_A
CA20
0.1U_0402_25V6
34
1
RA11
HP1_PORTB_L
HP1_PORTB_R
HDA_SDO
13
14
2
HDA_SDIN0
33_0402_5%
HDA_RST_AUDIO#
HDA_BITCLK
EAPD
10
HDA_SYNC_AUDIO
HDA_RST_AUDIO#
SENSE_A
SENSE_B
HP0_PORTA_L
HP0_PORTA_R
VREFOUT_A
45
39
+AVDD_CODEC
HP_JD_R
37
DVDD
2 20K_0402_1%
HDA_SDOUT_AUDIO
27
PVDD1
PVDD2
HDA_BITCLK_AUDIO
HDA_SDOUT_AUDIO
DVDD_IO
27
38
2 2.49K_0402_1%
HDA_BITCLK_AUDIO
27
HDA_SDIN0
AVDD1
AVDD2
33P_0402_50V8J
27
27
DVDD_CORE
PVDD
RA7
If Sense_A total length is greater than

6 inches, chagne C12 to 0.1uF
1U_0402_6.3V6K
CA53
RA9
CA8,CA10 near UA5 PIN45

CA9,CA21 near UA5 PIN39
CA21
10U_0603_6.3V6M
UA5
CA10
10U_0603_6.3V6M
CA5
10U_0603_6.3V
CA16
10U_0603_6.3V6M
11/15 EMI near UA5
HDA_SYNC_AUDIO
L
CA9
0.1U_0402_25V6
27
2
1
0_0805_5%
RA6
C4720
1
0_0805_5%
CA8
0.1U_0402_25V6
2.2U_0603_16V6K
RA5
1U_0402_6.3V6K
CA15
CA2
+AVDD_CODEC
CA7
1U_0402_6.3V6K
CA4
0.1U_0402_25V6
CA3
1U_0402_6.3V6K
0.1U_0402_25V6
1 0_0805_5%
+3VS_DVDD
+3VS
RA3
BLM18BD601SN1D_0603
1
2
0_0603_5%
2.2U_0603_16V6K
+5VS
RA1
Place AVDD ,PVDD,and DVDD cap close to Codec (UA5)
CA6
0.1U_0402_25V6
RA2
PLACE CLOSE TO UA5 PIN 13
DVDD_IO
+3VS
GNDA
RA53 need under or near UA5
Issued Date
Compal Secret Data
2011/06/29
Deciphered Date
2011/06/29
5
Title
Audio IDT 92HD91

Custom
Date:
Rev
0.1
LA-8551P

1
Sheet
33
of
56
+5V_SUBAMP
+5VS
RA12
BLM18BD601SN1D_0603
1
2
UA3
2
RA139
A1
1
47K_0402_5%
IN+
CA27 1
0.033U_0603_16V7
2
RA138
C1
1
47K_0402_5%
IN-
B1
33
C2
EAPD_A
OUT-
C3
LA1
2 FBM-11-160808-601-T_0603
A3
LA2
2 FBM-11-160808-601-T_0603
2011.10.28
40
SUBWOOFER-
40
PVDD
PGND
B3
VDD
EN
GND
A2
TPA2011D1YFFR_DSBGA9
SUBWOOFER+
B2
OUT+
CA30
680P_0603_50V7K
SUB_OUT
33
CA29 1
0.033U_0603_16V7
CA31
680P_0603_50V7K
Change Sub-woofer Amp to TPA2011D1
Issued Date
Compal Secret Data
2011/06/29
Deciphered Date
2011/06/29
Title
Size
B
Date:
Audio Woofer Amplifier

Document Number
Rev
0.1
LA-8551P
Sheet
1
34
of
56
Headphone amplifier
HP_5V
10K_0402_1%
HP_5V
33
HP_OUT_L
2
CA65
1U_0402_6.3V6K
2
0_0603_5%
1
2
2
0_0603_5%
5
4
6
7
PCH_SMB_DA1_AMP
CA66
1U_0402_6.3V6K
8
20
PCH_SMB_CK1_AMP
18
1
CA90
2
+3VS
1U_0402_6.3V6K
0.1U_0402_25V6
21
RIGHTINM
RIGHTINP
LEFTINM
LEFTINP
VDD_12
SCL
VDD_20
CPP
11
14
1
1
HP_R_1
HP_L_1
RA39
GND_3
GND_9
GND_10
GND_13
GND_19
SD#
SDA
12
RA40
HPRIGHT
HPLEFT
CPVSS_15
CPVSS_16
CPN
3
9
10
13
19
30_0603_1%
2
2
HP_R
HP_L
36
36
30_0603_1%
#DB 0930 need apply 30_0603 ohm P/N
15
16
17
GND
HPA00929
1
CA80
2
CA79
1
1U_0402_6.3V6K
2
CA95
1U_0402_6.3V6K
2
1
LA12
CA94
HP_OUT_L
CA64
1
FBM-11-160808-601-T_0603
Add net name
0.1U_0402_25V6
HP_OUT_R
UA6
CA54
1U_0402_6.3V6K
HP_OUT_R
1U_0402_6.3V6K
2
1
LA18
LA14
2.2U_0402_6.3V6M
33
CA57
1
+5VS
RA38
HP_5V
RH280
2.2K_0402_5%
2N7002DWH_SOT363-6
RH311
2.2K_0402_5%
11,12,27,32
FCH_SCLK0
PCH_SMB_CK1_AMP
QH5A
EC or FCH
11,12,27,32
FCH_SDATA0
PCH_SMB_DA1_AMP
2N7002DWH_SOT363-6
QH5B
DM6 connect EC_SMB2
Issued Date
Compal Secret Data
2011/06/29
Deciphered Date
2011/06/29
Title
Audio SPK/HP Amplifier

Size
Document Number
Custom
Date:
Rev
0.1
LA-8551P
Sheet
1
35
of
56
SPK conn
JSPKR1
33
33
SPKR+
SPKR-
1
2
SPKR+
SPKR-
1
2
3
4
GND1
GND2
ACES_50281-0020N-001
CONN@
JSPKL1
1
2
SPKL+
SPKL-
SPKL+
SPKL-
33
33
3
4
@ DA1
DA2 @
PJDLC05_SOT23-3
1
2
GND1
GND2
ACES_50281-0020N-001
CONN@
PJDLC05_SOT23-3
SCA00001A00
SCA00001A00
1
3
EXT_MIC_L2
BK1608HS601-T_2P
AZ5125-02S.R7G_SOT23-3
LA3
MIC1_R
2.2K_0402_5%
33
DA4
1
RA35
+MIC1_VREFO_L
AZ5125-02S.R7G_SOT23-3
11/15 ESD
DA5
6
1
2
EXT_MIC_L2
HPL
1
CA59
220P_0402_50V7K
33
HP_JD
HPR
HP_JD
2
0_0402_5%
R3
HP_JD_1
JA1
3
4
G
7
8
3
SUYIN_010188HR006G269ZL
DA3
CONN@
AGND
3
PJDLC05C_SOT23-3
35
HP_R
35
HP_L
HP_R
LA5
2 BLM15AG121SN1D_L0402_2P
HP_L
LA4
2 BLM15AG121SN1D_L0402_2P
HPR
HPL
AGND
CA55
CA56
0.01U_0402_16V7K 0.01U_0402_16V7K
2
Issued Date
Compal Secret Data
2009/04/07
2012/10/21
Deciphered Date
Title
Audio SPK Conn/Jack/MIC
Custom
Date:
Rev
0.1
QCL51 LA-8712P
Sheet
E
36
of
56
Analog Project ID definition
+3VALW
Analog Board ID definition
+3VALW
+3VALW
R1025
+3VALW
25
1
47K_0402_5%
1
0.1U_0402_16V4Z
PLT_RST#
27
KSO[0..17]
EC_SCI#
KSO[0..17]
KSI[0..7]
KSI[0..7]
38
R714
10K_0402_5%
For PCI SERR

D14
1
2 GPIO0
GPIO0
25
11/15 add for HW shut down
38,45,47
38,45,47
14,21,8
14,21,8
1
2
3
4
5
7
8
10
LPC_CLK0_EC
PLT_RST#
EC_RST#
EC_SCI#
NMI_DBG#
12
13
37
20
38
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
38
+3VALW
NMI_DBG#
EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
77
78
79
80
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
AD
27 SLP_S3#
27 SLP_S5#
27 EC_SMI#
Del INT_VGAPWR_ON
32
MINI1_LED#
MINI1_LED#
EC_INVT_PW M
FAN_SPEED1
EC_PME#
E51TXD_P80DATA
E51RXD_P80CLK
22 EC_INVT_PW M
30 FAN_SPEED1
31 EC_PME#
32 E51TXD_P80DATA
32 E51RXD_P80CLK
Del GPIO18
38
38
Del PWR_SUSP_LED#
W LAN_OFF_LED#
W LAN_ON_LED#
W LAN_OFF_LED#
W LAN_ON_LED#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
11/09
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
PS2 Interface
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
SPI Flash ROM
GPIO
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
GPI
KB932QF-A0_LQFP128_14X14
Part Number = SA000055I00
21
23
26
27
AC_LED#
BEEP#
63
64
65
66
75
76
BATT_TEMP
68
70
71
72
83
84
85
86
87
88
C1356
0.1U_0402_16V4Z
New AC_LED#
AC_LED# 44
BEEP# 33
ACOFF
T28
Test point
ADP_I
AD_BID0
AD_PID0
ADP_ID
ADP_I
ADP_ID
2
DH8
EN_DFAN1
KBL_OFF#
TP_ON_OFF
USB_ON#
2 C1284
ECAGND
New-Check PH or not!!
BATT_TEMP 45
2
USB_ON#
10K_0402_5%
45,47
44
New
@1
C1361
@1
C1362
New: del EC_MUTE#

TP_ON_OFF 39
USB_ON# 41
2
EC_SMB_CK1
10P_0402_50V8J
2
EC_SMB_DA1
10P_0402_50V8J
New
2
2.2K_0402_5%
2
2.2K_0402_5%
KSO2
119
120
126
128
EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK_L
EC_SPICS#/FSEL#
73
74
89
90
91
92
93
95
121
127
ENBKL
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
110
112
114
115
116
117
118
ACIN
EC_ON
ON/OFF
LID_SW #
SUSP#
VGATE 54
W OL_EN 31
VLDT_EN 42,51
New WOL_EN
Del 9012_PH1
EC_SI_SPI_SO
EC_SO_SPI_SI
EC_PME#
ENBKL
38
38
EC_SPICS#/FSEL#
EC_SMB_CK2
38
ENBKL
10,21
Del FSTCHG
BAT_CHG_LED
CAP_LOCK#
BAT_CHG_LED 44 Change name

Add CAP_LOCK#
CAP_LOCK# 38
PW R_LED#
SYSON
VR_ON
PW R_LED# 38,40
SYSON 29,42,49
VR_ON 54
EC_THERM#
1
GPXO07
R64
BKOFF#
0_0402_5%
PBTN_OUT#
USB_CHARGE_EN
EC_RSMRST#
EC_LID_OUT#
1
R1027
1
R1028
2
47K_0402_5%
2
47K_0402_5%
1
100K_0402_5%
2
10K_0402_5%
1
100K_0402_5%
KSO1
EAPD 33
TP_CLK 39
TP_DATA 39
VGATE
W OL_EN
VLDT_EN
+5VALW
Contact to +3VALW
+3VALW
EN_DFAN1 30
KBL_OFF# 39
EAPD
TP_CLK
TP_DATA
1
R1038
11/16 add for PWR
1
97
98
99
109
@
@
2
4.7K_0402_5%
2
4.7K_0402_5%
TP_CLK
TP_DATA
1
R1018
1
R1019
ACIN 14,42,47
EC_ON 38,46
ON/OFF 38
LID_SW # 38
SUSP# 42,49,52
+3VALW
+3VS
+3VALW
+3VALW
Support Wake up
B
2
100K_0402_5%
VR_ON
27
27
1
R1020
1
R1021
1
R1022
1
R1023
PWR_LED->PWR_LED#
EC_THERM# 25,45,54,8
FCH_PW RGD 27
Delay SUSP#
BKOFF# 21
PBTN_OUT# 27
USB_CHARGE_EN
40
+3VALW
1
R1029
1
R1030
2
R1031
1
R1032
2
R1034
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
1
R1012
Del 9012_PH2
10ms
BATT_TEMP
New
ACIN
Del VGA_ON
2
100P_0402_50V8J
2
100P_0402_50V8J
1
C1366
1
C1363
Reserve for EMI, close to EC

EC_SPICLK
Del AOAC_PW_ON#
EC_SPICLK_L 1
R1033
10_0402_5%
38
2
1
2
C1357
10P_0402_50V8J
124
AGND
V18R
@ C1358
22P_0402_50V8J
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
XCLK1
XCLK0
GND
GND
GND
GND
GND
122
123
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
69
R1037
100K_0402_5%
EC_CRY1
2 EC_CRY2
0_0402_5%
8.2K_0402_5%
EC_SMB_DA2
11
24
35
94
113
1
R1036
RTC_CLK
25,28
Rb
SPI Device Interface
T27
R02 modify Remove X2 20110915
AD_BID0
R1026
LID_SW #
SLP_S3#
SLP_S5#
EC_SMI#
33K_0402_5%
.01U_0402_16V7K 1
PWM Output
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
C1364
@
0.1U_0402_16V4Z
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
27 EC_GA20
27 EC_KBRST#
25 SERIRQ
25,32 LPC_FRAME#
25,32 LPC_AD3
25,32 LPC_AD2
25,32 LPC_AD1
25,32 LPC_AD0
LPC_CLK0_EC
2
R1011
2
C1353
67
9
22
33
96
111
125
U31
Rb
100K_0402_5%
ECAGND
AD_PID0
R1035
11/15 EMI
25,28,32
100K_0402_5%
C1352
R1014
22P_0402_50V8J 22_0402_5%
2
1
2
1
R1024
Ra
Ra
C1351
0.1U_0402_16V4Z
1
1
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
680P_0402_50V7K
C4721
1
2
+EC_VCCA
BLM18AG601SN1D_2P
C1345 C1346 C1347 C1348 C1349 C1350

1
1
1
1
2
2
L65
C1359
4.7U_0603_6.3V6K
20mil
A
ECAGND 2
1
L66
BLM18AG601SN1D_2P
Compal Secret Data
2011/07/08
Issued Date
Deciphered Date
2015/07/08
5
Title
EC ENE KB930/9012
Size
B
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
1
37
of
56
EC BIOS ROM
+3VALW
2
Power Button
R1040
100K_0402_5%
+3VALW
1
R1049
2
0_0603_5%
C1370 1
2 0.1U_0402_16V4Z
D26
2
ON/OFF
ON/OFFBTN#
51ON#
+SPI_VCC
37
37
BAV70W_SOT323-3
EC_SPICS#/FSEL#
2 4.7K_0402_5%
R1050 1
2 4.7K_0402_5%
R1052 1
EC_SPICS#/FSEL#
+3VALW
1
EC_SPI_WP# 3
EC_SPI_HOLD#7
4
@
C1365
1000P_0402_50V7K
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
8
6
5
2
EC_SPICLK_R
EC_SO_SPI_SI_R
EC_SI_SPI_SO_R
1
10_0402_5%
R1051 1
R1053 1
R1054 1
C1374
2
22P_0402_50V8J
1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
EC_SPICLK 37
EC_SO_SPI_SI 37
EC_SI_SPI_SO 37
MX25L1005AMC-12G_SO8
2
R1055
U42
44
D
37,46
KB conn
EC_ON
EC_ON
Q44
2N7002K_SOT23-3
37
KSI[0..7]
R1043
10K_0402_5%
37
KSO[0..17]
37
+3VALW +5VALW
JPWR1
1
2
3
4
5
6
37 LID_SW#
37,40 PWR_LED#
1
2
3
4
5 G1
6 G2
JKB1
7
8
ACES_51524-0060N-001
CONN@
+3VS
33
MUTE_LED
WLAN_AMBER
WLAN_WHIT
KSO17
KSO16
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

ACCELEROMETER
+3VALW
U60
EC or FCH?
+3VALW
4
6
7
8
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_DA1
1
10K_0402_5%
R166
2
3
R167
0_0402_5%
Vdd_IO
INT2
INT1
VDD
SCL/SPC
SDA/SDI/SDO
SDO/SA0
CS
GND
GND
RES
RES
RES
RES
NC
NC
+3VALW
9
11
14
ACCEL_INT#
5
12
10
13
15
16
C218
0.1U_0402_16V7K
27
1
C219
10U_0603_6.3V6M
C1380 1
100P_0402_50V8J
C1383 1
100P_0402_50V8J
KSO13
C1384 1
100P_0402_50V8J
KSO12
C1386 1
100P_0402_50V8J
KSI0
C1388 1
100P_0402_50V8J
KSO11
C1390 1
100P_0402_50V8J
KSO10
C1392 1
100P_0402_50V8J
KSO16 C1378 1
100P_0402_50V8J
KSI1
C1394 1
100P_0402_50V8J
KSO17 C1379 1
100P_0402_50V8J
KSO7
C1381 1
100P_0402_50V8J
C1396 1
2 100P_0402_50V8J
KSO6
C1382 1
100P_0402_50V8J
KSO5
C1385 1
100P_0402_50V8J
KSO4
C1387 1
100P_0402_50V8J
1
2
ACES_51503-03241-001
CONN@

KSO16 and KSO17
C1398 1
2 100P_0402_50V8J
KSI3
C1400 1
2 100P_0402_50V8J
KSO8
C1402 1
2 100P_0402_50V8J
KSO3
C1389 1
100P_0402_50V8J
KSO0
C1397 1
100P_0402_50V8J
KSI4
C1391 1
100P_0402_50V8J
KSI5
C1399 1
100P_0402_50V8J
White
KSO2
C1393 1
100P_0402_50V8J
KSI6
C1401 1
100P_0402_50V8J
Amber
KSO1
C1395 1
100P_0402_50V8J
KSI7
C1403 1
100P_0402_50V8J
2015/07/08
Title
11/09 add WLAN LED
Amber
+5VALW
+3VALW
WLAN_WHIT
2N7002KDW_SOT363-6
Q48B
WLAN_ON_LED#
37
Issued Date
Compal Secret Data
4
Q48A
2N7002KDW_SOT363-6
WLAN_AMBER
White
R371
360_0402_5%
R367
360_0402_5%
WLAN_OFF_LED#
34
33
KSO9
R168
0_0402_5%
37
GND
GND
KSO14
KSI2
On (WLAN_ON_LED#=L)
Off (WLAN_ON_LED#=H)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSO15
HP3DC2
37,45,47
37,45,47
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+5VS
2 360_0402_5%
R372 1
CAP_LOCK#
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
POWER/B
LID_SW#
PWR_LED#
ON/OFFBTN#
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
2011/07/08
Deciphered Date
BIOS, I/O Port & K/B CONN/TP CONN/PBTN
Size
B
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
38
of
56
TP Conn
0.1U_0402_16V4Z
C116
100P_0402_50V8J
FCH_SCLK1_R
FCH_SDATA1_R
1
C117
USB20_N1
USB20_P1
D64
SCA00001L00
7
8
PESD5V0U2BT
ACES_51524-0060N-001
CONN@
2 100P_0402_50V8J
27
27
1
2
3
4
5 G1
6 G2
USB20_N1_R
USB20_P1_R
1
2
3
4
5
6
R1334
R1335
2
JFPR CONN@
1
2 1
3 2
4 3
5 4
7
6 5 G1 8
6 G2
ACES_51524-0060N-001
1
0_0402_5%
2
1
2
1
0_0402_5%
0.1U_0402_16V7K
C954
C220
TP_CLK
TP_DATA
TP_CLK
TP_DATA
+3VS
Del reserved TP power control
D7
JTP1
37
37
Will change to 8 pins
Finger printer
+3VALW
AZ5125-02S.R7G_SOT23-3
11/15 ESD
27
27
FCH use SMBus 1??
@ 2
@ 2
R190
R210
FCH_SCLK1
FCH_SDATA1
1 0_0402_5% FCH_SCLK1_R
1 0_0402_5% FCH_SDATA1_R
For multi-touch function
11/09 Change to KB connector
WLAN ON/OFF LED
Keyboard backlight Conn
+5VALW
1
+5VS
R4742
100K_0402_5%
S
Q153
2
R369
2
+5VS_KBL
ACES_50504-0040N-001
CONN@
11/15 modified
1
AO3413L_SOT23-3
D
2
Q49
2N7002K_SOT23-3
KBL_OFF#
37
KBL_OFF#=H, Power ON
KBL_OFF#=L,Power off
S
3
G1
G2
1K_0402_5%
C4689
0.047U_0402_16V7K
5
6
JP14
1
1 2
2 3
3 4
4

B
AOAC power control
11/15 modified
2N7002K_SOT23-3
Q46
R4745 1
2 360_0402_5%
+3VS
LED7
LTST-C191KFKT-5A 0603 ORANGE
T/P On/Off LED
Amber
Del AOAC
TP_ON_OFF
TP_ON_OFF
37
EC pin
Amber
11/09 Change to KB connector
Mute On/Off LED

A
2011/07/08
Issued Date
Compal Secret Data
Deciphered Date
2015/07/08
Title
LAN Magnetic & RJ45
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
1
39
of
56
USB Charger
+5VALW
+5VALW
37
2 0_0402_5%
R4750 1
2 0_0402_5%
4
5
USB_CTL1
USB_CTL2
USB_CTL3
0_0402_5%
6
7
8
USB_CHARGE_EN
11/24 move to sub board
R4756
13
2
3
USB20_N0
USB20_P0
USB20_N0
USB20_P0
IN
OUT
FAULT#
NC
DM_OUT DM_IN
DP_OUT DP_IN
ILIM_SEL
EN
CTL1
CTL2
CTL3
ILIM1
ILIM0
GND
GPAD
C4723
680P_0402_50V7K
27
27
<FCH>
R4749 1
USB_OC1#
C4695
1U_0402_6.3V6K
@
27
D
C4694
1U_0402_6.3V6K
U61
C4693
1000P_0402_50V7K
C4692
10U_0805_10V4Z
11/15 EMI
C4690
150U_B2_6.3VM_R35M
W=80mils
1
C4691
0.1U_0402_16V4Z
C4722
680P_0402_50V7K
+USB_BS
11/15 EMI
12
9 PAD
@ T68
11
10
USB20_N0_C
USB20_P0_C
15
16
2
@
R4751 2
R4766
<CONN>
1
1 19.1K_0402_1%
19.1K_0402_1%
14
17
11/24 add
+3VALW
State
Mode
R4763
10K_0402_5%
1
USB_CTL2
S0
CDP
S3, S4, S5
DCP
USB_CTL1
R4762
10K_0402_5%
+3VS
2
R4767
10K_0402_5%
+3VS
TPS2540RTER_QFN16_3X3
CTL1 CTL2 CTL3
R4765
100K_0402_5%
Control pin
1
R4764
100K_0402_5%
ILIM_
SEL
CTL1 CTL2 CTL3 ILIM_

SEL
USB3.0 Repeater
+3VALW
+3VALW
11/10 del chock
10
3
13
21
REXT
GND
GND
GND
EQ1
EQ_INC#
PD#
I2C_EN
NC
NC
NC
27
27
D62
+USB_BS
USB30RXN2
USB30RXP2
USB30RXN2
USB30RXP2
USB20_N0_C
USB20_P0_C
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
12
17
11
EQ1
EQ_INC
+3VS
R4769
4.99K_0402_1%~D
20
5
7
8
9
EQ0
+3VS
R4768
4.99K_0402_1%~D
EQ1
SCA00001L00
PESD5V0U2BT
R4771
4.99K_0402_1%~D
@
JIO1
+3VS
34
34
EQ0
DE
C4726 1
C4727 1
NC
USB30RXN2_C
USB30RXP2_C
EQ_INC
PS8711BTQFN20GTR-A0_TQFN20_3X3
HDDHALT_LED#
26 SATA_LED#
37,38 PWR_LED#
DE
27
27
R4775
4.99K_0402_1%~D
27
27
Place near FCH
SUBWOOFERSUBWOOFER+
25
19
18
NC
15
14
EQ0
DE
R4772 1
2
4.99K_0402_1%~D
OUTn
OUTp
INn
INp
16
1
2
VDD
USB3_RX2_N
USB3_RX2_P
VDD
2
U63
6
C4701
0.1U_0402_16V4Z
C4700
0.01U_0402_16V7K
USB20_P0_C
USB20_N0_C
USB20_P12
USB20_N12
USB3_RX2_N
USB3_RX2_P
USB20_P12
USB20_N12
USB30_MTX_DRX_N2
USB30_MTX_DRX_P2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GND2
GND4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
GND1
GND3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
+5VALW
+5VS
+3VS
PANAS_AXK8L30124B
CONN@

11/24 change pin definition
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
5
Title
Gsensor/ Sub USB

Size
Document Number
Custom
Rev
0.1
QCL51 LA-8712P
Date:

1
Sheet
40
of
56
R1224
4
USB30TXN0
USB30TXP0
2 .1U_0402_16V7K
2 .1U_0402_16V7K
USB30TXP0
USB30TXN0
USB30RXP1
USB30RXN1
2 .1U_0402_16V7K
2 .1U_0402_16V7K
27
27
USB20_P11
USB20_N11
98
USB30TXN0_L
0_0402_5%
USB30RXP0_L
4 4
77
USB30RXP0_L
R1226
0_0402_5%
USB30RXN0_L
5 5
66
USB30RXN0_L
USB30RXP0
L89 1
USB30TXP1
USB30TXN1
R1228
USB30RXN0_L
3 3
OCE2012120YZF_4P
2
USB30RXP0_L
USB20_P10
USB20_N10
USB30TXN0_L
USB20N10_L
0_0402_5%
2
L64
4
USB20_N10
USB20_P11
USB20_N11
R974
4
1
3
@
USB20P10_L
OCE2012120YZF_4P
3
USB20N10_L
D4
0_0402_5%
PESD5V0U2BT
SCA00001L00
R4722
C
USB30TXN1
USB30TXP1
L91 1
USB20P10_L
USB30RXP0_L
USB30RXN0_L
USB30TXP1_L
OCE2012120YZF_4P
2
USB30TXP1_L
109
USB30TXP1_L
2 2
98
USB30TXN1_L
0_0402_5%
USB30RXP1_L
4 4
77
USB30RXP1_L
R4724
0_0402_5%
USB30RXN1_L
5 5
66
USB30RXN1_L
USB30RXP1
USB30RXN1_L
3 3
OCE2012120YZF_4P
2
USB30RXP1_L
R4725
0_0402_5%
R4726
0_0402_5%
GND
GND
GND
GND
10
11
12
13
+USB3_VCCA
C4644
470P_0402_50V7K
USB30TXN1_L
SSTX+
VBUS
SSTXDGND
D+
SSRX+
GND
SSRX-
L92 1
9
1
8
2
7
3
6
4
5

D60
1 1
USB30TXN1_L
R4723
USB30RXN1
C1571
470P_0402_50V7K
OCTEK_USB-09EAEB
CONN@
0_0402_5%
JUSB1
USB30TXP0_L
AZ1045-04F_DFN2510P10E-10-9
0_0402_5%
USB20N10_L
1
USB20P10_L
R971
C1572
USB20_P10
USB20_P10
USB20_N10
USB30TXP0_L
2 2
R1225
USB30RXN0
USB30RXP1
USB30RXN1
27
27
109
USB30TXN0_L
27
27
C4687 1
C4688 1
D43
1 1
USB30_MTX_DRX_P1
USB30_MTX_DRX_N1
USB30TXP0_L
USB30TXN0_L
150U_B2_6.3VM_R45M
USB30RXP0
USB30RXN0
27
27
OCE2012120YZF_4P
2
USB30TXP0_L
USB30RXP0
USB30RXN0
1
1
0_0402_5%
3
27
27
C39
C37
USB30_MTX_DRX_P0
USB30_MTX_DRX_N0
+USB3_VCCA
27
27
L88 1
1
4
For ESD request
AZ1045-04F_DFN2510P10E-10-9
USB20P11_L
USB20N11_L
R4727
4
1
3
@
OCE2012120YZF_4P
3
USB20N11_L
D61
JUSB4
USB30TXP1_L
USB20P11_L
USB30TXN1_L
USB20N11_L
L93
USB20_N11
0_0402_5%
PESD5V0U2BT
SCA00001L00
USB20P11_L
USB30RXP1_L
USB20_P11
USB30RXN1_L
+5VALW
To EC
1
2
3
4
USB_ON#
10
11
12
13
80mils
U54
AP2301MPG-13_MSOP8
8
GND
VOUT 7
VIN
VOUT 6
VIN
VOUT 5
EN
FLG
GND
GND
GND
GND
R60
1
2
@
0_0402_5%
USB_OC0#
27
37
Low active
80mils
SSTX+
VBUS
SSTXDGND
D+
SSRX+
GND
SSRX-
OCTEK_USB-09EAEB
CONN@
+USB3_VCCA
EPAD
C22
10U_0805_10V4Z
1
2
9
1
8
2
7
3
6
4
5
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
USB2.0 / USB3.0 / BT
Size
B
Date:
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
1
41
of
56
2
1
29,37,49
C1451
.1U_0603_25V7K
R1108
100K_0402_5%
SUSP
+3VS
2
C19
2
C27
2
C28
2
C31
Q57 change to SB000008J10

20101228
C1456
.1U_0603_25V7K
R1110
470_0603_5%
For Power noise

20110127
1
680P_0402_50V7K
1
680P_0402_50V7K
1
680P_0402_50V7K
1
680P_0402_50V7K
Q52A
37,49,52
SUSP#
R1109
10K_0402_5%
2
6
Q60A
Q57
2N7002K_SOT23-3
ACIN 2
ACIN
+5VALW
R1104
100K_0402_5%
Q54B
SYSON
R1102
10K_0402_5%
VLDT_EN#
Q51
2N7002K_SOT23-3
G
S
1
1
2
3 1
3 1
VLDT_EN
SYSON#
Q52B
3 1
C1455
1U_0402_6.3V6K
U40
SI4800BDY-T1-GE3_SO8
1
2
3
C1452
37,51
1.1VS_GATE
1
SUSP
Del arrow
D
1
3VS_GATE
200K_0402_5%
1
2
R1105
47K_0402_5%
14,37,47
10U_0603_6.3V6M
+VSB
+3VS
C1454
C1453
2
R1112
+VSB
10U_0603_6.3V6M
10U_0603_6.3V6M
Q53B
2
Q54A
+3VALW
R1101
470_0603_5%
VLDT_EN#
+3VALW TO +3VS (3.3A)

8
7
6
5
VLDT_EN#
SUSP
R1098
100K_0402_5%
1 2
Q53A
R1106
300K_0402_5%
SUSP
C1450
.1U_0603_25V7K
@
R1100
1K_0402_5%
5VS_GATE
2
100K_0402_5%
5
4
1
R1103
R1099
470_0603_5%
+5VALW
R1097
100K_0402_5%
1
2
3
C1449
1U_0402_6.3V6K
+VSB
+1.1VS
8
7
6
5
C1447
10U_0603_6.3V6M
C1448
10U_0603_6.3V6M
C1444
1U_0402_6.3V6K
C1445
+1.1VALW
U39
AO4430L_SO8
C1446
10U_0805_10V4Z
10U_0805_10V4Z
C1443
10U_0805_10V4Z
+1.1VALW TO +1.1VS (1.1A)
+5VS
U38
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5
+5VALW
+5VALW
+5VALW TO +5VS (5A)
SUSP
VGA Power
Q60B
+1.5V TO +1.5VS (1.5A)
+1.5V to +1.5VSG (1.5A)
Del +1.5VSG and reserved on GPU
Del +1.5V to +1.5VS
+1.2VS
1 1
R1128
470_0603_5%
D
2
VLDT_EN#
G
3
2
D
2
SYSON#
SUSP
G
S
2011/07/08
Issued Date
Q80
2N7002K_SOT23-3
Compal Secret Data
SUSP
G
Q79
2N7002K_SOT23-3
Q78
2N7002K_SOT23-3
1 1
D
2
G
R1137
470_0603_5%
1 1
R1136
470_0603_5%
1 1
R1135
470_0603_5%
+0.75VS
+2.5VS
+1.5V
4
Del +3VSG and reserved on GPU
Q74
2N7002K_SOT23-3
2015/07/08
Deciphered Date
Title
Size
B
Date:
DC Interface
Document Number
Rev
0.1
QCL51 LA-8712P
Sheet
E
42
of
56
Enter S3
Boot
S3 Resume
Shut Down
ACIN
AC Plug
+5VALW
+3VALW
SPOK
(+3VALW/+5VALW PWRGD)
SPOK enable +1.1VALW
+1.1VALW
EC_RSMRST#
(FCH to EC)
ON/OFF
PBTN_OUT#
(EC to FCH)
SLP_S5#
SLP_S3#
(FCH to EC)
165mS
125.6mS
SYSON
620uS
+1.5V
116.8mS
52.6mS
SUSP#
52.57mS
50.43mS
3.79mS
+5VS
5.95mS
+3VS
LDO to +2.5VS
5.07mS
+2.5VS
4.88mS
+1.5V_PCIE
(+1.5VS)
+0.75VS
85mS
84.2mS
83.4mS
VR_ON
84mS
8.62mS
+CPU_CORE
+CPU_CORE_NB
VGATE
VLDT_EN
31mS
31.6mS
1.08mS
+1.2VS
+1.1VS
13mS
PXS_PWREN
(FCH:PE_GPIO1)
1.57mS
+3VSG
1.57mS
+VGA_CORE
(+VDDC)
1.57mS
+VDDCI
Within
20mS
3.57mS
+0.935VSG
7.82mS
+1.5VSG
10.58mS
+1.8VSG
62.83mS
FCH_PWRGD
94.17mS
94.37mS
63.63mS
(EC to FCH)
108.4mS
22.43mS
22.3mS
98.77mS
APU_PWRGD
(FCH to APU)
3.4mS
2.6mS
PLT_RST#
(FCH to devices)
APU_PCIE_RST#
(FCH to PCIe device)
2.2mS
1.8mS
APU_RST#
(FCH to APU)
Issued Date
Compal Secret Data
2011/07/08
Deciphered Date
2015/07/08
Title
DC Interface
Size
Document Number
Custom
Rev
0.1
QCL51 LA-8712P
Date:
5
Sheet
43
of
56
PC14
PD6
@1000P_0402_50V7K
RLZ3.6B_LL34
PR7
10K_0402_5%
ADP_ID 37
D
PR6
10K_0402_5%
1
ADPIN
ACES_59012-0080N-002
8
7
8
5
6
5
6
3
4
3
4
1
2
ACIN_LED
1
2
PJP1@
VIN
PL1
HCB2012KF-121T50_0805
1
2
1
PR1 @
1K_0402_5%
2
PC4
1000P_0402_50V7K
PC3
100P_0402_50V8J
1
2
PC2
1000P_0402_50V7K
PD1
PJSOT24CW_SOT323
PD4
PJSOT24CW_SOT323
1
2
PL2
HCB2012KF-121T50_0805
Charge_LED
PC1
100P_0402_50V8J
2
1
ESD diode : SCA00001G00
+3VALW
+3VLP
+3VALW
51ON#
VS
5
P
PU2
74LVC1G02GW_SOT353-5
AC_LED#
BAT_CHG_LED
B
Charge_LED
PC6@
0.1U_0603_25V7K
PC5
0.22U_0603_25V7K
1
2
PR3 @
68_1206_5%
PU3
74LVC1G86GW_SOT353-5
AC_LED#
1
BAT_CHG_LED
37
38
PR5
22K_0402_1%
1
2
PD3
LL4148_LL34-2
2
1
PR4
100K_0402_5%
BATT+
PQ1
TP0610K-T1-GE3 1P SOT23-3
PR2 @
68_1206_5%
PR25
2K_0402_5%
2
ACIN_LED 1
PD2 @
LL4148_LL34-2
37.1
PQ5
VIN
1
PR28
10K_0402_5%
2
1
PR29
10K_0402_5%
AC_LED#
1
PR26
10K_0402_5%
2
1
PR27
10K_0402_5%
37
Compal Secret Data
Issued Date
2011/10/03
2014/12/31
Deciphered Date
Title

PWR- DCIN / Vin Detector
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
1
44
of
56
For KB930 --> Keep PU1 circuit

(Vth = 0.825V)
BATT++
BATT+
PL3
HCB2012KF-121T50_0805
1
2
BATT+
1
PC7
0.01U_0402_25V7K
PJPB1 battery connector
PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 56 +-3 degree C
PD7
3
1
@
PJP2
SUYIN_200275MR008G15QZR
PD5
L30ESD24VC3-2
PRA2
1
Rset = 3 * Rtmh
Rhyst = (Rset* Rtml) / (3*Rtml - Rset)
Rtmh at 90C = 7.8K, Rtml at 56C = 26.1K
Rset = 3 * 7.8K = 23.4K ==> 23.7K
Rhyst = (23.4K * 26.1K) / (3 * 26.1K - 23.4K) = 11.12K ==> 11.3K
L30ESD24VC3-2
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
GND
GND
EC_SMB_DA1
FBMA-10-100505-301T
37,38,47
PR24
100_0402_5%
+3VLP
PRA3
37,38,47
PR30
100_0402_5%
PR12
23.7K_0402_1%
PR9
6.49K_0402_1%
2
1
PC10
.1U_0402_16V7K
EC_SMB_CK1
FBMA-10-100505-301T
+3VLP
PR13
11.3K_0402_1%
PU1
MAINPWON
46,8
MAINPWON
+3VS
BATT_TEMP 37
3
4
GND RHYST1
OT1 TMSNS2
OT2 RHYST2
PH1
100K_0402_1%_NCP15WF104F03RC
7
2
PR23
1K_0402_1%
VCC TMSNS1
6
5
PR14
6.34K_0402_1%
ADP_I 37,47
PR15
1.8K_0402_1%
G718TM1U_SOT23-8
PL4
HCB2012KF-121T50_0805
1
2
PC9
1000P_0402_50V7K
PR22
0_0402_5%
2
2
G
2
1
2
G
PR18 @
S SSM3K7002FU_SC70-3 0_0402_5%
PQ3
1
2
+VSB
PC12 @
0.1U_0603_25V7K
EC_THERM#
25,37,54,8
Active point = 116W

Recovery point = 95W
1
2
8 H_PROCHOT#
PQ4
SSM3K7002FU_SC70-3
PC13 @
.1U_0402_16V7K
SPOK
1
46,50
PC11
0.22U_1206_25V7K
1
2
PR21
22K_0402_1%
1
2
PR20
100K_0402_1%
PR19
100K_0402_1%
+5VALW
PR17
10K_0402_1%
B+
PR16
100K_0402_1%
2
PQ2
Compal Secret Data
Issued Date
2011/10/03
2014/12/31
Deciphered Date
Title

PWR- BATTERY CONN
Custom
Rev
0.1
QCL51 LA-8712P
Date:
Sheet
1
45
of
56
PC302
1U_0603_16V6K
2VREF_8205
VL
PR304
20K_0402_1%
1
2
ENTRIP2
3
23
PC322
68P_0402_50V8J
2
1
PC306
10U_0805_25V6K
2
1
PC305
10U_0805_25V6K
2
1
PC304
2200P_0402_50V7K
2
1
21
PC311
0.22U_0603_16V7K
2 BST1_5V1
2
BST_5V 1
2.2_0402_5%
UG_5V
20
LX_5V
19
LG_5V
PL352
1UH_VMPI0703AR-1R0M-Z01_11A_20%
2
1
+5VALWP
1SNUB_5V 2
3
2
1
1
VL
PC317
4.7U_0805_10V6K
PJP303
PQ305A
SSM6N7002FU-2N_SOT363-6
PQ305B
SSM6N7002FU-2N_SOT363-6
@ JUMP_43X118
PJP304
N_3_5V_001
+5VALWP
+
2
Ipeak=10A
Imax=7.5A
F=400K
Rtrip=57.6K, OCP=16.39A
Total Capacitor 150uF,
2VREF_8205
2
B++
PC313
150U_UD_6.3VM_R15M
RT8205LZQW(2) WQFN 24P PWM
PR310
4.7_1206_5%
PQ304
TPCA8057-H_PPAK56-8-5
PC316
680P_0603_50V7K
22
3
2
1
PR308
ENTRIP1
PC303
0.1U_0402_25V6
2
1
FB_5V
2
1
ENTRIP1
45,50 SPOK
24
PQ302
AON7408L_DFN8-5
18
EN
NC
LGATE1
2
ENTRIP1
6
LGATE2
13
1
MDV2658BURH_POWERDFN33-8-5
FB1
PHASE1
PR312 @
0_0402_5%
1
2
MAINPWON
REF
UGATE1
PHASE2
VREG5
UGATE2
PC315
1U_0603_10V6K
B+
TONSEL
FB_3V
5
BOOT1
PD302
PR311
RLZ5.1B_LL34 499K_0402_1%
1
2
1
2
FB2
BOOT2
17
12
PGOOD
VIN
LG_3V
VREG3
GND
11
VO1
16
1
2
3
5
PQ303
LX_3V
PR313
200K_0402_1%
2
1
PC310
PR307
1
2 BST1_3V 1
2 BST_3V 9
2.2_0402_5%
10
UG_3V
0.22U_0603_16V7K
1
2
3
Ipeak=5A
Imax=3.5A
F=500K
Rtrip=113K, OCP=6.92A
Total Capacitor 150uF,
1 SNUB_3V
2
+ PC312
150U_B2_6.3VM_R35M
PC314
680P_0603_50V7K
PR309
4.7_1206_5%
PL302
4.7UH_ETQP3W4R7WFN_5.5A_20%
2
1
+3VALWP
B++
PR306
57.6K_0402_1%
1
2
VO2
PC318
0.1U_0603_25V7K
P PAD
15
4
2
ENTRIP2
PU301
25
SKIPSEL
1
2
PC309
10U_0805_6.3V6M
PC321
68P_0402_50V8J
PQ301
AON7408L_DFN8-5
ENTRIP2
6
+3VLP
PR305
113K_0402_1%
1
2
PC308
2200P_0402_50V7K
2
1
PC307
10U_0805_25V6K
1
2
PR303
20K_0402_1%
1
2
For RF request
For RF request
PL301
HCB2012KF-121T50_0805
1
2
PC301
0.1U_0402_25V6
2
1
PR302
30.9K_0402_1%
1
2
14
B++
B+
PR301
13.7K_0402_1%
1
2
+5VALW
( UMA 10A,400mils ,Via NO.= 20 )
@ JUMP_43X118
1
37,38 EC_ON
PR314
100K_0402_5%
@ PR315
0_0402_5%
1
2
VL
PJP301
MAINPWON
+3VALW
( 5A,200mils ,Via NO.= 10 )
@ JUMP_43X118
1
45,8
MAINPWON
+3VALWP
PR316
0_0402_5%
1
2
PD301
PR317
1M_0402_1%
LL4148_LL34-2
2
1 1
2
PC319
4.7U_0603_6.3V6K
VS
PR319
100K_0402_1%
2
1
PQ306
LTC015EUBFS8TL NPN UMT3F
2
PR318
402K_0402_1%
VIN
Compal Secret Data
2011/10/03
Issued Date
2014/12/31
Deciphered Date
Title
Custom
For KB930 --> Keep PD301, PR317, PR319
Date:

PWR- 3VALWP/5VALWP
Rev
0.1
QCL51 LA-8712P
Sheet
E
46
of
56
for reverse input protection
PQ101 D
2
G
3
2N7002KW _SOT323-3
PR102
3M_0402_5%
B+
SRP
ACDRV
SRN
12
SRN 1
11
PC127
68P_0402_50V8J
2
1
PC122
0.01U_0402_50V7K
PC121
2200P_0402_50V7K
PC119
10U_0805_25V6K
PC118
10U_0805_25V6K
1
2
1 CSON1
2
EC_SMB_CK1
37,38,45
EC_SMB_DA1
37,38,45
ADP_I
37,45
100P_0402_50V8J
Max.
ILIM and external DPM

4.36A
Compal Secret Data
Issued Date
2011/10/03
Deciphered Date
2014/12/31
Title
Size
Date:
PC117
0.1U_0402_25V6
1 CSOP1
2
1
2
PC116
0.1U_0402_25V6
PR119
280K_0402_1%
PC124
0.01U_0402_25V7K
1
2
1
2
PR120
100K_0402_1%
0_0402_5%
PR123
0_0402_5%
CHG
1
0_0402_5%
PR125
2
1
PR126
51K_0402_1%
PR122
PR124
330K_0402_1%
1
2
1
2
PC125
0.047U_0402_16V
1
2
PC126
2
1
Vin Dectector
+3VALW
1
VIN
3
2
1
2 CSON1
PR115
PC123
6.8_0603_5%
0.1U_0603_25V7K
BQ24725_BATDRV
PR118
0_0402_5%
Typ
17.33V
16.98V
PR114
10_0603_5%
2 CSOP1
AON7408L_DFN8-5
SRP 1
PR113
4.7_1206_5%
3
2
1
13
ILIM
SCL
SDA
BATDRV
IOUT
ACOK
CMSRC
DL_CHG
14
REGN
BTST
HIDRV
16
17
18
19
20
VCC
GND
15
PR112
0.01_1206_1%
1
4
10
ACIN
PL102
4.7UH_ETQP3W4R7WFN_5.5A_20%
PQ106
ACP
BATT+
0_0402_5%
PC115
1
2
LODRV
ACDET
BQ24725_ACDRV
PR105
0_0402_5%
BQ24725_LX
ACN
+3VLP
14,37,42
@ PR116
10K_0402_1%
1
2
PR117
10K_0402_1%
1
2
+3VALW
3
BQ24725_CMSRC
PC110
0.01U_0402_50V7K
2
PR111
PC120
680P_0603_50V7K
PD102
RB751V-40_SOD323-2
BQ24738ARGRR QFN 20P CHARGER
Min.
4
5
DH_CHG 1
PAD
PHASE
H-->L
L-->H
PC218
68P_0402_50V8J
2
1
PQ105
AON7408L_DFN8-5
1U_0603_25V6K
PU101
PC108
2200P_0402_50V7K
2
1
PC107
0.1U_0402_25V6
2
1
PC106
10U_0805_25V6K
2
1
PC105
10U_0805_25V6K
2
1
1
2
PC114
1U_0603_25V6K
21
PR106
4.12K_0603_1%
PC113 0.047U_0402_25V7K
1
1
2
3
BQ24725_BATDRV 1
BQ24725_ACP
PQ104
AON7702L_DFN8-5
PD101
BAS40CW_SOT323-3
BQ24725_ACN
2011/03/18
delete VIN voltage
detecting circuit
VIN
PR109
10_1206_1%
2
1
PC112
0.1U_0603_25V7K
PC109
0.1U_0402_25V6
1
2
PC104
10U_0805_25V6K
2
1
PR110
2.2_0603_5%
2
1
BQ24725_BST
DH_CHG
PL101
1.2UH +-30% 1231AS-H-1R2N=P3 2.9A
1
2
PC103
10U_0805_25V6K
1
2
3
1
2
2
PC102
0.1U_0402_25V6
PR107
4.12K_0603_1%
2
1
PR104
0_0402_5%
1
2
3
PC101
2200P_0402_50V7K
2
1
8
7
6
5
JUMP_43X39
PR103
0.01_1206_1%
BQ24725_LX
PQ103
AON7702L_DFN8-5
PQ102
AO4474L_SO8
P2
P1
PC111
0.1U_0603_25V7K
VIN
@ PJP102
1
2
1
PR101
1M_0402_5%
PR108
4.12K_0603_1%

PWR- CHARGER
Document Number
Rev
0.1
LA-8712P
D
Sheet
47
of
56
1.8VGSP
Peak Current 1.4A
OCP current 3A
PL402
1
2
FB_1.8V
PR402
10K_0402_1%
2
PR4045
2
PC405
0.1U_0402_10V7K
0_0402_5%
47K_0402_5%
PC402
22U_0805_6.3V6M
2
PR404
15,25,27,52,53,56 PXS_PWREN
PR401
20K_0402_1%
PC401
22U_0805_6.3V6M
FB=0.6Volt
SY8033BDBC_DFN10_3X3
+1.8VGSP
PC404
22P_0402_50V8J
2
1
6
1 2
NC
NC
FB
EN
LX_1.8V
PC406
PR403
680P_0603_50V7K 4.7_1206_5%
LX
SVIN
TP
EN_1.8V
PVIN
11
LX
PC403
22U_0805_6.3V6M
PVIN
PG
PU401
10
+5VALW
PL401
1UH_NRS4018T1R0NDGJ_3.2A_30%
1
2
HCB1608KF-121T30_0603
1
2
+1.8VGSP
@ PJP401
1
2
1
+1.8VGS
JUMP_43X39
(4A,240mils ,Via NO.= 8)
Compal Secret Data
2011/07/29
Issued Date
Title
Deciphered Date
Size
Date:

+1.8VP
Document Number
Rev
0.1
LA-8712P
Sheet
1
48
of
56
PR511
+0.75VSP
DH_1.5V
VDDP
VTTREF
VDD
VDDQ
SYSON
+1.5VP
1.5V_B+
PR503
887K_0402_1%
1
2
@ PC515
0.1U_0402_10V7K
PQ401
SSM3K7002FU_SC70-3
@ PJP503
1
1
+0.75VS (2A,80mils
JUMP_43X118
,Via NO.= 14)
PR406
5.1K_0402_1%
2
DDR3L_EN
25
2
G
PR408
10K_0402_5%
PC411
.1U_0402_16V7K
PR510
0_0402_5%
2
1
+1.5V (7A,280mils
+3VS
PR409
10K_0402_1%
1
2
2
1
PC513
.1U_0402_16V7K
PR407
41.2K_0402_5%
PR502
10K_0402_1%
EN_0.75VSP
1
2
@ PC514
0.1U_0402_10V7K
PJP501
PC511
0.033U_0402_16V7K
PC518
EN_1.5V
37,42,52 SUSP#
+0.75VSP
PR501
10K_0402_1%
2
1
PR508
0_0402_5%
1
2
+1.5VP
+1.5VP
@
1
Note: S3 - sleep ; S5 - power off
PC517
10U_0805_6.3V6K
VTTREF_1.5V
.1U_0402_16V7K
29,37,42
VTTREF_1.5V
off
on
on
+0.75VSP
off
off
on
2
1
FB_1.5V
TON_1.5V
Level
L
L
H
PC512
680P_0603_50V7K
Mode
S5
S3
S0
PC508
10U_0805_6.3V6K
VTT
19
VLDOIN
18
BOOT
UGATE
20
GND
RT8207MZQW _W QFN20_3X3
+5VALW
PC510
1U_0603_10V6K
1
2
3
CS
+5VALW
PQ502
FDMC7692S_MLP8-5
VTTSNS
21
11
PR506
4.7_1206_5%
17
1
VDD_1.5V
12
VTTGND
PGND
PR507
5.1_0603_5%
1
2
PAD
FB
PC509
1U_0603_10V6K
1
2
PU501
14
S3
PR505
9.53K_0402_1%
1
2CS_1.5V
S5
PQ501
SIS412DN-T1-GE3_POW ERPAK8-5
LGATE
TON
15
PHASE
16
DL_1.5V
13
2
SNUB_+1.5VP
330U_D2_2.5VY_R15M
Ipeak=7.5A
Imax=5.25A
F=300K
1
PC501
1
2
3
PL501
1UH_VMPI0703AR-1R0M-Z01_11A_20%
2
1
PC507
10U_0805_6.3V6K
SW _1.5V
PGOOD
+1.5V
BOOT_1.5V
0_0402_5%
PC506
0.22U_0402_10V6K
1
2
PC503
4.7U_0805_25V6-K
1
2
PC502
10U_0805_25V6K
1
2
PC505
2200P_0402_50V7K
1
2
PC504
0.1U_0402_25V6
DH_1.5V_1
PR504
1
2
2.2_0402_5%
+1.5VP
1.5V_B+
BST_1.5V
PC516
68P_0402_50V8J
2
1
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
PL502
HCB1608KF-121T30_0603
1
2
B+
10
,Via NO.= 4)
JUMP_43X39
Compal Secret Data
Issued Date
2011/07/29
Deciphered Date
2012/07/29
5
Title

PWR-1.5VP / +0.75VSP
Size
Document Number
Custom
Date:
Rev
0.1
LA-8712P
Sheet
1
49
of
56
SNUB_+1.1V
PR804
2
8.45K_0402_1%
PR805
10K_0402_1%
PC808
2
1
22P_0402_50V8J
2
+1.1VALWP
@ PJP504
1
2
1
JUMP_43X39
PC809
680P_0603_50V7K
+1.1VALWP
1
2
PR803
2
PC807
0.1U_0402_10V7K
2 EN_1.1V
0_0402_5%
47K_0402_5%
SPOK
PR801
45,46
FB_+1.1V
+1.1VALWP
PC805
22U_0805_6.3V6M
FB
EN
PU801
PG
IN
PC804
22U_0805_6.3V6M
1.1V_IN
PL802
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2
HCB1608KF-121T30_0603
1
2
SY8809DFC_DFN8_2X2
5
GND GND
6
LX_+1.1V
LX
LX
PC803
22U_0805_6.3V6M
+5VALW
22U_0805_6.3V6M
PL801
1.1valwp
Peak Current 4A
current limited 6A
PR802
4.7_0805_5%
PC802
+1.1VALW
Compal Secret Data
2011/07/29
Issued Date
Title
Deciphered Date
Size
Date:

+1.1VALWP
Document Number
Rev
0.1
LA-8712P
Sheet
1
50
of
56
PL701
HCB1608KF-121T30_0603
2
1
PR702
2.2_0603_5%
1
2
RF
LGATE
SW _+1.2VSP
+1.2VSP_5V
LG_+1.2VSP
3
2
1
11
PQ702
PC707
1U_0603_6.3V6M
3
2
1
PR705
470K_0402_1%
PR707
PC710
1000P_0402_50V7K
PC705
68P_0402_50V8J
2
1
+1.2VSP
+5VALW
RT8237EZQW (2)_W DFN10_3X3
PL702
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1
2
1
PC708
330U_D2_2.5VY_R15M
VCC
SIS412DN-T1-GE3_POW ERPAK8-5
FB
TP
1
1
@ PC701
2
PHASE
UG_+1.2VSP
PR704
4.7_1206_5%
UGATE
EN
0.1U_0603_25V7K
PR711
0_0402_5%
1
2
RF_+1.2VSP
CS
BST_+1.2VSP
PC709
1000P_0603_50V7K
10
FDMC7692S_MLP8-5
FB_+1.2VSP
0.1U_0402_16V7K
PR701
0_0402_5%
1
2
VLDT_EN
PR710
47K_0402_1%
37,42
1
2 TRIP_+1.2VSP
88.7K_0402_1%
EN_+1.2VSP
BOOT
PGOOD
B+
PU701
1
PR703
PC706
PC704
10U_0805_25V6K
PQ701
PC703
2200P_0402_50V7K
2
1
PC702
0.1U_0402_25V6
2
1
+1.2VSP_B+
Ipeak=8.5A
Imax=5.95A
F=290K
C
PR706
1
PJP701
1.2K_0402_1%
+1.2VSP
7.15K_0402_1%
2
1
+1.2VS
JUMP_43X118
(8.5A,340mils ,Via NO.=17)
+1.2VSP
Iocp=13A
PR708
10K_0402_1%
PU702
APL5508-25DC-TRL_SOT89-3
1
2
PC711
1U_0603_10V6K
+2.5VSP
+2.5VSP
+2.5VS
@ JUMP_43X39
@ PR709
10K_1206_5%
(0.75A,40mils ,Via NO.=22)
GND
PJP702
3
1
OUT
IN
PC712
4.7U_0805_6.3V6K
+3VS
Compal Secret Data
2011/07/29
Issued Date
Title
Deciphered Date
5

+1.2VSP/+2.5VSP
Size
Document Number
Rev
0.1
LA-8712P
Date:
Sheet
1
51
of
56
1.5VPCIEP
Peak Current 6A
OCP current 6A
PL1500
1
2
1
PC1504
0.1U_0402_10V7K
PR1504
2
0_0402_5%
1
2
PC11506
22U_0805_6.3V6M
PC1505
22U_0805_6.3V6M
2
1
PC1502
680P_0603_50V7K
2
1
FB=0.6Volt
PR1502
SUSP#
PC1503
22U_0805_6.3V6M
2
1
S IC SY8036LDBC DFN 10P PW M
PR1505
15K_0402_1%
PR1503
10K_0402_1%
2
LX
FB_1.5V_PCIEP
TP
11
FB
+1.5V_PCIEP
SVIN
PC1500
22P_0402_50V8J
2
1
LX
PR1501
4.7_0805_5%
PVIN
5
EN_1.5V_PCIEP
EN
47K_0402_5%
37,42,49
PL1501
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2
LX_1.5V_PCIEP
LX
SS
PC1501
22U_0805_6.3V6M
PVIN
PG
PU1501
10
+5VALW
HCB1608KF-121T30_0603
1
2
@
PJ1502
1
+1.5V_PCIEP
+1.5V_PCIE
JUMP_43X118
0.935VGSP
Peak Current 4.2A
current limited 6A
FB=0.6Volt
PR9335
PR9352
20K_0402_1%
2
1
2
PC9356
0.1U_0402_10V7K
PR9351
2
0_0402_5%
2
1
PXS_PW REN
47K_0402_5%
15,25,27,48,53,56
PR9354
11.3K_0402_1%
PC9357
22U_0805_6.3V6M
FB_0.935VGSP
PC9351
22U_0805_6.3V6M
2
1
FB
+0.935VGSP
1
EN_0.935VGSP
EN
PU935
PG
PL936
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2
LX_0.935VGSP
PC9352
22U_0805_6.3V6M
2
1
IN
LX
LX
PC9353
22P_0402_50V8J
2
1
HCB1608KF-121T30_0603
1
2
SY8809DFC_DFN8_2X2
5
GND GND
PC9354
680P_0603_50V7K
+5VALW
PL935
PR9353
4.7_0805_5%
PC9355
22U_0805_6.3V6M
@
PJ9352
+0.935VGSP
+0.935VGS
JUMP_43X118
(4.2A,460mils ,Via NO.= 8.4)
Issued Date
Compal Secret Data
2011/08/16
Deciphered Date
2012/08/15
Title
Size
Date:
+1.5VPCIE/0.935V
Document Number
Rev
0.1
QCL51 LA-8712P
D
Sheet
52
of
56
+VDDCI
TDC 2.2A
OCP current 3A
PL1001
2
@
1
2
4.99K_0402_1%
PR1004
2
VDDCI_SEN
17
0_0402_5%
+3VS
1
1
2
PC1004
0.1U_0402_10V7K
PR1005
2
2
PR1003
0_0402_5%
FB=0.6Volt
PC1005
22U_0805_6.3V6M
SY8033BDBC_DFN10_3X3
PR1006
10_0402_5%
PC1003
22U_0805_6.3V6M
2
1
FB_VDDCIP
11
EN
NC
FB
SVIN
+VDDCIP
LX_VDDCIP
PC1000
22P_0402_50V8J
2
1
PR1001
4.7_0805_5%
LX
PR1002
1
PXS_PW REN
LX
PVIN
PC1002
680P_0603_50V7K
PVIN
TP
5
EN_VDDCIP
47K_0402_5%
15,25,27,48,52,56
PL1000
1UH_NRS4018T1R0NDGJ_3.2A_30%
1
2
PC1001
22U_0805_6.3V6M
NC
10
PG
PU1000
HCB1608KF-121T30_0603
1
2
+5VALW
PR1008
10K_0402_5%
PR1009
10K_0402_5%
2
1
@ PC1006
4700P_0402_25V7K
14
PR1010
100K_0402_5%
2
PQ1000
2N7002W -T/R7_SOT323-3
VDDCI_VID
2
G
PR1007
29.4K_0402_1%
PR1000
10K_0402_1%
+VDDCIP
@ PJ1001
1
2
1
VDDCI_VID
High
1V
Low
0.9V
+VDDCI
JUMP_43X39
(2.2A,100mils ,Via NO.= 5)
Issued Date
Compal Secret Data
2011/08/16
Deciphered Date
2012/08/15
Title
Size
Date:
+VDDCIP
Document Number
Rev
0.1
QCL51 LA-8712P
D
Sheet
53
of
56
PC2011
PR2001
330P_0402_50V7K 2K_0402_1%
2
1
2
1
8
APU_VDDNB_SEN
PC2012
PR2003
@ PR2004
137K_0402_1%390P_0402_50V7K 32.4K_0402_1%
2
1
2
1
2
1
PR2002
2.8K_0402_1%
2
1
PL2002
3
2
1
PQ2002
3
2
1
37
VSUM-
1
2
68P_0402_50V8J
PC2058
PC2015
100U_25V_M
PC2057
100U_25V_M
PC2018
0.1U_0402_25V6
2
1
UGATE1
UGATE1
3
2
1
TP
49
PHASE1
BOOT1
2 PR2031 1
10K_0402_1%
ISEN1
PR2033
100K_0402_5%
PR2037
4.7_1206_5%
VSUM+
VGATE
LGATE1
37
PQ2004
PC2040
10P_0402_25V8K
2
1
PC2039
680P_0603_50V7K
VSUM-
4
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
3
1
2 ISEN2
PR2038
3.65K_0402_1%
2
1
PR2040
1_0402_1%
2
1
CPU_B+
3
2
1
PR2047
PC2051
2K_0402_1% 680P_0402_50V7K
2
1
2
1
PR2055
0_0402_5%
2
1
+APU_CORE
APU_VDD_SEN
PR2057
0_0402_5%
2
1
PQ2006
PR2059
10_0402_5%
2
1
APU_VDD_RUN_FB_L
ISEN2
2 PR2051 1
10K_0402_1%
68P_0402_50V8J
PC2060
1
2
PC2049
2200P_0402_50V7K
2
1
4
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
3
1
2 ISEN1
PR2054
4.7_1206_5%
3
2
1
PC2056
0.01U_0402_25V7K
LGATE2
PC2053
0.22U_0603_25V7K
2 2
1
BOOT2 1
2.2_0603_5%
PR2053
1 2
APU_core
TDC 36A
Peak Current 50A
OCP current 60A
Load line -2.1mV/A
FSW=300kHz
DCR 1.1mohm +/-5%
TYP
H/S Rds(on) :11.7mohm ,
L/S Rds(on) :2.6mohm ,
MAX
14.5mohm
3.2mohm
PL2004
PHASE2
PR2049
10_0402_5%
2
1
PC2048
0.1U_0402_25V6
2
1
PC2047
10U_0805_25V6K
2
1
UGATE2
PC2052
820P_0402_50V7K
PC2046
10U_0805_25V6K
2
1
PR2046
PC2050
137K_0402_1% 390P_0402_50V7K
2
1
2
1
PQ2005
TPCA8065-H_SOP-ADV8-5
2
1
PR2043
32.4K_0402_1%
2@
1
PR2045
2.26K_0402_1%
2
1
PC2042
100P_0402_50V8J
2
1
PR2050
100_0402_1%
2
1
PC2045
330P_0402_50V7K
PC2044
0.22U_0402_10V6K
PC2054
0.1U_0603_50V7K
PC2043
0.022U_0402_16V7K
1
2
2
1
PR2044
11K_0402_1%
PH2003
10K_0402_5%_ERTJ0ER103J
2
12
1
PR2041
2.61K_0402_1%
VSUM-
PR2048
604_0402_1%
2
1
PC2041
PR2042
1000P_0402_50V7K301_0402_1%
2
1
2
1
+APU_CORE
PR2034
10K_0402_1%
VSUM+
PL2003
PC2036
0.22U_0603_25V7K
2 2
1
BOOT1 1
2.2_0603_5%
PR2035
MAX
14.5mohm
3.2mohm
68P_0402_50V8J
PC2059
25
PHASE1
1
LGATE1
26
27
PC2034
1U_0603_16V6K
PR2026
2
1
1_0603_5%
28
30
29
PC2032
2200P_0402_50V7K
2
1
+5VALW
PC2030
0.1U_0402_25V6
2
1
CPU_B+
PC2031
10U_0805_25V6K
2
1
LGATE2
PC2028
0.22U_0603_25V7K
PC2029
10U_0805_25V6K
2
1
31
PHASE2
32
PR2062
10K_0402_1%
@
APU_CORE_NB
TDC 25A
Peak Current 33A
OCP current 40A
Load line -4mV/A
FSW=300kHz
DCR 1.1mohm +/-5%
TYP
H/S Rds(on) :11.7mohm ,
L/S Rds(on) :2.6mohm ,
0_0603_5%
PC2033
1U_0603_16V6K
BOOT1
UGATE2
+3VS
24
COMP
PGOOD
23
22
BOOT2
33
1 2
PR2039
10.5K_0402_1%
+APU_CORE_NB
ISEN1
PR2018
PC2026
1_0402_1%
1
680P_0603_50V7K
VSUMN_NB 2
PQ2003
UGATEX
38
39
LGATEX
PHASEX
41
40
PWM2_NB
42
45
43
COMP_NB
PGOOD_NB
FCCM_NB
FB
34
PR2014
PR2015
4.7_1206_5%
3.65K_0402_1%
1
VSUMP_NB 2
3
2
1
ISEN2
PR2036
10_0402_5%
PR2020
FB_NB
UGATE1
BOOT_NB1
35
ISEN3
46
NTC
36
44
PHASE1
2
1
PC2037
0.22U_0402_10V6K
2
1
PC2038
0.22U_0402_10V6K
PH2002
470K_0402_5%_TSM0B474J4702RE
2
1
VSEN_NB
IMON
13
PR2032
0_0402_5%
2
1
ISUMN_NB
48
LGATE1
+5VS
PR203027.4K_0402_1%
2
1
47
ISEN1_NB
PWM_Y
PWROK
ISEN3
12
PC2035
1000P_0402_25V6K
1
2
ENABLE
21
11
FB2
VR_ON
20
37
APU_PWRGD
VDD
RTN
25,8
VDDP
SVT
VSEN
PR2029
133K_0402_1%
1
2
LGATE2
ISL6277HRTZ-T_TQFN48_6X6
VDDIO
19
After rev1.1 must change to 133k
APU_SVT
SVD
18
PHASE2
ISUMN
+1.5VP
VR_HOT_L
ISUMP
APU_SVD
UGATE2
ISEN1
BOOT2
SVC
17
PR2022
10.5K_0402_1%
VIN
IMON_NB
16
3
PR20000_0402_5%
2
1 SVC
4
PR20210_0402_5%
5
2
1
PR20230_0402_5%
2
1 SVD
6
PR20240_0402_5%
2
1 VDDIO
7
PR20250_0402_5%
2
1 SVT
8
PR20280_0402_5%
2
1 ENABLE 9
PR20270_0402_5%
2
1 PWROK 10
APU_SVC
CPU_B+
BOOTX
NTC_NB
14
PH2000
470K_0402_5%_TSM0B474J4702RE
2
1
25,37,45,8 EC_THERM#
ISEN2_NB
15
ISUMP_NB
ISEN2
2
2
PR2019
10_0402_5%
2
1
+5VS
PU2000
LGATE_NB1
B+
PL2001
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1 2
BOOT_NB1
PHASE_NB1
UGATE_NB1
PC2027
1000P_0402_25V6K
HCB2012KF-121T50_0805
1
2
PL2005
HCB2012KF-121T50_0805
1
2
3
2
1
LGATE_NB1
PC2025
PR2013
0.22U_0603_25V7K
1
2 2
1
2.2_0603_5%
PQ2007
2
PR2011
0_0603_5%
FCCM_NB
After rev1.1 must change to 133k
PR2017 27.4K_0402_1%
2
1
PHASE_NB1
PR2061
2
1
10K_0402_1%
PR2016
133K_0402_1%
PR2010
634_0402_1%
2
1
@ PC2024
@ PR2012
100_0402_1% 220P_0402_50V7K
2
1
2
1
PC2023
0.1U_0603_50V7K
UGATE_NB1
PC2017
10U_0805_25V6K
2
1
1
@
PC2022
0.1U_0402_25V6
2
1
PC2021
0.047U_0402_16V7-K
1
2
1
2
PR2009
11K_0402_1%
PH2001
10K_0402_5%_ERTJ0ER103J
2
12
1
PR2008
2.61K_0402_1%
VSUMN_NB
PQ2001
PC2019
1000P_0402_50V7K
VSUMP_NB
PC2016
10U_0805_25V6K
2
1
PC2014
100P_0402_50V8J
2
1
PR2006
PC2013
PR2007
0_0402_5% 1000P_0402_50V7K 301_0402_1%
2
1
2
1
2
1
+APU_CORE_NB
PR2005
10_0402_5%
2
1
PC2020
2200P_0402_50V7K
2
1
CPU_B+
D
+APU_CORE
PR2052
10K_0402_1%
PR2056
3.65K_0402_1%
1
VSUM+ 2
PC2055
680P_0603_50V7K
PR2058
1_0402_1%
1
VSUM- 2
Compal Secret Data
Issued Date
2011/04/18
Deciphered Date
2015/07/08
Title
Custom
Date:
CPU_COREP
Rev
0.1

1
Sheet
54
of
56
5
4
PC928
10U_0603_6.3V6M
2
1
PC927
10U_0603_6.3V6M
2
1
PC929
10U_0603_6.3V6M
2
1
PC933
10U_0603_6.3V6M
2
1
PC940
1U_0402_6.3V6K
2
1
Issued Date
PC941
1U_0402_6.3V6K
2
1
PC942
1U_0402_6.3V6K
2
1
PC943
1U_0402_6.3V6K
2
1
2011/07/29
Compal Secret Data
Deciphered Date
Title
2
Size
A3
Date:
Sheet
55
PC973
1U_0402_6.3V6K
2
1
PC972
1U_0402_6.3V6K
2
1
+VDDC
PC967
1U_0402_6.3V6K
2
1
PC267
330U_D2_2V_Y
PC936
1U_0402_6.3V6K
2
1
PC266
330U_D2_2V_Y
PC956
1U_0402_6.3V6K
2
1
PC260
22U_0805_6.3V6M
2
1
PC968
1U_0402_6.3V6K
2
1
PC256
10U_0805_6.3V6K
2
1
PC954
1U_0402_6.3V6K
2
1
PC284
180P_0402_50V8J
2
1
PC283
180P_0402_50V8J
2
1
PC935
1U_0402_6.3V6K
2
1
PC953
1U_0402_6.3V6K
2
1
PC963
1U_0402_6.3V6K
2
1
PC926
10U_0603_6.3V6M
2
1
PC969
1U_0402_6.3V6K
2
1
PC255
22U_0805_6.3V6M
2
1
PC254
22U_0805_6.3V6M
2
1
PC930
10U_0603_6.3V6M
2
1
PC952
1U_0402_6.3V6K
2
1
PC962
1U_0402_6.3V6K
2
1
PC925
10U_0603_6.3V6M
2
1
PC938
1U_0402_6.3V6K
2
1
+VGA_CORE
PC282
180P_0402_50V8J
2
1
PC276
0.22U_0402_16V7K
2
1
PC252
22U_0805_6.3V6M
2
1
PC251
22U_0805_6.3V6M
2
1
PC250
22U_0805_6.3V6M
2
1
+APU_CORE_NB
PC939
1U_0402_6.3V6K
2
1
PC951
1U_0402_6.3V6K
2
1
PC961
1U_0402_6.3V6K
2
1
PC924
10U_0603_6.3V6M
2
1
PC937
1U_0402_6.3V6K
2
1
PC275
0.22U_0402_16V7K
2
1
PC259
22U_0805_6.3V6M
2
1
PC262
22U_0805_6.3V6M
2
1
PC249
22U_0805_6.3V6M
2
1
+APU_CORE
PC922
10U_0603_6.3V6M
2
1
PC950
1U_0402_6.3V6K
2
1
PC960
1U_0402_6.3V6K
2
1
PC923
10U_0603_6.3V6M
2
1
PC964
1U_0402_6.3V6K
2
1
PC265
22U_0805_6.3V6M
2
1
PC264
22U_0805_6.3VAM
2
1
PC261
22U_0805_6.3V6M
2
1
PC248
22U_0805_6.3V6M
2
1
+APU_CORE
PC934
1U_0402_6.3V6K
2
1
PC949
1U_0402_6.3V6K
2
1
PC959
1U_0402_6.3V6K
2
1
PC931
10U_0603_6.3V6M
2
1
PC966
1U_0402_6.3V6K
2
1
PC281
180P_0402_50V8J
2
1
PC285
180P_0402_50V8J
2
1
PC280
180P_0402_50V8J
2
1
PC279
0.01U_0402_50V7K
2
1
PC278
0.01U_0402_50V7K
2
1
PC258
22U_0805_6.3V6M
2
1
PC247
22U_0805_6.3V6M
2
1
PC921
10U_0603_6.3V6M
2
1
PC948
1U_0402_6.3V6K
2
1
PC932
10U_0603_6.3V6M
2
1
PC965
1U_0402_6.3V6K
2
1
PC958
1U_0402_6.3V6K
2
1
2
PC271
330U_D2_2V_Y
PC947
1U_0402_6.3V6K
2
1
2
1
PC957
1U_0402_6.3V6K
2
1
PC946
1U_0402_6.3V6K
2
1
2
1
PC971
1U_0402_6.3V6K
2
1
PC945
1U_0402_6.3V6K
2
1
PC955
1U_0402_6.3V6K
2
1
Local
PC944
1U_0402_6.3V6K
2
1
PC270
330U_D2_2V_Y
+APU_CORE
PC269
330U_D2_2V_Y
PC970
1U_0402_6.3V6K
2
1
1
PC277
0.01U_0402_50V7K
2
1
PC274
0.22U_0402_16V7K
2
1
PC257
22U_0805_6.3V6M
2
1
PC268
330U_D2_2V_Y
PC273
0.22U_0402_16V7K
2
1
5
1
+APU_CORE_NB
+APU_CORE_NB
Local
D
capacitors under processor on bottom side of board
C
C
+VGA_CORE
+VDDCI
+VDDCI
+VDDCI
of
A
A
Document Number
PROCESSOR DECOUPLING
LA-8712P
56
Rev
0.1
GPU_VID3
1 PR904 1K_0402_1%
1K_0402_1% PR912
GPU_VID4
1@ PR907 1K_0402_1%
14
1K_0402_1% PR911 @
14
1 PR903 1K_0402_1%
14
1@ PR901 1K_0402_1%
+3VS
GPU_VID2
14
GPU_VID4
GPU_VID1
GPU_VID3
GPU_VID1
1K_0402_1% PR910 @ 1
1K_0402_1% PR909
GPU_VID2
15,25,27,48,52,53
PXS_PWREN
PC902
220P_0402_25V8K
PC903
0.1U_0402_25V6
2
1
1
2
PC920
10U_0805_25V6K
2
1
PC901
68P_0402_50V8J
2
1
PQ901
+VGA_CORE
+
2
1
+
2
1
+
2
PC999
330U_D2_2V_Y
PC998
330U_D2_2V_Y
PC910
680P_0603_50V8J
3
2
1
PC997
330U_D2_2V_Y
PC996
330U_D2_2V_Y
PR906
4.7_1206_5%
5
4
PQ903
3
2
1
5
PQ902
33
AGND
3
2
1
CSCOMP
AGND
PL902
0.36UH_PCMC104T-R36MN1R105_30A_20%
1
2
Ipeak=59A
Imax=45.7A
F=300kHZ
Total capacitor
1460u
ESR=1.8m ohm
1
1
PC914
560P_0402_50V7K
PR934
220K_0402_1%
2
1
2
PC913
1000P_0402_50V7K
1
3
PR935
80.6K_0603_1%
PC911
1000P_0402_50V7K
16
CSREF
PC919
10U_0805_25V6K
2
1
PC917
10U_0805_25V6K
2
1
1
1
VGA_VCC
VID6
27
26
VID5
VID4
VID3
29
VID2
28
LLINE
CSFB
15
PC915
2.2U_0603_10V6K
17
PC918
10U_0805_25V6K
2
1
PR920
1
25
PR919
PR917
PR918
1
PR916
1
PR915
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
PR914
1
1
30
2
PR928
301K_0402_1%
1
14
IREF
2
PR927
237K_0402_1%
1
VGA_RPM
VGA_IREF
2
PR926
80.6K_0402_1%
1
+5VS
VGA_RAMP-1
+VGA_B+
PR930
1K_0402_1%
2
1
VGA_DRVL
2 PR939 1
0_0603_5%
B+
VGA_CSCOMP
Connect to input caps
VGA_CSFB
VGA_CSCOMP 1
PR925
9.53K_0402_1%
VID1
EN
ILIM
PR922
39.2K_0402_1%
VGA_SW
PC909
PR905
0.22U_0603_25V7K
2VGA_BOOST-11
2
2.2_0603_5%
PR937
2
1
0_0603_5%
18
PGND
GPU
PC906
1000P_0402_50V8J
VGA_DRVH
21
19
DRVL
COMP
VGA_ILIM 8
PR921
1K_0402_1%
PL901
HCB2012KF-121T50_0805
1
2
PL903
HCB2012KF-121T50_0805
1
2
RAMP
2VGA_COMP-1
1
RT
13
FB
VGA_VCC 7
12
VGA_COMP 6
VGA_RAMP
VGA_FB
PC905
10P_0402_25V8K
22
20
PVCC
2
1
PR929 422K_0402_1%
ADP3211AMNR2G_QFN32_5X5
RPM
VCC_GPU_SENSE
SW
FBRTN
17
CLKEN#
11
PC907
1500P_0402_50V7K
23 VGA_BOOST 1
DRVH
PC916
1U_0603_10V6K
24
BST
PR924
0_0402_5%
2
1
PR936
10_0603_1%
IMON
10
2
VSS_GPU_SENSE
+VGA_B+
PWRGD
17
+5VS
VCC
VGA_PWRGD
PR923
0_0402_5%
2
1
27
@ PR938
66.5K_0402_1%
1
2
PC908
1000P_0402_50V7K
VGA_RT
PU900
PR908
1K_0402_1%
31
+3VS
VID0
PR913
0_0402_5%
2
1
32 VGA_EN
PC904
0.1U_0402_16V7K
1
2
PR933
80.6K_0402_1%
1
2
+3VS
PC912
1000P_0402_50V7K
2
PR931
PR932
LL
PR932
0_0402_5%
@ PR931
0_0402_5%
VGA_CSCOMP
2009/10/02
Issued Date
Compal Secret Data
Deciphered Date
2010/10/02
Title
+VGA_COREP
Size
Date:
Document Number
Rev
0.1
LA-8712P
Sheet
56
H
of
56

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A

AMD Comal Platform

Compal Electronics, Inc.

Compal Secret Data

ATI Chelsea Pro M2

AMD FS1R2 APU

1.5V DDRIII 1333/1600MHz

ML for FCH VGA

USB 2.0 Port 8

Card Reader/Gbe Lan

SYS BIOS (4M)

Power/B with LED

Power On/Off CKT.

USB 2.0 Port 10,11

Compal Electronics, Inc.

Compal Secret Data

USB 3.0 Port 0,1

USB 2.0 Port 12

USB 3.0 Port 2

CPU FS1 SOCKET

Compal Electronics, Inc.

Compal Secret Data

CLOCK / DISPLAY DISTRIBUTION

Monday, November 28, 2011

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Voltage for On-die VGA of APU

0.95-1.2V switched power rail

0.95-1.2V switched power rail

0.75V switched power rail for DDR terminator

0.935V switched power rail for VGA

1.1V switched power rail for FCH

1.1V switched power rail for FCH

1.2V switched power rail for APU

1.5V power rail for CPU VDDIO and DDR

1.5V switched power rail

1.8V switched power rail

2.5V for CPU_VDDA

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

Part Number = DA80000SH00

Board ID / SKU ID Table for AD channel

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

BOM Option Table

x = 1 is read cmd, x= 0 is writee cmd.

External PCI Devices

ADI ADM1032 (GPU)

VGA Internal Thermal

Compal Electronics, Inc.

Compal Secret Data

AMD APU FS1R2

VDD CORE 60A

RAM DDRIII SODIMMX2

FCH AMD Hudson M3

LAN /Card reader

POWER DELIVERY CHART

Compal Secret Data