Microcontrollers

A microcontroller is basically a single chip microcomputer. It

generally contains a Central Processing Unit (CPU), Read / Write
memory that is usually Random Access Memory (RAM), Read Only
Memory (ROM) and Input / Output devices (I/O)
The device works in exactly the same way as a PC but is simply on a
smaller scale. A microcontroller would be used in an embedded
application such as Microwave Oven, Burglar alarm, Washing
machine, Smart Card, engine management, anti-lock breaking etc.
The devices are programmed in the same way as usual in that you
would write the code in either a high level language such as C, or
use assembly language. In order to write the code in C, a compiler
that will generate code for that specific microcontroller is required;
the C compilers you have used during the course so far only
generate code for the Intel 8086 family of processors.
The most appropriate programming tool is the choice of the
developer. If the code is only going to be short, or speed is a real
issue, or memory is at a premium then assembly language may be
the best approach.
There are dozens of different microcontrollers on the market and
most of the major chip manufacturers such as Intel and Motorola
manufacture their own devices. However, a company called
Microchip specialises in microcontrollers and offers a very wide
range of devices. The device we will be using for the rest of the
module is the Microchip PIC16F877. However, other than the
number of devices the part supports and the amount of memory
available, the rest of the detail is applicable to any of the 16 series
PIC microcontrollers so often the PIC16x is referred to as it is the
same for all parts in that range such as the 16F877, 16F84 and others
in this series.

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PIC16F877
The PIC16x series family uses a Harvard architecture (see Figure
16). This architecture has the program and data accessed from
separate memories so the device has a program memory bus and a
data memory bus. This improves bandwidth (data throughput) over
traditional von Neumann architecture where program and data are
fetched from the same memory (accesses over the same bus).
Separating program and data memory further allows instructions to
be sized differently than the 8-bit wide data word. PIC16x op-codes
are 14-bits wide, enabling single word instructions. The full 14-bit
wide program memory bus fetches a 14-bit instruction in a single
cycle. A two-stage pipeline overlaps fetch and execution of
instructions, this is illustrated in Figure 15.

Figure 15 - PIC 2 stage pipeline

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Figure 16 - PIC 16F877 series architecture

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This architecture enables all instructions to execute in a single cycle
(200 ns @ 20 MHz) except for program branches. All program
memory is internal. The PIC16x can directly or indirectly address
its register files (data memory). All special function registers
including the program counter are mapped in the data memory area.
The instruction set makes it possible to carry out any operation on
any register using any addressing mode - unlike the Intel processor.
E.g. Intel cant do memory to memory move.
PIC16x devices contain an 8-bit ALU and a single working register
called W. The ALU is a general purpose arithmetic unit. It performs
arithmetic and Boolean functions between data in the working
register and any register file. The ALU is 8-bits wide and capable of
addition, subtraction, shift and logical operations.
Unless otherwise mentioned, arithmetic operations are two's
complement. In two-operand instructions, typically one operand is
the working register (W register), and the other operand is a file
register or an immediate constant. For example:
movf

EEDATA,w

In single operand instructions, the operand is either the W register or

a file register, for example:
movlw 55h
movwf EEADR

The W register is an 8-bit working register used for ALU

operations. It is not an addressable register as can be seen in the
architectural diagram.

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Memory organisation
There are three memory blocks in the PIC16x (refer to Figure 16).
These are the program memory (flash memory holding program
code), data memory (holding variables and special finction registers)
and EEPROM which is read / write but non-volotile so is used to
store things like how much credit your phone card has on it. Using
this memory is dealt with on page 114.
The data memory contains two parts: general purpose RAM
(implemented as individually accessible regiaters) and the Special
Function Registers (SFRs).
Data memory

The data memory is partitioned into two areas. The first is the
Special Function Registers (SFR) area, while the second is the
General Purpose Registers (GPR) area (effectively system RAM).
The SFRs control the operation of the device and the larger
microcontrollers with more functionality have more of these
registers to acces the extra hardware. Portions of data memory are
banked. Banking requires the use of control bits for bank selection.
These control bits are located in the STATUS Register bits RP0 and
RP1.
Instructions MOVWF and MOVF can move values from the W
register to any location in the register file (F), and vice-versa. The
entire data memory can be accessed either directly using the
absolute address of each register file or indirectly through the File
Select Register (FSR). Indirect addressing uses the present value of
the RP1:RP0 bits for access into the banked areas of data memory.
Figure 17 illustrates the data memory structure.
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Figure 17 - PIC 16F877 data memory structure

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Bank 0 is selected by default or by clearing the RP0 and RP1 bits in
the status register. The binary value of these bits indicates which
register bank is active. Setting the RP1 and RP0 bits to 01 selects
Bank 1. Each Bank extends up to 7Fh (128 bytes). The first 32
locations of each Bank are reserved for the Special Function
Registers and the remainder are General Purpose Registers
implemented as static RAM. Note: Registers F0 to 7F are accessible
from any of the register banks so the total user RAM is: 96 bytes in
bank0, 80 in bank1, 96 in bank 2 and 96 in bank 3 = 368 bytes.
Each GPR is 8 bits wide and is accessed either directly or indirectly
through the File Select Register (FSR).
Program Memory

The PIC16x has a 13-bit program counter capable of addressing an

8K x 14 program memory space. The 16F877 implement all 8k
whereas other parts implement less. Accessing a location above the
physically implemented address will cause a wrap-around.
The reset vector is at 0000h and the single interrupt vector is at
address 0004h.
The following diagram illustrates the layout of all the SFR's and
their individual bit allocation.

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Figure 18 - Special function registers summarised

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Figure 19 More Special function registers summarised

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Figure 20 Even more Special function registers summarised

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Microcontrollers
Before attempting to program the device it is necessary to
understand the operation of some of the key registers in the SFR set.
Status Register

The main bits to watch out for in here are the IRP, RP1 and RP0 bits
as they are used to select register banks. The default values at startup and on reset are all zero. LEAVE IRP and RP1 at zero. We will
only be concerned with RP0 initially as we can manage most thing by
accessing onlybanks 0 and 1.

Figure 21 - Status register bits in more detail

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The status register may be written to but Power Down and Timeout
bits are read only. If an instruction used to write to the register
causes any of the flags to change, the three status bits will be
disabled during the write and reflect the result of the instruction. It
is therefore safer to only use the BCF and BSF to access the
individual bits or use SWAPF and MOVWF as they do not affect the
status register bits.
Stack

The PIC16x has an 8 deep x 13-bit wide hardware stack. The stack
space is not part of either program or data space and the stack
pointer is not readable or writable. The entire 13-bit PC is pushed
onto the stack when a CALL instruction is executed or an interrupt
is acknowledged. The stack is popped in the event of a RETURN,
RETLW or a RETFIE instruction execution. The stack operates as a
circular buffer. That is, after the stack has been pushed eight times,
the ninth push over-writes the value that was stored from the first
push. The tenth push overwrites the second push (and so on). If the
stack is effectively popped nine times, the PC value is the same as
the value from the first pop. Note: There are no instruction
mnemonics called push or pop. These are actions that occur from
the execution of the CALL, RETURN, RETLW, and RETFIE
instructions, or the vectoring to an interrupt address.
Note: There are no status bits to indicate stack overflow or stack
underflow conditions.

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PIC 16x instruction set
Mnemonic
ADDLW k
ADDWF
f,d
ANDLW k
ANDWF
f,d
BCF
f,b
BSF
f,b
BTFSC f,b
BTFSS f,b
CALL
k
CLRF
f
CLRW
CLRWDT
COMF
f,d
DECF
f,d
DECFSZ f,d
GOTO
k
INCF
f,d
INCFSZ f,d
IORLW k
IORWF
f,d
MOVF
f,d
MOVLW k
MOVWF
f
NOP
RETFIE
RETLW k
RETURN
RLF
f,d
RRF
f,d
SLEEP
SUBLW k
SUBWF f,d
SWAPF f,d
XORLW k
XORWF f,d

Description
Add literal and w
Add w and f
AND literal with w
AND w with f
Bit clear f
Bit set f
Bit test skip if 0
Bit test f skip if 1
Call subroutine
Clear f
Clear w
Clear watchdog timer
Complement f
Decrement f
Dec f, Skip if 0
Goto address
Increment f
Inc f, Skip if 0
Inc OR Lit with w
Incl OR w with f
Move f
Move literal to w
Move w to f
No operation
Ret from interrupt
Ret with lit in w
Ret from subroutine
Rot left thru C
Rot right thru C
Go into standby mode
Subtract w from lit
Subtract w from f
Swap nibbles in f
XOR lit with w
Excl OR w with f

Cycles
1
1
1
1
1
1
1(2)
1(2)
2
1
1
1
1
1
1(2)
2
1
1(2)
1
1
1
1
1
1
2
2
2
1
1
1
1
1
1
1
1

14 bit op-code
11 111x kkkk
00 0111 dfff
11 1001 kkkk
00 0101 dfff
01 00bb bfff
01 01bb bfff
01 10bb bfff
01 11bb bfff
10 0kkk kkkk
00 0001 1fff
00 0001 0000
00 0000 0110
00 1001 dfff
00 0011 dfff
00 1011 dfff
10 1kkk kkkk
00 1010 dfff
00 1111 dfff
11 1000 kkkk
00 0100 dfff
00 1000 dfff
11 00xx kkkk
00 0000 1fff
00 0000 0xx0
00 0000 0000
11 01xx kkkk
00 0000 0000
00 1101 dfff
00 1100 dfff
00 0000 0110
11 110x kkkk
00 0010 dfff
00 1110 dfff
11 1010 kkkk
00 0110 dfff

kkkk
ffff
kkkk
ffff
ffff
ffff
ffff
ffff
kkkk
ffff
0011
0100
ffff
ffff
ffff
kkkk
ffff
ffff
kkkk
ffff
ffff
kkkk
ffff
0000
1001
kkkk
1000
ffff
ffff
0011
kkkk
ffff
ffff
kkkk
ffff

Stat bits
C,DC,Z
C,DC,Z
Z
Z
None
None
None
None
Z
Z
TO,PD
Z
Z
None
None
Z
None
Z
Z
Z
None
None
None
None
None
None
C
C
TO,PD
C,DC,Z
C,DC,Z
None
Z
Z

Figure 22 - PIC 16x Instruction set with binary op-codes

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