VLSI Batch Feb15

The World of VLSI
Yesterday, Today & Tomorrow
By:
Yogindra S. Abhyankar
Associate Director
Hardware Technology Development Group
2015, Centre for Development of Advanced Computing, Pune
The World of VLSI

History of the Integrated Circuit (IC) design
The IC Technologies
About C-DAC
History of the IC design

In 1947 Transistor was invented & demonstrated
@ Bell Labs
The first IC appeared in the market in 1961

~14 years after the transistor
Flip-flop: 2 transistors & resistors
Cost ~$100
The Silicon Technology is Growing...

Now on the same amount of Silica
> 500 times faster operations
> 10 million transistors, 1/2 mile of interconnect
Cost few cents!!!
The Technology changes compared to the IC Design cycle
Moores Law
In 1965, Gardon Moore stated that the
silicon technology will double the number
of transistors on a chip every 2 * years!!!
And it is happening !!!!!!
The Search of products

How to reduce the high designing cost for future
success of this technology ??? : 1968 Noyce
- Reduce the cost of design process
- Find product with large market
- Regular structure, Many applications

Semiconductor
Memory Chip
1968 :Noyce, Moore & Grove Forms Intel !!

Microprocessor Technology
Processor
computing power
Logic
+
Memory
Software
market
capacity
Microprocessor = IC Tech + Software

The First Computer
The Babbage
Difference Engine
(1832)
Mechanical Computer
25,000 parts
cost: 17,470
ENIAC - The first electronic computer (1946)

Valve Based
Wafer
-12 Inches (300 mm)-
Acknowledgment: Intel
Advantages of VLSI ?
Intel 4004 4-bit Micro-Processor

(2300 Transistors, 108 KHz)
Intel 386 Processor 32-bit

(275,000 Transistors, 16 MHz)
Acknowledgment: Intel
Advantages of VLSI ?
Less AREA (compactness at system levels)

Less POWER Consumption
Less TESTING (more complex testing)
Higher RELIABILITY
(due to improved on-chip interconnects)
Higher SPEED (due to reduced interconnect length)
Significant COST SAVINGS
The goal of the IC designer

Meet the market requirements
Satisfying customers need
Beating the competition
Increasing performance or functionality of the product
Reducing cost compared to the available solutions
Achieved by:
Using next generation Silicon technologies
New design concepts & tools
High level of integration
The Design is an optimization problem with parameters as

Technology, Time, Cost and Customer requirements
The World of VLSI

History of the IC (Integrated Circuit) design
The IC Technologies
About C-DAC
Classification of IC Technology
Based on Number of Devices used (FET)
Based on Feature size of the process
Based on Number of Devices used (FET)
Type Devices
SSI
MSI
LSI
VLSI
VVLSI
Year Function
1-100
1960
100-1000
1965
1000-10000 1970
10000-100000 1975
100,000+ Billion+ Transistors
(109
Gates, Op-amp, Linear

Registers, Filters
Microprocessors, A/D
Memory,Computers,DSP
System on a chip
Based on the Feature size of the process

Manufacturing capability (lithography resolution) How
Metal
small ?
Oxide
Semiconductor
Source
Gate
First IC
Drain
25
n
Feature Size
Gate Length L/
Metal 1 pitch
1970-80
1990-2006
2006-09
2011
2013
(future)
W
n
p substrate
5
0.75 0.25 0.18...
65 nm, 45 nm, 32 nm
22 nm
14 nm Fab
11 nm, 8 nm, 5.5 nm
Deep Sub-micron
processes
Feature size reduction
~ x 0.7 / 3 year
Acknowledgment: ITRS,
Intel
Dennard Scaling:Constant Field Scaling

Predicts an increase in speed & low
power consumption of digital MOS
circuits when critical dimensions are
scaled down - 1974
[Earlier responsible for
Moores law to remain valid]
Processor Feature Sizes

1
286 (1.5 )
6 MHz, 134K
386 (1.5 )
0.1
16 MHz , 275K
486 (1.0 )
25MHz, 1.2M
Quad-core/8 core Xeon

(65 nm) 2.66GHz,
Pentium(0.8 )
(45 nm) >3GHz
66 MHz, 3.1M
Pentium Pro/P6 (0.6 )

0.01
200 MHz, 5.5M
64-bit IA-64
60+ cores
Xion Phi
(22 nm)
Itanium 2 (0.13 )
1GHz, 220M
Dual core-Xeon (65nm)

2.9GHz, 291M
Dual core-Itanium2(90nm)
1.66GHz, 1.7B
1985
1990
1995
2000
2005
2012
0.001
Year --->
MULTI-CORE => MANY-CORE
Power Dissipation
Lead Microprocessors power continues to increase
100
Power (Watts)
P6
Pentium proc
10
8086 286
1
4004
8008
486
386
8085
8080
0.1
1971
1974
1978
1985
1992
2000
Year
Power delivery and dissipation will be prohibitive

Courtesy, Intel
Power Density
Power Density (W/cm2)
10000
Rocket
Nozzle
1000
Nuclear
Reactor
100
8086
Hot Plate
10 4004
P6
8008 8085
Pentium proc
386
286
486
8080
1
1970
1980
1990
Year
2000
2010
Courtesy, Intel
Power density too high to keep junctions at low temp (if we progress as it is)
Power & Clock Frequencies

Target: Device with less power consumption..
Power consumption & Clock frequencies are related, for CMOS
circuits:
fCV 2
P
2
where, C = Capacitance
V= Power supply voltage
f = Clock Frequency
Solution:
Reduce supply voltage
2 to 3 volts common; now ~ 1 Volts
Transistor Sizing (faster switching),
Turn off clock at unused points,
Reduce delay in critical path/ Interconnect RC time
Perform more operations in a single clock (Pipelining)
Clock Distribution
Defining the clock is an important aspect for
high speed chip designs
Clock net is the most power hungry net on
the chip (~ 30% of total power consumed)
Clock distribution
(continued..)
Solution:
Use clock tree/mesh design tools /algorithms
/methods
What they do ?
1) Place clock & clock buffers at proper points
2) Develop interconnect geometry connecting CLK
to all cells on the chip that uses CLK, FF, latches.
cost : ~ $30,000- 150,000
=> Low power consumption & Clock skew minimization
Design Approaches
Custom
full control of design
best results, slowest design time.
Semi-custom (std cell)

use Cell libraries from vendor
cad tools, faster design time
EPLA/EPLD - FPGA
Electrically Programmable (in the Field)
ASIC (Application Specific Integrated Circuit)

Implements custom functions according to description
Not off-the-shelf
Can be described in HDL (Verilog,VHDL)

in an abstract technology Independent fashion
Verified using a simulator

Analogous to software debugger
Constructed out of logical function cells

(AND,OR) and Re-Usable Macro
Building blocks (ADDERs, REGISTERs)

Mapped or translated using Synthesis products
Implemented in
Field Programmable, Standard Cell or Gate Array families
For high volume production

Designers pay CAD vendors ~$50K - $500K for Design tools
Designer pay foundry ( ~ $200K - .5M) and per part agreement
Field Programmable Gate Array (FPGA)

A chip that can be configured by
a user to implement different
digital logic circuits
Logic
block
Interconnection switches
I/O
Invented
FPGA
in 1984
Configurable
I/O
I/O
FPGA building blocks:

Programmable logic blocks
Programmable interconnect
I/O
Typical FPGA Technology, Speed and Size
Virtex-6
40 nm
Xilinx Device Complexity
High Density &

Performance with
Low Power & cost
Virtex-II Pro
450 MHz
8M gates
4 Power PC
XC4085XL
Virtex
200 MHz
1M gates
Virtex-E
240 MHz
4M gates
1.8V
XC2000
2014-15
50 MHz
1K gates
5V
1995
Virtex-4
500 MHz
16M gates
90 nm
Virtex-5
550 MHz
24M gates
65 nm
Virtex
UltraScale
20 nm
100 MHz
125K gates
2.5V
1985
Virtex-7
28nm
1998
1999
2000
2002
2004
2007 2009 2012
COREs
What are these?
Ready-made logic blocks, critical for high density designs
of FPGAs or ASICs with 50K+ gates
Advantages ?
No re-invention => reduced design time => fast time to market
Fully verified proven blocks => Proven performance
=> lowest design risk
Available for bus interfaces (PCI, PCMCIA etc.), memory
interfaces, processors, DSPs and communication functions
Help from Computer Aided Design tools

Tools
Editors
Simulators
Libraries
Module Synthesis
Place/Route
Chip Assemblers
Silicon Compilers
Experts
Logic design
Electronic/circuit
design
Device physics
Artwork
Applications system design
Architectures
Typical Design Flow

Design Concept
Simulation for
concept verification
VHDL/Verilog entry
Logic Synthesis
Placement
Routing
Extraction
Logic Synthesis
& Rule
checking
Simulation to verify physical design
Mask order
Design Abstraction Levels

SYSTEM
HDL is useful in describing a circuit
CLK
System Level
MODULE
Registers,memory, clk, logic & arithmetic fn
Behavioral Level
GATE
Functional
Register Level
CIRCUIT
Logic Level
Circuit Level
DEVICE
Layout Level
G
S
n+
D
n+
Design Integration
HDL
Schematic
Existing netlists
COREs
Design source
Integration
Design Integration advantages

in a design cycle:
- Allows team based development
Verification
Standard
based
VHDL
Verilog
EDIF
SDF
Knowledge driven
implementation
- Enable multiple EDA tools

IC
- For complex high density designs
Low Power Computing

In terms of algorithms, architectures, and circuits
has received significant attention and research
over the last decade.
The implementation can be categorized into
system level, algorithm level, architecture level,
circuit level, and process/device level.
Analog/Mixed Signal Design

Circuits include analog and digital designs
On-chip analog components ~ doubling every 3 years
(18 months for digital circuits -- Moores law)
Increased on-chip Analog components due to competitiveness

in applications (modems, wireless, disk drives,..)
Mixed signal devices and process pose design problems

At clock frequencies > 50 MHz, digital signals start taking analog character
Analog cells depends more on physical layout compared to digital cells
RF design with their high freq. operations ( >1 GHz) and small signals (~1 V)
There is a version of VHDL, VHDL-AMS to cater the analog & mixed

signal designs!!
Emerging Logic
Devices & Materials
New
Signal Transport Mechanism
Mathematics
Architecture/Systems
Vacuum Channel Transistor

(Tera-Hz)
(2012-14.. )
Presently proven in lab 460 GHz

10x faster
Electrons travel freely in Vacuum
Mean free path 200 nm
Vacuum Tube Drawback
Must maintain High vacuum to avoid
collision between electrons & gas molecules
Breaks, Power hungry
Ack: NASA Ames research
Spin Transistor
Electron SPIN experimented for
~20 yrs
Spintronics: Uses property of electron
Spin instead of charge
Spin => magnetic property
Non-volatile memory
Logic
Very low power consumption
Compatible with methods & material of charge based electronics

Spin Wave Device (SWD)

Nanomagnets connected by ferromagnetic wires.
Spin waves are excited in the wires and propagate along them.
Short pulses of spin waves containing a wide range of
frequencies are used.
Good for Parallel

Processing
Ack: Trinity College, Dubline

MEMRISTOR
(Memory Resistor)
(2008-14.. )
4th Fundamental electronics component
(earlier Resistor, capacitor, Inductor)
Current flowing through memristor alter its
electrical resistance
Retain the altered state even after the current is
turned off (memory property)
Apply Voltage V1, gives resistance level-1
Voltage V2 gives resistance level-2
6 state MEMRISTOR
Ack: Trinity College, Dubline
Requires only single voltage (6 times)
More than Moore Technologies

MEMS Micro Electro Mechanical Systems
& NEMS (Nano EMS)
Micro
Mechanics
Micro
Magnetics
Micro
Electronics
Static or Movable components
Accelerometer
Pressure sensors
Micro lenses
Medical instruments
communications
Dimensions: Microns - nano

Micromachined sensors, actuators, and systems

Enabled by many transduction mechanisms :
electrical, magnetic, thermal, optical, fluidic, biological
Pressure Sensor
NovaSensor
Electrostatic
Microactuator
500 m
Accelerometer Chip
Elcro Mechanical subpart IC
DMD Digital Mirror Device
Individual tilting Al mirrors

Electrostatic Forces
Microfabricated on CMOS
Metal / Polymer MEMS Process
DMD
Texas Instruments
Digital Micromirror Device
Nano Wire Electronics

Transistor Length (<100 nm) nano Era Began 1999
CMOS will scale to another 12-15 yrs
Nano electronics devices
Devices using
Molecular electronics
Quantum effects in solid state
nanotubes, nanowires Q.dots
Carbon Nano-tubes
Long meshed wires of carbon

Tube-shaped molecules made of carbon atoms, one nanometer
(around three atoms) thick or 50,000 times thinner than a human
hair
Metallic or Semiconducting (based on geometry)
Mechanically Stiff
Might even be superconducting
Molecular Electronics
Molecules showed
Oxidation/Reduction (Redox)
charge transport properties
that can be used for memory
storage
Properly designed molecules
can have multi-bit storage
New Transistor: Top Gate Organic FET

Researchers demonstrated
transistor for plastic electronics
Ack: Georgia Tech
Biologically inspired computing :

Efficient & New algorithms
Inspired by biological systems
will drive development of high
efficient Integrated Circuits
Acknowledgment: H Iwai
Programmable Material
Very Interesting from Nature
Touch me not plant
Programmable Material
Using Composite
Carbon, Fibre, Wood.

Self regulatory based on in-take value
Local curvature/shape when subject to
heat, light, moisture,..
Ack: E Lee Korea
MIT lab USA
Imagine if you can change the structure of

a device, properties of your PCB or
nano switch...!!!
Design for Test and Characterization

Testing is required to insure the working of an IC as per specifications
TESTING
2. On chip
- Uses additional silica
- May require test pins on the IC
- High test development cost
1. Off Chip (ext. Test)
(40% of design time)
- Difficult for complex logic
Design for Test and Characterization

Verification is required to insure the design is as per specification
1. General approach:
Prepare test vectors and tryout on
the completed design
2. Better approach:
Create a design that can be tested

efficiently, called Design For Test
(DFT)
Future approach:
Design For Characterization (DFC)
Sort of stress test; pushing system to

its limit & testing its behavior
The World of VLSI

History of the IC (Integrated Circuit) design
The IC Technologies
About C-DAC
C-DAC
Established in 1988, under MCIT, Government of India
11 centers across India
C-DAC is in several areas in computing:
High Performance Computing (PARAM)

Language Technology & Applied AI
Training
e-Governance
Embedded Technologies, Power Electronics, VLSI
~ 2500 employees
PARAM over the years
Greenest
Supercomputer of
India
Peak Perf.
500 TF
50 TF
1 TF
PARAM Padma
(2 TF Cluster
PARAMnet-II)
100 GF
PARAM Yuva-II
(540 TF Cluster
PARAMnet-3)
PARAM Yuva
(54 TF Cluster
PARAMnet-3)
PARAM 10000
(100 GF Cluster
PARAMnet-I)
10 GF
PARAM 9000
(2 GF MPP)
1 GF
PARAM 8000 (100

MF MPP)
1991
1995
1998
2002
2008
2013
MULTI DISCIPLINARY APPLICATIONS

Seismic
Data Processing
10
Computational Fluid
Dynamics
Space Science
& Technologies
Image Processing
Remote Sensing
Data
Warehousing
Structural
Mechanics
Scientific
Applications
Medical
Imaging
Computational
Atmospheric
Sciences
Molecular
Modeling
Bio-informatics
Computational
Chemistry
C-DAC HW Technologies
System Area Network (SAN)
High Speed interconnect
Reconfigurable Computing
Accelerating Applications
Diploma in VLSI Design

Duration:
5 1
2 Months
Modules:
Advanced Digital Design

System Architectures
High Level Design Methodology (HDLs)
CMOS VLSI Design
Project
Eligibility
Qualifications
MTech/ BTech/ ME/ BE in Electronics /MSc
(electronics-specialization)
Experience (Not mandatory)

Digital Design preferred
Skills
Digital design, computer programming
Module 1: Advanced Digital Design
Digital Logic families

Combinatorial logic design
Sequential logic design
State machines
Programmable logic
Module 2: System Architectures

System building blocks
Overview of standards
PCI-Express, USB, firewire etc
Issues in system level design
Module 3: High Level Design Methodology
VHDL and Verilog (HDLs)

Synthesis issues
Test benches
FPGA Architecture
Module 4: CMOS VLSI Design

Introduction to CMOS technology
CMOS logic structures/building blocks
Circuit layout & simulation
Module 5: Project
Relevant to the Industry
Sample topics: (modular implementations)
PCI, USB, firewire etc technologies
Global Semiconductor projections

Asia Pacific continues to dominate among the 4 major
world regions (America, Europe, Japan, Asia pacific) in
terms of semiconductor market projected in 2016 to
reach US$208 billion
Among the semiconductor categories (Discrete,
optoelectronics, sensors and Integrated Circuits), the
integrated circuit continues to dominate with world
wide market of US$ 291.6 billion
Ack:: World Semiconductor Trade Statistics organization,
Conclusion
Very Large Scale Integration (VLSI) is a challenging
field with great potential
The designs are complex, and we need to use design
techniques and sophisticated tools to manage the
complexity of the design
The Diploma in VLSI offered by C-DAC provides a
launch-pad for electronics professionals, otherwise
opting for pure Software careers
Ack:: World Semiconductor Trade Statistics organization,

VLSI Batch Feb15

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The World of VLSI

Yesterday, Today & Tomorrow

The World of VLSI

2015, Centre for Development of Advanced Computing, Pune

History of the IC design

The first IC appeared in the market in 1961

The Silicon Technology is Growing...

2015, Centre for Development of Advanced Computing, Pune

The Search of products

- Regular structure, Many applications

1968 :Noyce, Moore & Grove Forms Intel !!

Microprocessor = IC Tech + Software

The First Computer

ENIAC - The first electronic computer (1946)

2015, Centre for Development of Advanced Computing, Pune

-12 Inches (300 mm)-

Intel 4004 4-bit Micro-Processor

Intel 386 Processor 32-bit

2015, Centre for Development of Advanced Computing, Pune

Less AREA (compactness at system levels)

2015, Centre for Development of Advanced Computing, Pune

The goal of the IC designer

The Design is an optimization problem with parameters as

The World of VLSI

2015, Centre for Development of Advanced Computing, Pune

Gates, Op-amp, Linear

2015, Centre for Development of Advanced Computing, Pune

Based on the Feature size of the process

2015, Centre for Development of Advanced Computing, Pune

Dennard Scaling:Constant Field Scaling

2015, Centre for Development of Advanced Computing, Pune

Processor Feature Sizes

Quad-core/8 core Xeon

(45 nm) >3GHz

Pentium Pro/P6 (0.6 )

200 MHz, 5.5M

Dual core-Xeon (65nm)

MULTI-CORE => MANY-CORE

2015, Centre for Development of Advanced Computing, Pune

Power delivery and dissipation will be prohibitive

Power & Clock Frequencies

2015, Centre for Development of Advanced Computing, Pune

best results, slowest design time.

Semi-custom (std cell)

2015, Centre for Development of Advanced Computing, Pune

ASIC (Application Specific Integrated Circuit)

Can be described in HDL (Verilog,VHDL)

Verified using a simulator

Constructed out of logical function cells

Building blocks (ADDERs, REGISTERs)

For high volume production

Field Programmable Gate Array (FPGA)

FPGA building blocks:

Typical FPGA Technology, Speed and Size

Xilinx Device Complexity

High Density &

2015, Centre for Development of Advanced Computing, Pune

2007 2009 2012

Help from Computer Aided Design tools

2015, Centre for Development of Advanced Computing, Pune

Typical Design Flow

Simulation to verify physical design

Design Abstraction Levels

HDL is useful in describing a circuit