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I/O Organization

UNIT - V

Memory-mapped I/O
I/O mapped I/O

Synchronous Bus
Asynchronous Bus
Asynchronous serial character transmission.
Synchronous Transmission
Isochronous Transmission
Parallel Interface (printer)
Serial Interface
serial interface provides the UART (Universal Asynchronous Receiver/Transmitter
8251)

RS-232 serial cable.


Programmed I/O
Interrupt-Driven I/O (8255, 8259)
Direct Memory Access (8237)
Data Communication Channels (simplex, half duplex and Full duplex)

Interrupts are often divided into synchronous and asynchronous interrupts :

Synchronous interrupts are produced by the CPU control unit while executing
instructions and are called synchronous because the control unit issues them
only after terminating the execution of an instruction.
Asynchronous interrupts are generated by other hardware devices at arbitrary
times with respect to the CPU clock signals.
Not related to instruction being executed.

Intel microprocessor manuals designate synchronous and asynchronous


interrupts as exceptions and interrupts, respectively

Interrupts and Exceptions -Pentium


Interrupt descriptor table - IDT
IDTR - Interrupt descriptor table register- 48 bits
LIDT (Load IDT register) loads the IDTR register with the base address
and limit held in the memory operand.
SIDT (Store IDT register) copies the base and limit value stored in IDTR to
memory.

256 descriptors. Each entry corresponds to an interrupt or an exception vector and


consists of an 8-byte descriptor. Thus, a maximum of 256 x 8 = 2048 bytes are
required to store the IDT.
The IDT may contain any of three kinds of descriptors:
Task gates
Interrupt gates
Trap gates

There are two sources for interrupts and two sources for exceptions:
1. Interrupts
Maskable : Received on the processors INTR pin. The processor
does not recognize a maskable interrupt unless the interrupt enable flag
(IF) is set.
Nonmaskable interrupts : Received on the processors NMI pin.
Recognition of such interrupts cannot be prevented.
2. Exceptions
Processor-detected exceptions: Results when the processor
encounters an error while attempting to execute an instruction. These are
further classified as faults, traps, and aborts.
Faults correctable; offending instruction is retried
Traps often for debugging; instruction is not retried
Aborts major error (hardware failure)

Programmed exceptions: INTO and BOUND instructions may trigger


exceptions. These instructions often are called "software
interrupts," but the processor handles them as exceptions.

Exception Classifications POWER PC


Synchronous, preciseThese are caused by instructions. All instructioncaused exceptions are handled precisely; that is, the machine state at the time
the exception occurs is known and can be completely restored.
Synchronous, impreciseThe PowerPC architecture defines two imprecise
floating-point exception modes, recoverable and non recoverable.
Asynchronous, preciseThe external interrupt and decrementer
exceptions are maskable asynchronous exceptions that are handled precisely.

Asynchronous, impreciseThere are two non-maskable asynchronous


exceptions that are imprecise: system reset and machine check exceptions.
These exceptions may not be recoverable, or may provide a limited
degree of recoverability for diagnostic purpose.

POWERPC VS PENTIUM

How the 601 stacks up against Intels state-of-the-art CISC design, the
Pentium. On a basis of price, performance, and power consumption, the
PowerPC 601 compares quite favorably. The 601 delivers integer
performance that matches and floating-point performance that exceeds
Pentiums for about half the cost. In addition it consumes about half the
power of Pentium.

Frequency
Die Size
Cache
Power
Price

Pentium
66 MHz
264 mm2
16K
14 Watts
$950.00

PowerPC 601
66 MHz
120 mm2
32K
9 Watts
$450.00

What is BUS ?
A bus connects all the internal computer components to the CPU and Main
memory.

Every bus has a clock speed measured in MHz. A fast bus allows data to be
transferred faster, which makes applications run faster.
System Bus:
Connecting to CPU, memory and Cache.
Address Bus
Data Bus
Control Bus
I/O Bus: Connecting to the above three buses is the "good old" standard I/O
bus, used for slower peripherals (mice, modems, regular sound cards, lowspeed networking) and also for compatibility with older devices.

Types of I/O Buses


Parallel BUS
ISA (8-16-bit)
EISA (Extended ISA 32-bit)
VESA Local bus (VL-bus)
PCI Local bus (32 or 64-bit)
Serial Bus
USB
Fire Wire (IEEE-1394)
Interface
Parallel Printer Interface
Serial port interface

ISA BUS
Industry Standard Architecture (Developed by IBM)
In 1982 when ISA BUS appeared on the first PC the 8-bit ISA bus ran at a
modest 4.77 MHZ the same speed as Intel 8088.
ISA BUS is extremely slow by today's standards and not suited to the use of
a graphical operating system like Windows.
ISA bus mostly gone from the home PC, but still found in many industrial
applications.
due to low cost & number of existing cards
In 1984 the IBM AT was introduced using the Intel 80286; at this time the
bus was doubled to 16 bits (the 80286's data bus width) and increased to
8 MHz

8 bit ISA

ISA BUS Pinouts


In the figure you can see the pinouts of the
ISA BUS.
The BUS is divided into two sides. The first
side pins are named A1 to A31 and it is the
components side.
It consists of the address and data buses. The
second side pins are named B1 to B31 and it is
the solder side.

This side contents the power pins and the


signals related to interrupts and DMA
transfers.

The ISA bus connector contains


the de multiplexed address bus (A19A0) for the 1M-byte 8088
system
the 8-bit data bus (D7D0)
control signals MEMR, MEMW, IOR, and IOW for controlling I/O
and any memory placed on the printed circuit card
Memory is seldom added to ISA today because ISA cards operate at only
8 MHz.
EPROM or flash memory for setup may be on some ISA cards, but
never RAM
Other signals, useful for I/O interface, are the interrupt request lines
IRQ2IRQ7.
DMA channel 03 control signals are also present on the connector.
DMA request inputs are labeled DRQ1DRQ3and the DMA
acknowledge outputs are labeled DACK0 -DACK3.

IRQ2 is redirected to IRQ9 on modern systems, and is so labeled here


note the DRQ0 input pin is missing
early PCs used DRQ0 & the DACK0 output as a refresh signal to refresh
DRAM on the ISA card
today, this output pin contains a15.2 s clock signal used for refreshing
DRAM
remaining pins are for power and RESET

16 bit ISA
Additional connector is attached behind the 8 bit connector.
Contains 2 edge connector

16 bit ISA Bus

ISA BUS is used with sound cards, modems,disk drives or most network and
video cards

8-bit ISA(XT) CARD

16-bit ISA CARD

32 Bit EISA Bus

80386-80486 32 bit data


Problem-clocking speed remains at 8 Mhz
Most common application for the EISA bus is as a disk controller or as a
video graphics adapter.

ISA bus pin spacing is 0.1 inch


EISA bus pin spacing is 0.05 inch

VESA Local Bus


Video Electronics Standards Association
Very Long Bus (VL bus)
80486 onwards, 32 bit, 33 Mhz, high speed data transfer
3 connectors- one more connector added behind the 16 bit ISA connector.
Usually coloured a distinctive brown
VLB slot- VLB & ISA cards could be plugged (1 or 2 slots)

5 or 6 ISA slots
Video and disk interface

VESA Local Bus

ISA BUS

VESA connectors

Additional
connections converts
to 16 bit ISA

Original 8 bit ISA


connectors

Elimination of ISA Bus


ISA Bus is slow, hard to use and bulky.
ISA plug in cards to be replaced by either PCI plug-in cards or USB
add-on peripherals
Limited number of interrupts.
No central registry.
The ISA bus is limited to 32 bits of address. It means that an ISA
card that uses DMA cannot physically access memory beyond this
value.
ISA cards are more cumbersome to install than other cards because
I/O addresses, interrupts and clock speed must be set using jumpers
and switches on the card itself.

Peripheral component Interconnect Bus


64 bit data bus (Pentium onwards)
Plug- and-play (PnP) characteristics
PCI interface contains a small memory portion automatically configure the
PCI card.
Address and data buses are multiplexed to reduce the size of the edge
connector.
PCI 1.0 1992 Original issue (Developed by INTEL)
PCI 2.0 1993 Incorporated connector and add-in card specification
PCI 2.1 1995 Incorporated clarifications and added 66 MHz chapter
PCI 2.2 1998 improved readability
PCI 2.3 2002
PCI 3.0 2002 Removed support for the 5.0 volt keyed system board
connector

PCI slot

IBM, HP, and Compaq designed PCI-X for servers to increase


performance for high bandwidth devices such as Gigabit Ethernet cards,
Fibre Channel, Ultra3 Small Computer System Interface, and processors
that are interconnected as a cluster.
PCI-X (Peripheral Component Interconnect Extended) is a computer bus
technology (the "data pipes" between parts of a computer) that increases
the speed that data can move within a computer from 66 MHz to 133
MHz.
PCI Express (Peripheral Component Interconnect Express), officially
abbreviated as PCIe, is a high-speed expansion bus standard designed to
replace the older PCI, PCI-X, and AGP bus standards
Introduced in 2002 and originally known as "Third Generation I/O"
(3GIO), PCI Express (PCIe) superseded both PCI and PCI-X, and new
motherboards may come with a mix of PCI and PCIe slots or only PCIe.

Block diagram of a PCI bus system


Processor/Main Memory System
Coprocessor

CPU

Main
Memory

Cache

PCI
Bridge

Motion
Video

Audio
PCI Bus

SCSI host
adapter

Interface to
Expansion Bus

LAN
adapter

I/O

Graphics
adapter

Expansin Bus (ISA/EISA)

Bus Slot

Bus Slot

Bus Slot

Bus Slot

Bus Structure of Intel Pentium


Pentium
CPU
CPU bus: fast (100 MHz, 64 bits) [10 nsec./cycle]

PCI
Controller

Cache

Memory

North Bridge

PCI bus: fast (33 MHz, 32/64 bits) [30 nsec./cycle]

Video
Adapter

System
ROM

Disk

South Bridge
Expansion
Bus
Controller
ISA bus: slow (8 MHz, 8/16 bits) [125 nsec./cycle]

RTC

Keyboard

Serial
Port

Parallel
Port

Floppy
Disk

Configuration Address Space


31
64 Byte Header

16 15

Unit ID

Manufacturer ID

Status

Command

Class code
BIST

192 Bytes Available


for PCI Unit

Header

Revision
Latency

CLS

Base Address register

Reserved
Reserved
Expansion ROM Base Address
Reserved
Reserved
Max. Lat. Min. GNT

INT-Pin

INT-Line

256 bytes configuration space


Manufacturer ID
Unit ID
Class code
type of PCI unit
0102h floppy disk
controller
0200h Ethernet Controller

Bus Type

MB/sec (megabytes per second)

VL-bus

100 MBps

VL-bus

132 MBps

32-Bit PCI (Intel)

132 MBps

PCI-X 66

512 MBps

PCI-X 133

1 GBps

PCI Express x1(IBM)

500 MB/s

PCI Express x2

1000 MB/s

PCI Express x4

2000 MB/s

PCI Express x8

4000 MB/s

PCI Express x12

6000 MB/s

PCI Express x16

8000 MB/s

(the total information flow over a given time) on a telecommunications


medium

USB
The universal serial bus (USB) has solved a problem with the PC system.
Current PCI sound cards use internal PC power, which generates a lot of
noise.
USB allows the sound card to have its own power supply, for highfidelity sound with no 60 Hz hum
Other benefits are ease of connection and access to up to 127 different
connections.
The interface is ideal for keyboards, sound cards, simple video-retrieval,
and modems.
Data transfer speeds are 12 Mbps for full-speed operation and

1.5 Mbps for slow-speed operation


Cable lengths are limited to five meters for the full-speed interface and
three meters maximum for the low-speed interface.

The Connector
two types of connectors are
specified, both are in use
there are four pins on each
connector, with signals
indicated in Table
the +5.0 V and ground can
power devices connected to the
bus
data signals are biphase
signals
when +data are at 5.0 V, data
are at zero volts and vice versa

Important Signals
Pin

Name

Cable Color

Description

VCC

Red

+5 VDC

D-

White

Data -

D+

Green

Data +

GND

Black

Ground

Maximum power through the cables is rated at 100 mA, maximum current
at 5.0 V.
if current exceeds 100 mA, Windows will indicate an overload condition
(display a yellow exclamation point)
USB uses NRZI (non-return to zero, inverted) encoding to transmit packet
data
this method does not change signal level for the transmission of logic 1
signal level is inverted for each change to logic 0
NRZI encoding used with the USB.

Actual data transmitted includes sync bits, a method called bit stuffing,
because it lengthens the data stream.
If logic 1 is transmitted for more than 6 bits in a row, the bit stuffing
technique adds an extra bit (logic 0) after six continuous 1s in a row.
Bit stuffing ensures the receiver can maintain synchronization for long
strings of 1s.
data are always transmitted with the least-significant bit first,
followed by subsequent bits

The USB uses point-to-point connections and a serial transmission format.


Each node of the tree has a device called a hub, which acts as an intermediate transfer point
between the host computer and the I/O devices.
At the root of the tree, a root hub connects the entire tree to the host computer.

The leaves of the tree are the I/O devices: a mouse, a


keyboard, a printer, an Internet connection, a camera, or
a speaker.
The tree structure makes it possible to connect many
devices using simple point-to-point serial links.
the USB operates strictly on the basis of polling.

IEEE 1394
The IEEE 1394 interface is a serial bus interface standard for highspeed communications and isochronous real-time data transfer
Frequently used by personal computers, as well as in digital audio,
digital video, automotive, and aeronautics applications.
The interface is also known by the brand names of FireWire
(Apple), i.LINK (Sony), and Lynx (Texas Instruments).

Shares many of the features of USB


FireWire is also available in wireless, fiber optic, and coaxial
versions using the isochronous protocols.
A self-configuring network

Twisted Pair cable


orange pin 1 BBlue pin 2 B+
Red
pin 3 A Green pin 4 A+

B
A

FireWire 400 (IEEE 1394a): 400 Mbit/s data rates (50MB per second)
FireWire 800 (IEEE 1394b): 800 Mbit/s data rates (100MB per second)
(63 devices)
FireWire S1600: 1.6Gbps
FireWire S3200: 3.2Gbps
USB was designed for simplicity and low cost, while FireWire was
designed for high performance, particularly in time-sensitive applications
such as audio and video.
The two technologies are still mainly the same, although FireWire costs a
bit more than USB. That's why USB is used as the standard in most
computers' high-speed buses.

Types of Connectors
FireWire 400 (IEEE 1394a-1995)
It can transfer data between devices at 100, 200, or 400
Mbit/s half-duplex
These different transfer modes are commonly referred to as
S100, S200, and S400.
Cable length is limited to 4.5 metres (14.8 ft), although up to
16 cables can be connected using active repeaters; external
hubs, or internal hubs

FireWire 800 (IEEE 1394b-2002)


This specification and corresponding products allow a
transfer rate of 786.432 Mbit/s full-duplex
A bilingual cable allows the connection of older devices to
the newer port.
Apple was the first to introduce commercial products with
this new connector.

The following are some of the salient differences between FireWire


and USB.
Devices are organized in a daisy chain manner on a FireWire bus.
FireWire is well suited for connecting audio and video equipment. It can be
operated in an isochronous mode that is highly optimized for carrying high-speed
isochronous traffic.
I/O devices connected to the USB communicate with the host computer.
FireWire, on the other hand, supports a mode of operation called peer-to-peer.
The basic FireWire connector has six pins. There are two pairs of data wires, one
for transmission in each direction, and two for power and ground. Higher-speed
versions use a nine-pin connector.
The FireWire bus can deliver considerably more power than the USB.

Small Computer System Interface, SCSI is pronounced as "Scuzzy


one of the most commonly used interface for disk drives that was first completed
in 1982.

Most modern SCSI host adapters are PCI cards, either 32-bit or 64-bit. Older ones
were based on the 16-bit ISA bus or the transitional 32-bit VESA and EISA buses
Two leading manufacturers are Adaptec and LSI Logic.
devices are connected to a computer via a 50-wire cable, which can be up to 25
meters in length and can transfer data at rates of up to 5 Megabytes/s.
The standard has undergone many revisions, and its data transfer capability has
increased rapidly. SCSI-2 and SCSI-3
Data are transferred either 8 bits or 16 bits in parallel, using clock speeds of up
to 80 MHz.

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