EE-222

Microprocessor Systems

PIC Assembly Language

Slide 1

PIC registers
WREG (working register)

Slide 2

WREG instructions
MOVLW
moves 8-bit data into the WREG register

ADDLW
add the literal value K to register WREG and put
the result back in the WREG register

Example

Slide 3

Datapath

Dr Usman Ali, NUST College of E&ME

Slide 4

File register
Data RAM
Used for data storage and scratch pad

SFRs (Special function registers)

Dedicated to specific functions such as ALU status,
timers, serial communication, I/O ports, ADC

Slide 5

File register

Dr Usman Ali, NUST College of E&ME

Slide 6

SFRs

Dr Usman Ali, NUST College of E&ME

Slide 7

File register instructions

MOVWF instruction
Tells the CPU to copy the source register WREG to
a destination in the file register (F)
Literal (immediate) values cannot be moved
directly into the general-purpose RAM locations

Slide 8

Example- MOVWF

Memory contents

Slide 9

ADDWF instruction
Adds together the contents of WREG and a file
register location
Used both working and file registers
Format

Where D is the destination (w or f)

Slide 10

Example- file register instructions

Memory contents

Slide 11

Datapath

Dr Usman Ali, NUST College of E&ME

Slide 12

WREG instructions

Slide 13

File register instructions

Dr Usman Ali, NUST College of E&ME

Slide 14

COMF instruction
Complements (inverts) the contents of fileReg
and places the result in WREG or fileReg

Slide 15

DECF instruction
Decrements (subtracts one from) the contents
of fileReg and places the result in WREG or
fileReg
Example

Slide 16

MOVF instruction
Copies the content of fileReg to WREG. If D =
1, the content of fileReg is copied to itself

Slide 17

MOVFF instruction
Copies data from one location in fileReg to
another location in fileReg

Dr Usman Ali, NUST College of E&ME

Slide 18

Example- MOVFF instruction

Slide 19

Flags in Status Register

N (Negative Flag)
Set when bit B7 is one as the result of an arithmetic/logic
operation
OV (Overflow Flag)
Set when result of an operation of signed numbers goes
beyond 7-bits
Z (Zero Flag)
Set when result of an operation is zero
DC (Digit Carry Flag) (Half Carry)
Set when carry generated from Bit3 to Bit4 in an arithmetic
operation
C (Carry Flag)
Slide 20
Set when an addition generates a carry (out)

ADDLW instruction and the status register

Slide 21

ADDLW instruction and the status register

Slide 22

ADDLW instruction and the status register

Slide 23

Dr Usman Ali, NUST College of E&ME

Slide 24

Decision making using flag bits

Slide 25

Data format
Hex
99h
69H
0x45
68
h46
Invalid format

Slide 26

Data format
Binary
B01011010

Decimal
D34, d45
.67

ACSII
Am, a1
Slide 27

Assembler directives
Give directions to the compiler
EQU
Labels a constant number
Mem_addr EQU 0x34

SET
Same as EQU
Can be reassigned later

Slide 28

Examples EQU

Dr Usman Ali, NUST College of E&ME

Slide 29

Examples EQU- assigning SFR addresses

Slide 30

Assembler directives
ORG
Sets beginning address of the code or data

END
Indicates end of the source file

#include
To include libraries

_config
To set the configuration bits
Slide 31

Structure of assembly language

instruction

Dr Usman Ali, NUST College of E&ME

Slide 32

Creating executable

Dr Usman Ali, NUST College of E&ME

Slide 33

Program counter & program space

Used by the CPU to point to the address of the next
instruction to be executed
Increments automatically
The width defines the addressable program memory
space

Slide 34

Program space

Dr Usman Ali, NUST College of E&ME

Slide 35

Code placement
in ROM

Slide 36

Assembly language and machine code

Dr Usman Ali, NUST College of E&ME

Slide 37

Assembly language and machine code

Slide 38

PIC18 Instruction Set

Includes 77 instructions

73 one word (16-bit) long

4 two words (32-bit) long

Divided into seven groups

Move (Data Copy) and Load
Arithmetic
Logic
Program Redirection (Branch/Jump)
Bit Manipulation
Table Read/Write
Machine Control
Slide 39

Addressing Modes
Method of specifying of an operand
Immediate (Literal) addressing
The operand is a number that follows the opcode

Direct addressing
The address of the operand is a part of the instruction

Indirect addressing
An address is specified in a register (pointer) and the
MPU looks up the address in that register

Slide 40

Move and Load Instructions

MOVLW
MOVLW

8-bit
0xF2

;Load an 8-bit Literal into WREG

;Load F2H into W

MOVWF

F,a

;Copy WREG into File (Data) Reg.

;If a = 0, F is in Access Bank
;If a = 1, Bank is specified by BSR
;Copy W into F Reg25H
;Alternate format

MOVWF
MOVWF

MOVFF
MOVFF

0x25,0
0x25

fs,fd
0x20,0x30

;Copy from one File Reg. to

;another File Reg.
;Copy F Reg20H into Reg30H
Slide 41

Move and Load Instructions

MOVF

MOVF
MOVF
CLRF

CLRF
SETF

F,d,a

0x25,0,0
0x25,W
F,a

;Copy F into itself or W

;If d = 0 (or W), destination is W
;If d = 1 (or F), destination is F
;Affects N & Z flags
;Copy F Reg25H into W
;Alternate format

0x25

;Clear F Reg.
;Sets Z flag
;Clear Reg25H

F,a

;Sets all bits to 1 in F Reg.

Slide 42

Points to Remember
Each instruction has two parts
Opcode and Operand

When instructions copy data from one register to

another, the source is not modified
In general, these instructions do not affect flags
Except CLRF and MOVF

Slide 43

Arithmetic Instructions
ADDLW
ADDLW

8-bit
0x32

;Add 8-bit number to W & set flags

;Add 32H to W

ADDWF

F,d,a

;Add W to F & set flags

;Save result in W if d = 0 (or W)
;Save result in F if d = 1 (or F)
;Add W to REG20H and
;save result in W
;Alternate format

ADDWF

0x20,0

ADDWF

0x20,W

ADDWF

0x20,1

ADDWF

0x20,F

;Add W to REG20H and

;save result in REG20H
;Alternate format
Slide 44

Arithmetic Instructions
ADDWFC

F,d,a

8-bit
F,d,a
F,d,a
F,d,a
F,d,a
F,a

SUBLW
SUBWF
SUBWFB
INCF
DECF
NEGF

;Add W to F with carry

;and save result in W or F
;Subtract W from literal
;Subtract W from F
;Subtract W from F with borrow
;Increment F
;Decrement F
;Take 2s Complement of F

Slide 45

Arithmetic Instructions
MULLW

8-bit

MULWF

F,a

DAW

;Multiply 8-bit Literal and W

;Save result in PRODH:PRODL
;Multiply W and F
;Save result in PRODH:PRODL
;Decimal adjust W for BCD
;Addition

Slide 46

Points to Remember
Arithmetic instructions
Can perform operations on W and 8-bit literals
Save the result in W

Can perform operations an W and F

Save the result in W or F

In general, affect all flags

Slide 47

Logic Instructions
COMF

F,d,a

ANDLW
ANDWF

8-bit
F,d,a

IORLW
IORWF

8-bit
F,d,a

IORWF
XORLW
XORWF

0x12,F
8-bit
F,d,a

;Complement (NOT) F
;and save result in W or F
;AND Literal with W
;AND W with F and
;save result in W or F
;Inclusive OR Literal with W
;Inclusive OR W with F
;and save result in W or F
;OR W with REG12H and
;save result in REG12H
;Exclusive OR Literal with W
;Exclusive OR W w/ F
;and save result in W or F
Slide 48

Points to Remember
Logic instructions
Can perform operations on W and 8-bit literals
Save the result in W

Can perform operations an W and F

Save the result in W or F

In general, affect only two flags: N and Z

Slide 49

Branch Instructions
BC

BC
BC
BNC
BZ
BNZ
BN
BNN
BOV
BNOV
BRA

;Branch if C flag = 1, + or 64 Words

;to PC+2+2n
5
;Branch on Carry to PC+2+10
Label ;Alternate: Branch to Label
n
;Branch if C flag = 0
n
;Branch if Z flag = 1
n
;Branch if Z flag = 0
n
;Branch if N flag = 1
n
;Branch if N flag = 0
n
;Branch if OV flag = 1
n
;Branch if OV flag = 0
nn
;Branch always, + or 512 Words
Slide 50

Branch Example
Address Label

000020
000022
000024
000026
000028
00002A
00002C
00002E
000030

Opcode Operand Comment

START: MOVLW
MOVWF
MOVLW
MOVWF
ADDWF
BNC
MOVLW
SAVE: MOVWF
SLEEP

BYTE1
REG0
BYTE2
REG1
REG0,W
SAVE
0x00
REG2

;Load BYTE1 into W

;Save into REG0
;Load BYTE2 into W
;Save into REG1
;Add REG0 to REG1
;Branch if no carry
;Clear W
;Save Result

Slide 51

Call and Return Instructions

RCALL

nn

CALL

20-bit,s

RETURN

RETFIE

;Relative Call subroutine

;within + or 512 words
;Call subroutine
;If s = 1, save W, STATUS, BSR
;Return subroutine
;If s = 1, retrieve W, STATUS, BSR
;Return from interrupt
;If s = 1, retrieve W, STATUS, BSR

Slide 52

Points to Remember
Eight conditional relative branch instructions
Based on four flags
Range is 64 words

Unconditional relative branch instruction

Range is 512 words

If the operand is positive, the jump is forward

If negative, the jump is backward

Slide 53

Bit Manipulation Instructions

BCF
F,b,a
BCF 0x2,7

;Clear bit b of F, b = 0 to 7
;Clear bit 7 of Reg2

BSF
BTG
RLCF

F,b,a
F,b,a
F,d,a

RLNCF

F,d,a

RRCF

RRNCF

F,d,a

;Set bit b of F, b = 0 to 7
;Toggle bit b of F, b = 0 to 7
;Rotate bits left in F through
;carry and save in W or F
;Rotate bits left in F
;and save in W or F
;Rotate bits right in F through
;carry and save in W or F
;Rotate bits right in F
;and save in W or F

F,d,a

Slide 54

Points to Remember
Any bit in a File (data) register
Set, reset, or complemented

There are two types of rotate instructions

8-bit and 9-bit (include C)
Any file (data) register can be rotated left or right
Saved in W or F

Slide 55

Test and Skip Instructions

BTFSC
BTFSC
BTFSS

CPFSEQ
CPFSGT
CPFSLT
TSTFSZ

F,b,a

;Test bit b in F and skip the

;next instruction if bit is cleared (bit=0)
0x2,7 ;Test bit B7 in REG2
;if B7=0 then skip next instruction
F,b,a ;Test bit b in F and skip the
;next instruction if bit is set (bit=1)
F,a
;Compare F with W, skip if F = W
F,a
;Compare F with W, skip if F > W
F,a
;Compare F with W, skip if F < W
F,a
;Test F, skip if F = 0

Slide 56

Increment/Decrement
and Skip Next Instruction
DECFSZ

F,d,a

DECFSNZ

F,d,a

INCFSZ

F,d,a

INCFSNZ

F,d,a

;Decrement F and skip the

;next instruction if F = 0
;Decrement F and skip the
;next instruction if F 0
;Increment F and skip the
;next instruction if F = 0
;Increment F and skip the
;next instruction if F 0

Slide 57

Points to Remember
Any File (data) register or single bit in a File (data)
register can be tested for 0
A File (data) register can be compared with W for
equality, greater than, and less than
A File (data) register can be incremented or
decremented and tested for 0
If a condition is met, the next instruction is skipped

Slide 58

Table Read/Write Instructions

TBLRD*
TBLRD*+
TBLRD* TBLRD+*

;Read Program Memory pointed by TBLPTR

;into TABLAT
;Read Program Memory pointed by TBLPTR
;into TABLAT and increment TBLPTR
;Read Program Memory pointed by TBLPTR
;into TABLAT and decrement TBLPTR
;Increment TBLPTR and Read Program
;Memory pointed by TBLPTR into TABLAT

Slide 59

Table Read/Write Instructions

TBLWT*
TBLWT*+
TBLWT* TBLWT+*

;Write TABLAT into Program Memory pointed

;by TBLPTR
;Write TABLAT into Program Memory pointed
;by TBLPTR and increment TBLPTR
;Write TABLAT into Program Memory pointed
;by TBLPTR and decrement TBLPTR
;Increment TBLPTR and Write TABLAT into
;Program Memory pointed by TBLPTR

Slide 60

Machine Control Instructions

CLRWDT
RESET
SLEEP
NOP

;Clear Watchdog Timer

;Reset all registers and flags
;Go into standby mode
;No operation

Slide 61

Instruction Format
The PIC18F instruction format divided into
four groups
Byte-Oriented operations
Bit-Oriented operations
Literal operations
Branch operations

Slide 62

Instruction Format
Byte-oriented instruction ADDWF F, d, a
ADDWF

0x1,F

;Add W to REG1, save in REG1

Bit-oriented instruction BCF F, b, a

BCF

0x15,7

;Clear bit7 in REG15H

Slide 63

Instruction Format
Literal instruction MOVLW k
MOVLW

0x7F

;Load 7FH into W

Branch instruction BC n
BC

0x15

;Branch if carry +15H words

Slide 64

Illustration: Addition
Problem Statement
Load two bytes (37H and 92H) in registers REG0 and REG1
Add the bytes and store the sum in REG2
Address

Hex

Opcode

Operand

Comments

0020

0E37

MOVLW

0x37

;Load first byte in W

0022

6E00

MOVWF

REG0

;Save first byte in REG0

0024

0E92

MOVLW

0x92

;Load second byte in W

0026

6E01

MOVWF

REG1

;Save second byte in REG1

0028

2400

ADDWF

REG0,W

;Add bytes and save sum in W

002A

6E02

MOVWF

REG2

;Save sum in REG2

002C

0003

SLEEP

;Power Down
Slide 65

Bus Contents
Execution of the
instruction:
MOVLW 0x37

Slide 66

Pipelining

Slide 67

Pipeline Fetch and Execution

Slide 68