Professional Documents
Culture Documents
8, AUGUST 2011
2813
AbstractThe objective of this paper is to design a new generation of affordable sophisticated data acquisition and processing
(DAQP) systems. Because of the proposed system hardware reconfigurability, it can be used to meet the need of many real-world
applications while keeping the cost of a device low. The hardware
implementation of the different processing functions of the device
allows for high-speed processing without the need of expensive
general-purpose processors, as is the case of computer-based or
microcontroller-based data acquisitions (DAQs). The target technology of implementing the proposed design is the system on chip
via field-programmable gate array (SoC-FPGA). A four-channel
DAQP was designed, developed, and tested in the Embedded
Systems Design Laboratory, Tennessee Technological University,
Cookeville. Various modules of the conceptual design are implemented and verified. Performance evaluation and cost comparisons are provided. The comparison showed that the results of the
proposed instrument are comparable to existing technologies at a
fraction of the cost.
Index TermsAnalog-to-digital (ADC) conversion, data acquisition (DAQ), data processing, field-programmable gate array
(FPGA), multiplexing.
I. I NTRODUCTION
N MANY real-world applications, multichannel data acquisition (DAQ) is needed for the purpose of surveillance,
monitoring, and/or control. These applications include wideband communications, command communication and control,
space exploration, medical diagnosis, etc. Many sophisticated
DAQ systems exist in the market. However, they are either
expensive or cumbersome or both [1][4]. For example, the
cost of an analog-to-digital (ADC) board can be as high as
$3000 [5]. Furthermore, in another example, a computer-based
biomedical DAQ system consumes 600 W of power and thus
requires an isolated power supply unit. That system cost is
around $5500, not including a laptop [6]. To make, for example,
medical diagnosis affordable, one would want to be able to buy
Manuscript received June 2, 2009; revised October 14, 2009. Date of
publication June 2, 2011; date of current version July 13, 2011. This work was
supported by the Center of Manufacturing Research, Tennessee Technological
University, Cookeville. The Associate Editor coordinating the review process
for this paper was Dr. Dario Petri.
The authors are with the Department of Electrical and Computer Engineering, Tennessee Technological University, Cookeville, TN 38505 USA (e-mail:
mohammed.a.abdallah@gmail.com;
oelkeelany@tntech.edu;
aalouani@
tntech.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIM.2009.2036402
2814
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
TABLE I
L ITERATURE R EVIEW S UMMARY
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
Fig. 1.
2815
Mapping of functions in an existing computer-based DAQP system to the proposed system using the FPGA system-on-chip technology.
2816
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
In particular, to make the proposed DAQP a low-cost standalone reconfigurable instrumentation, one has to build the following capabilities.
Capability 1: To accept various input signals with different amplitudes and frequencies. It is desired to accept analog input
voltage signals of an amplitude with a range from millivolts
to volts. Furthermore, it is desired to accept input signals
in the frequency range from hertz to megahertz. This will
allow the system to accommodate a variety of sensors at the
same time (e.g., low-frequency electric pulses, acoustic,
ultrasounds, etc.).
Capability 2: To perform automatic signal conditioning such
as bias addition and removal, adaptive signal scaling, and
filtering. Only the information about the signal type will be
needed. A library that contains the parameters of filters and
amplifiers will be built.
Capability 3: To store the acquired signals without the need
for an external computer, a detachable Flash memory write
module will be built. A network control module will be
needed to securely transmit the acquired signals to authenticated destinations via the Internet.
Capability 4: To have the built-in capability to perform digital
signal processing such as FFT and DCT for a 1-D digital
signal.
Capability 5: To perform adaptive scheduling for the ADC
multiplexed interface for a variable number of channels.
If all channels have the same characteristics, then it will
be equivalent to a round-robin sampling technique (i.e.,
uniform sampling, one sample per channel per cycle).
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
Fig. 3.
2817
frequency, i.e.,
Fx N Fs
Fs 2 Bw
(1)
2818
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
Fig. 4.
In the computer-based systems, database management engines can be used. However, in the proposed FPGA device,
these systems are not supported since they require a database
management layer to add, update, delete, and search records.
Hence, it is a technical challenge to design a database classification component that integrates the required functions of the
database management layer on the target FPGA chip.
Fig. 3 shows a conceptual design of both the RAMM and
the NCM. The RAMM is responsible for recording acquired
signals on a secure storage medium. A user ID will be entered at
the time of recording to protect the privacy of the input signals.
We developed a subsystem that temporarily writes stored digital
data directly to a Flash memory card. This subsystem has a
minimal interface and thus eliminates the need for an external
Flash controller.
III. I NSTRUMENT D ESIGN AND I MPLEMENTATION
To implement the proposed design with minimal cost and
circuit size, a strategic decision of not using any off-the-shelf
RTOS is carried out. The challenge with no RTOS is the
necessity to design each driver on the chip. In the following,
each system component is introduced in more detail.
A. ADC Interface
Let N channels be simultaneously acquired by the proposed
instrument design. Each channel is assigned a different number
of time slots of the MUX time schedule. Let Si be the number
of time slots that are assigned for channel $(i)$. Let n be the
number of samples per time slot, tsa be the sample acquisition
time, and T be the elapsed time. As shown in Fig. 4, the
acquired samples from the first channel
are stored in a buffer.
If the buffer is not full (i.e., T <
n Si tsa ), the buffer
index is incremented, and the channel-assigned time slot is
checked. If this channel has more time slots, ADC will acquire
more data from this channel. If not, the selection lines (sel) are
changed. This change provides collecting data from another
channel and storing them into the same buffer to optimize
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
Fig. 5.
2819
2820
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
Fig. 6.
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
2821
Fig. 8 illustrates the display module architecture. The objective of the monitoring module is to be able to draw a number
of points in a specific area in the LCM concurrently with
two straight lines for x- and y-axes. This was accomplished
by giving the module the variable coordinates of each point
in sequential and periodic fashion. Points must be repeatedly
printed so that when a point is drawn, the previous one is
not erased. This is due to the way the scan of typical display
modules works. Hence, it was necessary to buffer the collection
of variable display points before they are sent to the display
module. At this step, real-time curves could be generated for
acquired data with arbitrary colors. The LCM data buffer is
treated in a cyclic fashion, assuming that the scan rate of the
display module will be much faster than the buffer fill rate.
Filling this buffer with the data values will be done by an
independent unit. A flowchart of the implementation of this
module is shown in Fig. 9.
C. Preprocessing Unit
Using a single harmonic sinusoidal wave, it was noticed
from preliminary experiments that the acquired/stored data had
minor problems. First, a dc bias was added to the analog input
Here, different experiments are implemented for the proposed multichannel DAQ instrument. Different signals with different characteristics are applied to the DAQ. A signal generator
is used to generate the input signals, which, in turn, are applied
to the input of the MUX in the case of the multichannel DAQ.
The configuration of the ADC is controlled by the FPGA ADC
interface. The MUX selection lines are controlled by the FPGA
as well. The 14-bit digital data are fed into the off-chip memory
in parallel. Unlike the case of the single-channel DAQ, in the
case of the multichannel DAQ, a sample from each channel
is stored in that buffer. In other words, the first location of
the buffer contains the first sample from channel 1, the next
location contains the first sample from channel 2, . . .. After
N locations, where N is the number of channels, the second
sample from channel 1 is stored. When the buffer is full, we
should extract channel-1 samples and store them together into
a single destination on the SD card. The same situation is
performed for every channel sample. The proposed instrument
design is tested and evaluated in terms of performance and cost.
Each parameter is discussed in more detail here.
The NI DAQ card is chosen because it has the closest similarity to the proposed instrument (although it is computer based,
it uses adaptive sampling and a MUX). The NI test bench is a
PCI 6024E 200-kS/s 16-channel DAQ card. An experimental
2822
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
prototype of the proposed system with four multiplexed channels is shown in Fig. 11. A 16-channel system will be built in
future work, which will have an extra cost of about $5 for a
16 : 1 external analog MUX such as the Intersil DG406DY [45].
A. Experimental Setup
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
2823
Fig. 10. Test signal (1-kHz sine wave) with various preprocessing stages. (a) Unprocessed. (b) DC bias removal. (c) Gain adjustment.
(2)
2824
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
Fig. 12. Comparison between the write time of the single- and multiple-block
write approaches.
Fig. 14.
Fig. 15.
(3)
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
2825
TABLE II
F EATURE S ET OF THE TRDB_LCM [46]
Fig. 17. Comparison between the proposed instruments, i.e., NI-based DAQs,
for the 1-kHz sine wave in a multichannel DAQ (one of four channels).
Fig. 16. LCM data plots using the FPGA display module (window size of
300 s).
2826
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 8, AUGUST 2011
ACKNOWLEDGMENT
The authors would like to thank G. Vince, a former graduate
student, for his help in the preliminary work of this paper.
R EFERENCES
[1] K. Arshak, A. Arshak, E. Jafer, D. Waldern, and J. Harris, Low-power
wireless smart data acquisition system for monitoring pressure in medical
application, Microelectron. Int., vol. 25, no. 1, pp. 314, 2008.
[2] White paper, Technical Series on Data Acquisition. accessed:
September, 2008. [Online]. Available: http://www.kscorp.com/support/
whitepapers
[3] B. S. Pimentel, J. H. de Aliva Valgas Filho, R. L. Campos,
A. O. Fernandez, and C. J. Nunes Coelho, A FPGA implementation of
a DCT-based digital electrocardiographic signal compression device, in
Proc. IEEE 14th Symp. Integr. Circuits Syst. Des., 2001, pp. 4449.
[4] J. Gray, Building a RISC system in an FPGA, Circuit Cellar Mag.,
no. 116118, Mar.May 2000. accessed: September, 2008. [Online].
Available: http://www.fpgacpu.org/xsoc/cc.html
[5] Maxim Direct. accessed: May, 2009. [Online]. Available: http://www.
maxim-ic.com
[6] Comet Inc., Portable EEG and PSG System, 2007. accessed: January 31,
2007. [Online]. Available: http://www.grass-telefactor.com/products/
clinsystems/cmeeg1.html
[7] Yokogawa Elect. Corp., DAQ Station Dx Series Software Package for the
Pharmaceutical and Biotechnology Industries, Tokyo, Japan, 2000.
[8] Campbell Scientific Inc., Logan, UT, Oct. 2007. accessed: May, 2008.
[Online]. Available: http://www.campbellsci.com/vehicle-testing
[9] RSTech, CAESAR Data Systems, World Class Testing Technology
Road Load Data Acquisition, RS Technol., Ltd., Farmington Hills,
MI, Oct. 2007. accessed: May, 2008. [Online]. Available: http://www.
rstechltd.com
[10] E. L. Hudspeth, Data acquisition, storage and display system,
U.S. Pat. 4 053 951, Oct.11, 1977. accessed: October, 2007. [Online].
Available: http://www.freepatentsonline.com/4053951.html
[11] A. W. Dudley, R. F. Dayhoff, and R. S. Ledley, Muscle biopsy data
acquisition and display, in Proc. 7th Annu. Symp. Comput. Appl. Med.
Care, 1983, pp. 763766.
[12] NI-SCXIUSB Data Acquisition, Jun. 2008. accessed: December, 2008.
[Online]. Available: http://zone.ni.com/devzone/cda/tut/p/id/4021#toc0
[13] S. Martin, PC-based data acquisition in an industrial environment, in
Proc. IEE Colloq. PC-Based Instrum., 2002, pp. 2/12/3.
[14] I.-Y. Chen and C.-C. Huang, A service oriented agent architecture to support telecardiology services on demand, J. Med. Biomed. Eng., vol. 25,
no. 2, pp. 7379, 2005.
ABDALLAH et al.: LOW-COST STAND-ALONE MULTICHANNEL DATA ACQUISITION, MONITORING, AND ARCHIVAL SYSTEM
2827