PLD(Programmable Logic Devices)

PLD are chips which contained programmable circuit. These chips contained large digital gates
that could be programmed. This offered designers the flexibility to program the chip according to
the circuit design requirements.
PLA(Programmable Logic Array)
PLA(Programmable Logic Array) and PAL(Programmable Array Logic) are Programmable Logic
Devices which had planes of AND and OR gates interconnected to each other and which could
be programmed.
First PLA were discovered. The block diagram of the structure of PLA inside a chip is shown
below.

As shown above, the PLA consisted of planes of input buffers and inverters, plane of AND gates
and plane of OR gates. This structure was developed utilizing the fact that any logic function can
be expressed as sum of product of minterms. Each of the connection between the planes could
be connected or left disconnected and thus implement the desired logic function. Thus this gave
a flexibility of realizing digital logic circuit.
A closer look at the internal structure of the connection between the plane is shown below.

In technical writing and design the following schematic drawing is commonly used.

PAL(Programmable Array Logic)

A PAL is also a PLD(programmable Logic Device) but in case of PAL as opposed to PLA, the OR
gate plane is fixed while the AND plane is programmable. This has improved performance and
improved fabrication margin. That is, because a PLA have both programmable AND and OR
planes there was higher potential that the PLD was corrupted.
An example of PAL circuit is shown below.

Difference between PLA and PAL.

PLA has both programmable AND and OR planes whereas PAL has only programmable
AND planes and OR plane is fixed

PLA has more flexibility in the logic circuit function implementation than PAL

PAL is simpler to manufacture than PLA

PLA have reduced speed performance

PAL devices are manufactured in smaller size.