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Algorithm and
Parameters
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Contents
1. Power Control Overview
2. HW Power Control Algorithm
3. HW Power Control Algorithm
4. Other Algorithms
Page2
Power control
Purpose
Page3
Page4
Page5
SA0 SA1 SA2 SA3 SA0 SA1 SA2 SA3 SA0 SA1 SA2 SA3
MS adopts the new
power level and TA
In the 26 multi-frames,
frame 12 sends
SACCH.
MS obtains SACCH
block
Page6
Page7
Page8
Data Configuration of MR
Preprocessing(1)
Page9
Data Configuration of MR
Preprocessing(1)
Page10
Contents
1. Power Control Overview
2. HW Power Control Algorithm
3. HW Power Control Algorithm
4. Other Algorithms
Page11
HW II Power Control
Page12
HW II Power Control
BTS
Network
Downlink MR
Page13
HW II Power Control
Measurement report
Uplink
measurement
report
Downlink
measurement
report
Page14
HW II Power Control
Interpolation
Compensation (optional)
Prediction (optional)
Filter
Page15
HW II Power Control
Page16
HW II Power Control
MR
MR
MR
No. n+4
MR
MR
No. n
Missing by
some reasons
Page17
Data Configuration of MR
Preprocessing
Page18
HW II Power Control
MR. compensation
1. Put the current receiving measurement report into the measurement report
compensation queue.
2. Record the changed information of the transmitting power according to the
MS and BTS power levels in the measurement report.
3. After finish the measurement report interpolation, system will compensate
the receiving level of the history measurement report according to the power
change information. The compensated measurement reports will be the
original data in the filter process.
4. Filter the compensated measurement reports.
Page19
Page20
HW II Power Control
MR. prediction
Implementation procedure
1. Analyze the tendency of MR by the historical measurement
reports after interpolation.
2. Guide by the tendency, to predict the values of measurement
report to be received. There are 0~3 measurement reports
prediction, which are configured on LMT.
3. Filter the interpolated, compensated and predicted measurement
reports, and implement power control judgment.
Page21
Page22
HW II Power Control
MR
MR
MR
MR
MR
MR
Filter----Average several
consecutive MRs
Page23
Page24
Page25
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Page27
AdjStep_Lev
AdjStep_Qul
max(AdjStep_Lev,AdjStep_Qul)
AdjStep_Lev
AdjStep_Qul
No action
AdjStep_Lev
No action
AdjStep_Lev
AdjStep_Lev
AdjStep_Qul
AdjStep_Lev
AdjStep_Lev
AdjStep_Qul
AdjStep_Lev
No action
AdjStep_Lev
No action
AdjStep_Qul
AdjStep_A
No action
AdjStep_Qul
AdjStep_B
No action
No action
No action
max(AdjStep_Lev,AdjStep_Qul)
Page28
Page29
Power control will not execute if the signal level and quality
is within the threshold bands.
Page30
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Page40
Page41
Page42
Exercise
Given conditions:
The uplink receiving level is -55dBm, the quality is level 0. Power control algorithm is
HW II.
Data configuration is as follows: Uplink signal level upper threshold: -60dBm, uplink
signal level lower threshold: - 80dBm. Uplink signal upper quality threshold: level 1.
Uplink signal lower quality threshold: level 2. The downward adjustable step size of
quality band 0 is 16dB, of quality band 1 is 8dB, and of quality 2 is 4 dB. The upward
adjustable step size of receiving level is 16dB. The upward or downward adjustable
step size for power control by quality are both 4dB.
Question: What will be the uplink stable receiving level after power control?
Page43
Exercise
Answer.
Page44
Exercise
Answer .
Page45
Content
1. Power Control Overview
2. HW Power Control Algorithm
3. HW Power Control Algorithm
4. Other Algorithms
Page46
Contents
3. HW III Power Control Algorithm
3.1 HW III Power Control Algorithm
3.2 HW III Power Control Optimization Algorithm
Page47
Is active PC
allow?
NO
End
NO
Calculate the PC step
The number of
MRs[SdMrCutNum/
TchMrCutNum]?
NO
YES
YES
Is PC allowed?
MR.
Preprocessing
YES
YES
NO
NO
YES
YES
New transmit
power=current
one+[MAXUpStep]
Interpolated MRs
NO
Exponential filtering
Adjust transmit power
PC interval >
[PwrCtrlAdjPeriod]
NO
End
YES
NO
Implement PC
YES
Page48
End
Interpolation method
Filter calculation
Page49
Page50
Page51
Quality filter
Quality Class
CIR (dB)
22
18
16
14
12
Page52
Exponent filter
ca_filtered1 (1)=ca(1)
k=1
k>1
Page53
Filter algorithm
k=1
1<k<w
k>=w
Page54
Page55
Page56
10
ca _ filtered( k )
10
Rx_lev
10
c(k )
10
10
Useful signel
I (k )
10
(1)
Interference
(2)
(3)
Page57
qa _ filtered ( k )
10
Input c(k) to (3), get g(k) = p(k) c(k). So calculate the g(k)
Page58
Page59
Page60
Page61
See notes
Page62
Page63
See notes
Page64
Page65
Adjustment protection
Page66
Page67
Page68
Question
Given condition
ULRexLevHighThred30
ULRexLevLowThred20
ULFSRexQualHighThred20
ULFSRexQualLowThred16
ULRexLevAdjustFactor4 ULRexQualAdjustFactor6
ULMAXDownStep8 ULMAXUpStep8
Quality Class
CIR (dB)
22
18
16
14
12
Page69
Question
Answer:
step(k) = - ( sfactor( BsTxMaxPower - g(k) - SThr)
qfactor( qa_filtered(k) - QThr) )
30 20
20 16
{{0.4 [33 110 (
110)]} 0.6 (16
)}
2
2
2dB
After power control
Power output of MS: 33-2=31dBm
Suppose the current g(k)=115dB, current quality:2(CIR=16dB)then
For level-90dBm<31-115<-80dBm
For qualityequal with the [ULFSRexQualLowThred]
So power control stops the power output of MS 33-2=31dBm
Page70
Contents
3. HW III Power Control Algorithm
3.1 HW III Power Control Algorithm
3.2 HW III Power Control Optimization Algorithm
Page71
Page72
PWRCTRLSW
PWRCTRLOPTIMIZEDEN
Page73
Page74
Dual-coefficient Filter
A = (1.012*L-0.7505)/(L+1.848)
B: [DLRexLevExponentFilterLen], [DLRexQualExponentFilterLen],
[ULRexLevExponentFilterLen], [ULRexQualExponentFilterLen]
Page75
Dual-coefficient Filtering--Data
Configuration
Command: SET GCELLPWR3 (Set Parameters for Power Control III of Cell)
DLREXLEVEXPFLTLEN
DLREXQUALEXPFLTLEN
ULREXLEVEXPFLTLEN
ULREXQUALEXPFLTLEN
Page76
Dual-coefficient Filtering--Data
Configuration
ULFILTADJFACTOR
DLFILTADJFACTOR
Page77
HW PC III optimization algorithm adopts two sets of factors, and it can help the
system to avoid too low transmit power.
Page78
Command: SET GCELLPWR3 (Set Parameters for Power Control III of Cell)
DLREXLEVADJFCTR
DLREXQUALADJFCTR
ULREXLEVADJFCTR
ULREXQUALADJFCTR
Page79
Command: SET GCELLPWR3 (Set Parameters for Power Control III of Cell)
ULRXLEVPROTECTFACTOR
ULRXQUALPROTECTFACTOR
DLRXLEVPROTECTFACTOR
DLRXQUALPROTECTFACTOR
Page80
Exercise
Given condition
ULRexLevHighThred30
ULFSRexQualHighThred20 ULFSRexQualLowThred18
ULRexLevAdjustFactor0.3
ULRexQualAdjustFactor0.4
ULMAXDownStep8
ULMAXUpStep8
Quality Class
CIR (dB)
ULRexLevLowThred24
22
18
16
14
12
Page81
Exercise
Given condition
ULRexLevHighThred30
ULRexLevLowThred24
ULFSRexQualHighThred20
ULFSRexQualLowThred18
ULRexLevAdjustFactor0.3
ULRexQualAdjustFactor0.4
ULMAXDownStep8
ULMAXUpStep8
22
18
16
14
12
Page82
Content
1. Power Control Overview
2. HW Power Control Algorithm
3. HW Power Control Algorithm
4. Other Algorithms
Page83
Contents
4. Other Algorithms
4.1 Active Power Control
4.2 0.2dB Power Control
4.3 SAIC Power Control
Page84
Page85
Assignment
Procedure
During
Normal Call
Channel
Assignment
Procedure
Page86
Is [Power Forecast
Allowed] Yes?
No
Yes
For Intra-BSC
handover
End
Yes
Estimate PL
of UL channel
Estimate PL
of DL channel
Estimate PL
of DL channel
Estimate PL
of UL channel
Band compensation between
Main BCCH and TCH
No
End
Page87
No
UL_PATH_LOSS=MS_MX_PWR_BCCH UL_SD_SS
DL_PATH_LOSS=MS_MX_PWR_BCCH UL_SD_SS+
CMBER_LOSS + DOUBLE_ANT_GAIN
Page88
Inter-cell handover
DL_PATH_LOSS=NCELL_BCCH_MAX_PWR DL_NCELL_BCCH_SS
DL_NCELL_BCCH_SS: downlink receive level of the main BCCH of the neighboring cell
Intra-cell handover
DL_PATH_LOSS=DL_MAX_TX_PWR TCH_DL_SS_CMP
UL_PATH_LOSS=DL_PATH_LOSS
Page89
If fmain BCCH and fTCH belong to different frequency bands, the compensation
between different frequency bands should be made for the path loss.
UL_PATH_LOSS=UL_PATH_LOSS PATH_LOSS_BAND_DIFF
DL_PATH_LOSS=DL_PATH_LOSS PATH_LOSS_BAND_DIFF
UL_PATH_LOSS=UL_PATH_LOSS + PATH_LOSS_BAND_DIFF
DL_PATH_LOSS=DL_PATH_LOSS + PATH_LOSS_BAND_DIFF
Page90
UL_TX_PWR=UL_EXP_TCH_SS + UL_PATH_LOSS
DL_TX_PWR=DL_EXP_TCH_SS + DL_PATH_LOSS
Page91
Parameter
Value Configured
Value Configured
Yes
Yes
[UL PC Allowed]
Yes
[DL PC Allowed]
Yes
UL PC command
DL PC command
Page92
Page93
Page94
Contents
4. Other Algorithms
4.1 Active Power Control
4.2 0.2dB Power Control
4.3 SAIC Power Control
Page95
Page96
FINESTEPPCALLOWED
Page97
Contents
4. Other Algorithms
4.1 Active Power Control
4.2 0.2dB Power Control
4.3 SAIC Power Control
Page98
Introduction to SAIC
Page99
DL Quality Upper
Threshold
DL Quality Upper
Threshold
DL Quality Lower
Threshold
DL Quality Lower
Threshold
Power Control
Threshold Adjust for
SAIC
Page100
SAICALLOWED
SAICTHREDAPDTVALUE
Unit: dB
Page101
SAICTHREDAPDTVALUE
Unit: dB
Page102
Summary
Page103
Thank you
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