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Balanced Modulator/Demodulator
AD630
FEATURES
Recovers Signal from +100 dB Noise
2 MHz Channel Bandwidth
45 V/s Slew Rate
120 dB Crosstalk @ 1 kHz
Pin Programmable Closed Loop Gains of 1 and 2
0.05% Closed Loop Gain Accuracy and Match
100 V Channel Offset Voltage (AD630BD)
350 kHz Full Power Bandwidth
Chips Available
CM OFF
ADJ
DIFF OFF
ADJ
DIFF OFF
ADJ
2.5k
RINA 1
AD630
AMP A
CHA+ 2
CHA 20
12
COMP
11
+VS
13
VOUT
14
RB
15
RF
16
RA
2.5k
RINB 17
AMP B
10k
CHB+ 18
10k
CHB 19
5k
PRODUCT DESCRIPTION
The AD630 is a high precision balanced modulator which combines a flexible commutating architecture with the accuracy and
temperature stability afforded by laser wafer trimmed thin-film
resistors. Its signal processing applications include balanced
modulation and demodulation, synchronous detection, phase
detection, quadrature detection, phase sensitive detection,
lock-in amplification and square wave multiplication. A network
of on-board applications resistors provides precision closed loop
gains of 1 and 2 with 0.05% accuracy (AD630B). These
resistors may also be used to accurately configure multiplexer
gains of +1, +2, +3 or +4. Alternatively, external feedback may
be employed allowing the designer to implement his own high
gain or complex switched feedback topologies.
The AD630 may be thought of as a precision op amp with two
independent differential input stages and a precision comparator
which is used to select the active front end. The rapid response
time of this comparator coupled with the high slew rate and fast
settling of the linear amplifiers minimize switching distortion. In
addition, the AD630 has extremely low crosstalk between channels of 100 dB @ 10 kHz.
The AD630 is intended for use in precision signal processing
and instrumentation applications requiring wide dynamic range.
When used as a synchronous demodulator in a lock-in amplifier
configuration, it can recover a small signal from 100 dB of interfering noise (see lock-in amplifier application). Although optimized
for operation up to 1 kHz, the circuit is useful at frequencies up
to several hundred kilohertz.
Other features of the AD630 include pin programmable frequency
compensation, optional input bias current compensation resistors, common-mode and differential-offset voltage adjustment,
and a channel status output which indicates which of the two
differential inputs is active. This device is now available to
Standard Military Drawing (DESC) numbers 5962-8980701RA
and 5962-89807012A.
COMP
SEL B 9
CHANNEL
STATUS
B/A
SEL A 10
8
VS
PRODUCT HIGHLIGHTS
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
Model
Min
GAIN
Open Loop Gain
1, 2 Closed Loop Gain Error
Closed Loop Gain Match
Closed Loop Gain Drift
CHANNEL INPUTS
VIN Operational Limit1
Input Offset Voltage
Input Offset Voltage
TMIN to TMAX
Input Bias Current
Input Offset Current
Channel Separation @ 10 kHz
COMPARATOR
VIN Operational Limit1
Switching Window
Switching Window
TMIN to TMAX
Input Bias Current
Response Time (5 mV to +5 mV Step)
Channel Status
ISINK @ VOL = VS + 0.4 V2
Pull-Up Voltage
90
110
0.1
0.1
2
100
10
100
AD630K/B
Typ
Max
120
(VS + 4 V) to (+VS 1 V)
100
800
300
50
100
10
100
2.0
300
100
200
OUTPUT VOLTAGE, @ RL = 2 k
TMIN to TMAX
Output Short Circuit Current
10
16.5
5
90
90
5
0
25
110
110
4
16.5
5
10
25
0
25
2.5
300
(VS + 33 V)
90
90
5
Volts
mV
mV
nA
ns
mA
Volts
110
110
dB
dB
Volts
mA
16.5
5
Volts
mA
25
N/A
55
V
nA
nA
dB
MHz
V/s
s
10
70
+85
Volts
V
2
45
3
25
70
+85
1000
300
50
1.6
2
45
3
105
110
4
100
200
Unit
dB
%
%
ppm/C
(VS + 33 V)
2
45
3
Max
110
0.1
0.1
2
100
10
100
2.0
300
1.6
AD630S
Typ
(VS + 4 V) to (+VS 1 V)
500
160
300
50
(VS + 33 V)
85
90
5
90
1.6
OPERATING CHARACTERISTICS
Common-Mode Rejection
Power Supply Rejection
Supply Voltage Range
Supply Current
Min
0.05
0.05
100
200
Min
100
(VS + 4 V) to (+VS 1 V)
500
DYNAMIC PERFORMANCE
Unity Gain Bandwidth
Slew Rate3
Settling Time to 0.1% (20 V Step)
TEMPERATURE RANGES
Rated PerformanceN Package
Rated PerformanceD Package
AD630J/A
Typ
Max
+125
C
C
NOTES
1
If one terminal of each differential channel or comparator input is kept within these limits the other terminal may be taken to the positive supply.
2
ISINK @ VOL = (VS + 1) volt is typically 4 mA.
3
Pin 12 Open. Slew rate with Pins 12 and 13 shorted is typically 35 V/s.
Specifications subject to change without notice.
REV. D
AD630
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 600 mW
Output Short Circuit to Ground . . . . . . . . . . . . . . . Indefinite
Storage Temperature, Ceramic Package . . . 65C to +150C
Storage Temperature, Plastic Package . . . . . 55C to +125C
Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300C
Max Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150C
THERMAL CHARACTERISTICS
JC
JA
24C/W
35C/W
35C/W
38C/W
61C/W
120C/W
120C/W
75C/W
ORDERING GUIDE
Model
Temperature Ranges
Package Description
Package Option
AD630JN
AD630KN
AD630AR
AD630AR-REEL
AD630AD
AD630BD
AD630SD
AD630SD/883B
5962-8980701RA
AD630SE/883B
5962-89807012A
AD630JCHIPS
AD630SCHIPS
0C to 70C
0C to 70C
25C to +85C
25C to +85C
25C to +85C
25C to +85C
55C to +125C
55C to +125C
55C to +125C
55C to +125C
55C to +125C
0C to 70C
55C to +125C
Plastic DIP
Plastic DIP
SOIC
13" Tape and Reel
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
LCC
LCC
Chip
Chip
N-20
N-20
R-20
R-20
D-20
D-20
D-20
D-20
D-20
E-20A
E-20A
PIN CONFIGURATIONS
20 CH A
CH A+ 2
19 CH B
18 CH B+
17 RIN B
AD630
CM OFF ADJ 5
16 RA
TOP VIEW
CM OFF ADJ 6 (Not to Scale) 15 RF
14 RB
CHANNEL STATUS B/A 7
VS 8
13 VOUT
SEL B 9
12 COMP
SEL A 10
11 +VS
CH B
CH A+
3 2
RIN A
CH A
DIFF
OFF ADJ
1 20 19
CHIP AVAILABILITY
18 CH B+
CM OFF ADJ 5
AD630
CM OFF ADJ 6
TOP VIEW
(Not to Scale)
17 RIN B
16 RA
15 RF
14 RB
VS 8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD630 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. D
COMP
VOUT
SEL A
+VS
SEL B
9 10 11 12 13
WARNING!
ESD SENSITIVE DEVICE
AD630
AD630Typical
Performance Characteristics
15
15
18
15
10
Vi
5k
5k
VO
2k
100pF
CL = 100pF
f = 1kHz
10
5k
5k
Vi
VO
RL
100pF
CAP IN
1k
10k
1M
100k
10
FREQUENCY Hz
100
1k
10k 100k
RESISTIVE LOAD
1M
60
5k
VO
2k
100pF
10
5
f = 1kHz
CL = 100pF
5
10
15
SUPPLY VOLTAGE V
120
120
80
20
0
COMPENSATED
dt
60
40
20
20
40
0
1
10
100
1k
10k
FREQUENCY Hz
100k
100
OPEN LOOP GAIN dB
40
V/s
100
45
80
90
60
40
COMPENSATED
135
20
60
5 4 3
TPC 5.
UNCOMPENSATED
2
3
2 1 0 1
INPUT VOLTAGE V
dVO
vs. Input Voltage
dt
0
10
100
1k
10k 100k
FREQUENCY Hz
1M
UNCOMPENSATED
DVO
OUTPUT VOLTAGE V
OUTPUT VOLTAGE V
OUTPUT VOLTAGE V
RL= 2k
CL = 100pF
5k
Vi
180
10M
REV. D
AD630
10V
20mV
10V 20kHz
(Vi)
100
90
20mV/DIV
(Vo)
1mV
5s
100
90
1mV/DIV
(B)
20mV/DIV
(Vi)
10V/DIV
(Vo)
10
0%
10
0%
500ns
20mV
10V
TOP TRACE: Vi
MIDDLE TRACE: SETTLING
ERROR (B)
BOTTOM TRACE: Vo
TOP TRACE: Vo
BOTTOM TRACE: Vi
15
16
5k
10k
2
CH
A
20
13
19
VO
12
CH
B
18
10k
Vi
TOP
TRACE
14
10k
15
20
2 CH A
12
VO
BOTTOM
TRACE
13
10k
10k
10k
Vi
14
(B)
MIDDLE
TRACE
HP5082-2811
9
10
50mV
50mV/DIV
(Vi)
1mV
100
90
1mV/DIV
(A)
10
0%
100mV/DIV
(Vo)
500ns
100mV
TOP TRACE: Vi
MIDDLE TRACE: SETTLING
ERROR (A)
BOTTOM TRACE: Vo
10k
14 10k 15 20
Vi
TOP
TRACE
2 CH A
12
1k
VO
BOTTOM
TRACE
13
10k
MIDDLE
TRACE
(A)
30pF
10k
TEKTRONIX
7A13
REV. D
AD630
TWO WAYS TO LOOK AT THE AD630
The two closed loop gain magnitudes will be equal when RF/RA
= 1 + RF/RB, which will result from making RA equal to RFRB/
(RF + RB) the parallel equivalent resistance of RF and RB.
+VS
11
15
14
16
RA 5k
RB
10k
1
2
2.5k
RF
10k
20
RF 10k
RA
5k
13
19
18
Vi
RB
10k
12
2.5k
17
7
SEL B
RF
V
RA i
VO =
B/A
SEL A 10
VS
Vi
RA
5k
Vi
20
19
RB
10k
18
CIRCUIT DESCRIPTION
RF
10k
13
) Vi
RA
5k 15
2
RF
RB
RF
10k
RB
10k
VO = (1+
VO
CH A+
CH A
20
14
+VS
CH B+
CH B
19
18
11
Q33
Q35
Q34
Q36
i73
i55
10
Q44
SEL A
10
When channel B is selected, the resistors RA and RF are connected for inverting feedback as shown in the inverting gain
configuration diagram in Figure 3. The amplifier has sufficient
loop gain to minimize the loading effect of RB at the virtual
ground produced by the feedback connection. When the sign of
the comparator input is reversed, input B will be deselected and
A will be selected. The new equivalent circuit will be the noninverting gain configuration shown below. In this case RA will appear
across the op amp input terminals, but since the amplifier drives
this difference voltage to zero, the closed loop gain is unaffected.
Q52
Q53
Q62
Q65
Q67
Q70
13
SEL B
C121
Q30
12
Q31
Q28
C122
Q29
Q24
Q3
VS
VO
Q74
Q4
i22
COMP
Q32
Q25
i23
8
3
DIFF
OFF ADJ
DIFF
OFF ADJ
CM
OFF ADJ
CM
OFF ADJ
REV. D
AD630
The collectors of each switching cell connect to an input transconductance stage. The selected cell conveys bias currents i22
and i23 to the input stage it controls, causing it to become active.
The deselected cell blocks the bias to its input stage which, as a
consequence, remains off.
2k
2k
10k
100k
Vi
2
20
13
VO
19
11.11k
18
12
7
9
10
8
V S
AD630
system input tied to 0 V, and a switching or carrier waveform
applied to the comparator, a low level square wave will appear at
the output. The differential offset adjustment pot can be used to
null the amplitude of this square wave (Pins 3 and 4). The
common-mode offset adjustment can be used to zero the residual
dc output voltage (Pins 5 and 6). These functions should be
implemented using 10k trim pots with wipers connected directly
to Pin 8 as shown in Figures 9a and 9b.
10k
CM
ADJ
MODULATION
INPUT
2.5k
1
AMP A
12
+VS
11
20
2.5k
17
13
B
AMP B
10k
14
18
19
10k
AD630
CARRIER
INPUT
MODULATED
OUTPUT
SIGNAL
15
16
5k
COMP
9
10
8
VS
+5V
1M
DIFF
ADJ
100k
100k
9
10
10k
MODULATION
INPUT
10k
CM
ADJ
15V
100
DIFF
ADJ
4
2.5k
1
AMP A
12
+VS
11
20
2.5k
17
B
AMP B
10k
14
18
19
CARRIER
INPUT
13
10k
AD630
COMP
15
16
5k
7
+5V
MODULATED
OUTPUT
SIGNAL
10
8
+15V
22k
VS
6.8k
AD630
100k
7
IN 914's
2N2222
TTL INPUT
8
15V
5V
5V
20s
MODULATION
INPUT
CARRIER
INPUT
OUTPUT
SIGNAL
10V
REV. D
AD630
BALANCED DEMODULATOR
AC BRIDGE
1kHz
BRIDGE
EXCITATION
A
2.5kHZ
2V p-p
SINUSOIDAL
EXCITATION
AD524
1k GAIN 1000
1k
AD630
2 DEMODULATOR
1k
16
1k
5k
15
2.5
k
20
10k
A
1M
17
PHASE
SHIFTER
2.5
k
FILTER
5k 5k 5k
13
12
2F
2F
D
2F
10k
14
9
10
20V
5V
0V
200s
BRIDGE EXCITATION
(20V/DIV) (A)
100
90
2.5k
AMPLIFIED BRIDGE
OUTPUT (5V/DIV) (B)
0V
PHASE
SHIFTER
9
10
0V
DEMODULATED BRIDGE
OUTPUT (5V/DIV) (C)
10
0%
5V
2V
0V
REV. D
AD630
LOCK-IN AMPLIFIER APPLICATIONS
C
B 16
AD542
5k
AD630
15
17 2.5k
20
19
100R
10k
1 2.5k
A
AD542
13
B
100R
100dB
ATTENUATION
14 10k
C
OUTPUT
A
10
LOW PASS
FILTER
0.1Hz
9
MODULATED
CARRIER
400Hz
PHASE
CARRIER
REFERENCE
5V
5s
MODULATED SIGNAL (A)
(UNATTENUATED)
100
90
ATTENUATED SIGNAL
PLUS NOISE (B)
10
OUTPUT
0%
5mV
10
REV. D
AD630
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20
11
10
0.990 (25.15)
1.010 (25.65)
0.280 (7.11)
0.300 (7.62)
0.300 (7.62)
0.085 (2.16)
0.300
(7.62)
0.150 (3.81)
0.210 (5.33)
0.015 (0.38)
0.020 (0.51)
0.10
(2.54)
0.008 (0.20)
0.012 (0.30)
0.040 (1.01)
0.054 (1.37)
20
11
10
0.250
(6.350)
TYP
0.300 (7.62)
TYP
1.070 (27.18)
0.025 (0.635)
0.045 (1.143)
0.180
(4.572)
MAX
0.125 (3.18)
MIN
0.015 (0.381)
0.021 (0.533)
0.008 (0.203)
0.014 (0.356)
15
0
LCC (E-20A)
0.075
(1.91)
REF
0.100 (2.54)
0.064 (1.63)
0.095 (2.41)
0.075 (1.90)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.088 (2.24)
0.054 (1.37)
0.200 (5.08)
BSC
19
18
3
4
20
0.028 (0.71)
0.022 (0.56)
BOTTOM
VIEW
0.055 (1.40)
0.045 (1.14)
0.050 (1.27)
BSC
14
13
45 TYP
0.150 (3.81)
BSC
20
11
0.2992 (7.60)
0.2914 (7.40)
1
PIN 1
REV. D
0.4193 (10.65)
0.3937 (10.00)
10
0.1043 (2.65)
0.0926 (2.35)
8
0
0.0192 (0.49) SEATING
0.0125 (0.32)
PLANE
0.0138 (0.35)
0.0091 (0.23)
11
0.0291 (0.74)
45
0.0098 (0.25)
0.0500 (1.27)
0.0157 (0.40)
AD630Revision History
Page
PRINTED IN U.S.A.
C0078406/01(D)
Location
12
REV. D