An Efficient VLSI Architecture for Data Encryption Standard

and its FPGA Implementation

ABSTRACT
Design of cryptography based applications, including health-monitoring and biometric
data based recognition system, need short-term data security. Data encryption standard
(DES) is well-suited for the implementation of low-cost lightweight cryptography
applications. In this paper, we studied an efficient VLSI architecture for DES algorithm
based encryption/decryption engine. Depending upon the encryption/decryption needs,
the same set of architecture performs both encryption and decryption operations. In the
implementation of DES algorithm, a chain of multiplexer-based architecture is used to
implement the substitution operations (SBoxes). The existing architecture is modeled in
the VHDL design language and synthesized in the Xilinx field-programmable gate array
(FPGA) device. Hardware synthesis result shows that the proposed design utilizes only
1.07 % slice LUTs, 0.31 % slice registers and 29.22 % of bonded IOBs of the FPGA
device fabric.

EXISTING DESIGN
In the existing system, an efficient VLSI architecture for DES algorithm based
encryption/decryption engine. Depending upon the encryption/decryption needs, the
same set of architecture performs both encryption and decryption operations. In the
implementation of DES algorithm, a chain of multiplexer-based architecture is used to
implement the substitution operations (SBoxes). The existing architecture is modeled in
the VHDL design language and synthesized in the Xilinx field-programmable gate array
(FPGA) device. Hardware synthesis result shows that the proposed design utilizes only
1.07 % slice LUTs, 0.31 % slice registers and 29.22 % of bonded IOBs of the FPGA
device fabric.

PROPOSED DESIGN
In the proposed Design, a high speed variable Pseudorandom key is being generated.
Encryption and decryption can also be implemented in high speed of operation up to 1
GHZ. It is also planned to design both the encryption and decryption in a mutual
understanding manner so that the decryption always depends upon the operations and
logics held in encrypted module. This mode of operation assures even more accuracy
and secure data transfer.Implementation can be done in XILINX ISE, XC9572XL Low
power CoolRunner kit can be used for hardware implementation. Power consumption
area can be calculated as well.
Advantages of Proposed System

Secure Communication since

Logical dependence on encryption and Decryption
Variable key Frequency

Software Required

Simulation : MODELSIM 6.3 G ALTERA

Implementation : XILINX ISE 10.5

Language : VHDL

Power : XILINX XPE

User configurable Key also given