Why use a BJT in a flyback converter?

Michael OLoughlin, Senior Systems Solutions Engineer, Texas Instruments - March 30,
2014

In many low-power applications such as USB adaptors, cell phone chargers, and system bias
supplies, the low-cost quasi-resonant/discontinuous-mode flyback converter is a popular choice
(Figure 1). These converters can be designed efficiently and very cost-effectively. So why would you
consider using a bipolar junction transistor BJT for your design?

There are two compelling reasons for doing this. One is that the cost of BJTs is a lot cheaper than
FETs, comparatively. Second, you can get BJTs at a much higher voltage rating than FETs. This
allows designers to reduce electrical stress and power dissipation on clamp and/or snubber circuitry.
The only issue with using BJTs is that many engineers have become accustomed FETs, or have never
used BJTs as the main switch (QA) in their power converter. This article reviews how to
estimate/calculate the losses in an NPN BJT used in a discontinuous/quasi-resonant-mode flyback
converter.

Figure 1. Offline high-voltage BJT adaptor flyback

Before going through how to calculate the losses in a BJT, it is worthwhile to go through a basic
review of a bipolar junction transistor model. A bipolar transistor in its simplest form is a currentcontrolled current sink/switch. The base (B) input controls the current flow from collector (C) to
emitter (E). Figure 2 gives conceptual and schematic diagrams of a NPN BJT. This device is doped
with two N (negatively charged atoms) semiconductor regions separated by a P (positively charge
atoms) doped region. The base is connected to the P material, while the emitter and collector are
connected to the transistors N regions.

Figure 2. BJT semiconductor (a) and schematic symbol (b).

The base emitter junction acts similar to a diode. A positive voltage applied to the base emitter
junction attracts the free electrons of the N material connected to the emitter (E). These free
electrons migrate into the P material and leave a deficiency or free electrons in the N material. This
deficiency of electrons in the N material attracts electrons from the negative terminal of the bias
supply connected to the base and emitter, completing the circuit and allowing current to flow. A
negative bias across the B and E junctions causes excess electrons to be attracted out of the P
material. This breaks the circuit and stops the current flow, just like back-biasing a diode.

When the base-emitter junction is forward-biased and the collector (C) to emitter (E) path is biased,
this opens the flood gates and allows current to flow. The positive bias connected to the collector
attracts free electrons to the collector terminal, leaving a deficiency of electrons in the N material.
This attracts electrons from the base, which depletes into the N material. Now current can flow
through the collector and emitter depletion layers, completing the circuit. The amount of collector
current (IC) may be magnitudes greater than the base current (IB). The ratio of IC over IB generally is
known as the transistor DC current gain. This can be represented in the datasheet by Beta (), or
hFE. Note that this ratio is specified in the transistor datasheet under certain conditions and has lots

of variation:

Operating in saturation

When the collector-to-base current ratio is forced to be less than what is specified in the datasheet
for hFE, the transistor is defined to be operating in saturation. When a BJT is in saturation, an
increase of base current will not generate more collector current. The voltage across the collector
emitter has collapsed to its lowest magnitude. This is described/specified in the datasheet as the
collector-emitter saturation voltage (VCE(SAT)). This voltage is generally 0.5 to 2V, depending on the
BJT. In adaptor and bias supply applications when the BJT is used as the main switch to keep
conductions losses to a minimum, the device is driven into saturation.

Field-effective transistors (FETs) are a popular choice in the mid-power range (30 W to 1 KW)
because FET conduction losses are generally lower than BJT conduction losses. However, in lowpower applications in the 15W-30W range such as bias supplies and adaptors, the switching currents
are lower. Therefore, BJTs can be used to take advantage of lower cost and higher voltage ratings.
However, these devices are not perfect and some disadvantages have to be addressed during the
design process.

When using a FET, the gate only conducts current while the gate capacitance is charging and
discharging. The BJT is always conducting when the base-to-emitter junction is forward-biased. Also,
when turning off the saturated BJT, a good portion of the collector-current comes out of the
transistor base because of storage charge. This is unlike the FET where the gate drive never sees
the FETs drain current. This puts more stress on the flyback controllers base drive. When selecting
a flyback controller for this design, make sure it is designed to control and drive BJT in adaptor
applications. The UCC28722 flyback controller was design specifically to control quasiresonant/discontinuous flyback converters using BJT for the main switch. The drive circuitry of this
flyback controller is illustrated in Figure 3.

Figure 3. Controller base drive internal circuitry.

To calculate the power dissipated in the BJT in these low-power flyback applications requires a basic
understanding of the BJTs waveforms (Figure 4). Note that the BJT collector voltage (VC), collector
current (IC), and voltage across the current sense resistor (VRCS) are taken off a 5W USB adaptor. The
base current (IB) and output diode current (IDG) are drawn in as a representation of the respective
current and may not be to actual scale.

Figure 4. Switching waveforms of a BJT in a quasi-resonant flyback converter

At the beginning of interval t1 the collector current is zero. The base is driven (DRV) with a minimum
drive current (IDRV(MIN)) of 19 mA, which gradually increases to a maximum (IDRV(MAX)) of 37 mA in a
trapezoidal fashion. Since the collector is starting off with zero current, it is neither necessary nor
efficient to drive the maximum amount of current into the base at the beginning of the switching
cycle. The switch stays on until the maximum current is reached, which is determined by the
controllers control law. The primary current is sensed with a current-sense resistor (RCS). During
interval t1 transformer (T1) is energized and the BJT is driven into saturation. Once the desired
current is reached at the end of t1, the base of the BJT is pulled low with a FET. At this point all of
the collector current flows out of the transistor base and into the DRV controller pin (IDRV).
Reverse recovery and depletion of base current

During time interval, t2, the base collector junction goes into reverse recovery and the transistor
stays on until the base current depletes to roughly half of the collector current. Note that the
difference in collector current to emitter current during this time period goes through the transistor
base. The transistor remains on and the magnitude of the collector current is largely unchanged.
This interval is also known as the BJT storage time (tS) and can be found in the devices datasheet.

At the beginning of t3 and the end of storage time, the transistor begins to turn off. During this

interval, both transistor PN junctions go into a reverse recovery. The base and emitter share the
collector current while the transistor is turning off and the collector current is depleting. The
collector voltage increases gradually until the device has completely turned off. The collector voltage
reaches its maximum once the BJT has fully turned off. This voltage is equivalent to the sum of the
input voltage, reflected output voltage across the transformer, and the voltage spike caused by the
transformers leakage inductance.

During interval t4, energy is delivered to the secondary winding and diode DG conducts, delivering
energy to the output. Once the transformers energy is depleted, the collector voltage starts to ring
toward ground. This voltage is sensed through the auxiliary windings turn ratio (NA/NP). Once the
controller has observed that the transformer is de-energized, delay t5 is added to achieve a valley
switching. Note that the waveform presented in Figure 4 is only a snapshot, when the converter is
operating near critical conduction and is valley-switching. To control the duty cycle, the controller
adjusts the frequency and magnitude of the primary current and drives the converter into
discontinuous mode. Maximum duty cycle for these converters is when the converter is operating
near critical conduction by design.

The calculations to estimate the conduction and switching losses in a BJT are similar to that for a
diode. Base, emitter and collector saturation voltages are modeled as batteries, similar to the
forward voltage of diodes. Average currents are used to estimate average conduction losses. In this
application, all of the currents involved in the calculations are triangles or trapezoids, and the
average calculations utilize principles of basic geometry and are well documented. One major
difference is that the BJT has a storage-charge delay (tS). The base of a BJT transistor needs an
amount of storage charge (QS) removed from it before the device starts to turn off. It requires
knowing how to calculate reverse recovery charge (QR) of PN junctions. The reverse-recovery charge
is the amount of charge in the reverse direction it takes to get the semiconductor device to stop
conducting.

To calculate the losses of the BTJ switch (QA), lets review a 5W USB flyback converter using an NPN
transistor operating at 115V RMS input. The specifications are presented in Table 1. The peak
collector current (IC(PK)) is limited to 360 mA by the controller and the converters maximum
frequency (fMAX) is limited to 70 kHz by design. The converters average switching frequency (fAVG) at
full load with 115V RMS input is 56 kHz. Based on the minimum input voltage, the converter was
designed for a maximum duty cycle (DMAX) of 52 percent. The maximum collector voltage (VC(MAX)) at
this input condition is 250V:

Table 1. Datasheet parameters for a BJT.

Estimation of transistor losses

To estimate the losses in the transistor requires estimating the intervals presented in Figure 4.
Time t1 is the duration of the maximum duty cycle, which is roughly 7.4 us for this design example:

In order to estimate time t2, the devices stored charge (QS) needs to be calculated.

Based on the datasheet parameters for tS and the base discharge current (IB2), the storage charge is
200 nC:

During time t1, the transistor is driven into saturation. At the being of time t1 all the collector current
is going through the base of the transistor. As the base is going into a type of reverse recovery
during t2 the collector current is split between base and the emitter of the transistor. Based on this
information and the trapezoidal shape of the current in the interval, the average base current
(IB(AVGt2)) during storage time t2 can be calculated as:

With the average base current and QS time t2 can be calculated with the following equation:

The amount of collector reverse recovery charge (Qr) is used to estimate switching loss time interval
t3. Based on the BJT datasheet, parameter Qr is calculated to be 36 nC:

The average collector current (IC(AVGt3)) during interval t3 is 180 mA, based on a triangle shape.
Together this average collector current and calculated Qr can be used to estimate time for interval t3,
which is roughly 200 ns in this design example:

Using time estimates for intervals t1 through t3, equation 12 can be used to estimate the losses of BJT
(PQA) at 115V RMS input. In this equation the first group of terms is base-to-emitter conduction
losses, while the BJT is forward biased. The second group of terms estimates the losses in the BJT
due to collector current during time intervals t1 and t2.This includes the collector current going
through the base. The reverse saturation voltage of the base to collector is estimated to be VCE(SAT).
The third group of terms estimates the turn off losses in the BJT.

We evaluated the 5W design to compare the accuracy of the time estimates to actual times.

The measured time for t1 is 6.5 us, which is 2.4 percent less than the estimation. The storage time
was 660 ns (t2 = tS), which is roughly 11 percent less than the estimate. The measured collector rise
time (t3 = tR) is 210 ns, roughly five percent higher than the estimate. The calculated power
dissipation of PQA with measure times for t1 through t3 increases to 544 mW, which is 4.6 percent
higher than the estimated power dissipation. Note that these calculations are based on average

storage time and reverse recovery time from the datasheet. The actual times will vary based on
manufacturing, process and operating conditions. To be safe, a designer should add 20 percent of
margin to their estimate for total BJT losses.

Summary

When first approached to design a switching power supply using a BJT, I was curious why a designer
would use this device instead of a FET. However, the bipolar devices lower cost and higher voltage
rating make them a viable option for these low-power applications. As reviewed in this article, with a
basic understanding of the bipolar transistors operation and geometry, it is possible to estimate the
transistors conduction and switching losses.

References

For more information on the ucc28722, visit: www.ti.com/ucc28722-ca