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Practical Instruction Manual CS234 Digital Systems Lab

Truth Table Verification of Basic and


EXP NO. 1 Date:__/__/____
Universal Gates

OBJECTIVE
To verify the truth table of basic gates & universal gates (AND, OR, NOT, XOR, NAND &
NOR gates)
COMPONENTS & EQUIPMENTS REQUIRED

Digital IC Trainer Kit, ICs-7400, 7408, 7404, 7486, 7432, 7411, 7410

THEORY

AND Gate: The AND gate produces HIGH output when all its inputs are HIGH. The 7408 IC
package contains four independent positive logic AND GATES. 74Pins 14 and 7 provide power
for all four logic gates. 7411 IC package contains three three input AND Gates

OR Gate: The OR gate produces HIGH output when one or more inputs are HIGH. The 7432
IC package contains four independent positive logic ORGATES. Pins 14 and 7 provide power
for all four logic gates.

NOT Gate: The NOT gate produces the complement of its input. The 7404 IC package
contains six independent positive logic NOT GATES. Pins 14 and 7 provide power for all four
logic gates.

XOR Gate: The XOR gate produces HIGH output when one input is LOW and other input is
HIGH. The 7486 IC package contains four independent positive logic XOR GATES. Pins 14
and 7 provide power for all four logic gates.

NAND Gate: The NAND gate produces LOW output when all the inputs are HIGH. The 7400
IC package contains four independent positive logic NAND GATES. Pins 14 and 7 provide
power for all four logic gates. 7410 IC package contains three three input NAND Gates

NOR Gate: The NOR gate produces LOW output when one or more inputs are HIGH. The
7402 IC package contains four independent positive logic NOR GATES. Pins 14 and 7 provide
power for all four logic gates.

PROCEDURE

a) Check the IC using Digital IC Tester and place the IC on Digital IC Trainer Kit.

b) Connect VCC and Ground to respective pins of IC Trainer Kit.

MES College of Engineering & Technology, Dept. of Electronics &


Kunnukara, Ernakulam Communication Engineering
Practical Instruction Manual CS234 Digital Systems Lab

c) Connect the inputs to the input switches provided in the IC Trainer Kit.

d) Check the conditions of output LEDs and connect the outputs to the terminals of Output
LEDs.

e) Apply various combinations of inputs according to the truth table and observe condition
of LEDs.

LOGIC SYMBOLS, DIP PIN OUTS, EXPECTED OUTPUTS

DIP PINOUTS TRUTH TABLE & LOGIC SYMBOL

LOGIC INPUTS OUTPUT


A B Y = AB
SYMBOL
0 0 1
0 1 1
1 0 1
1 1 0

1. 7400-Quad Two Input NAND Gate

LOGIC INPUTS OUTPUT


A B Y = A+ B
SYMBOL
0 0 1
0 1 0
1 0 0
1 1 0

2. 7402-Quad Two Input NOR Gate

LOGIC INPUTS OUTPUT


A B Y = AB
SYMBOL
0 0 0
0 1 0
1 0 0
1 1 1

3. 7408-Quad Two Input AND Gate

MES College of Engineering & Technology, Dept. of Electronics &


Kunnukara, Ernakulam Communication Engineering
Practical Instruction Manual CS234 Digital Systems Lab

LOGIC INPUTS OUTPUT


A B Y = A+ B
SYMBOL
0 0 0
0 1 1
1 0 1
1 1 1

4. 7432-Quad Two Input OR Gate

LOGIC INPUT OUTPUT


A Y= A
SYMBOL
0 1
1 0

5. 7404- NOT Gate

LOGIC INPUTS OUTPUT


A B Y=AB
SYMBOL
0 0 0
0 1 1
1 0 1
1 1 0

6. 7486-Quad Two Input XOR Gate

LOGIC SYMBOL INPUTS OUTPUT


A B C Y = ABC
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
7. 7410-Three Input NAND Gate

MES College of Engineering & Technology, Dept. of Electronics &


Kunnukara, Ernakulam Communication Engineering
Practical Instruction Manual CS234 Digital Systems Lab

LOGIC SYMBOL INPUTS OUTPUT


A B C Y = A+ B+C
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
8. 7411-Three Input AND Gate

RESULTS & DISCUSSIONS

The outputs for various combinations of inputs for basic gates & universal gates (AND, OR,
NOT, XOR, NAND & NOR gates) were verified.

MES College of Engineering & Technology, Dept. of Electronics &


Kunnukara, Ernakulam Communication Engineering

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